Application Note 1581 ISL97671/2/3/4IRZ-EVAL Quick Start Guide This quick start guide pertains to the ISL97671/2/3/4IRZ-EVAL Evaluation Board. This board comes populated with 72 LEDs in a 6P12S configuration to simplify evaluation and testing. Please install the Sunlight ISL97670 GUI from Intersil’s website, which will be used to control ISL97671/3/4 parts via I2C. Note the slave address on the ISL97671, ISL97673 and ISL97674 is hexadecimal 58; see Figure 1. Please refer to “ISL97671” on page 1, “ISL97672” on page 2, “ISL97673” on page 2 and “ISL97674” on page 3, for jumper settings and power-up instructions. ISL97671 1. Jumpers JP7B, JP8B, JP9, JP10, JP11, JP12 and JP13 should be inserted for LED's in 6P12S configuration. 2. Jumpers in line 1, plus JP14, JP15, JP16, JP17, JP18 and JP19 should be inserted for LED's in 6P10S configuration. 3. Jumper JP5A, JP3A and JP6A are inserted. 4. Connect the I2C interface board to the ISL97671/2/3/4IRZ-EVAL Evaluation Board as shown in Figure 2 for I2C control. FIGURE 1. EXAMPLE OF GUI INTERFACE FIGURE 2. I2C INTERFACE BOARD CONNECTED TO ISL97671IRZ-EVAL EVALUATION BOARD August 3, 2010 AN1581.0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1581 5. JP1 should be inserted only if the input fault MOSFET Q1 is not used. 6. Apply input voltage to the VIN and GND post on the top left corner of the ISL97671IRZ-EVAL Evaluation Board. 7. Jumper JP3 should be in the right position and EN signal from a 2.5V/3.3V logic supply connected to the EN jumper, J5. 8. Jumper JP8A should be in the top position and PWM signal from a function generator connected to the PWMI jumper, J6. 9. Insert JP5A, JP6A and J3A. ISL97672 1. Jumpers JP7B, JP8B, JP9, JP10, JP11, JP12 and JP13 should be inserted for LED's in 6P12S configuration. 2. Jumpers in line 1, plus JP14, JP15, JP16, JP17, JP18 and JP19 should be inserted for LED's in 6P10S configuration. 3. Jumper JP8A inserted in top position. 4. Jumper JP3 should be in the right position. 5. JP1 should be inserted only if the input fault MOSFET Q1 is not used. 6. Apply input voltage to the VIN and GND post on the top left corner of the ISL97672IRZ-EVAL Evaluation Board. 10. To enable the board in SMBus mode, write a hex 05 in register 01; by writing a hex 01 in register 01 will enable DPST (see data sheet FN7631 for more details); writing a hex 03 in register 01 will allow PWM dimming only. 7. Apply a 2.5/3.3V signal to EN jumper, J5. 11. For non-I2C control of ISL97671, remove the I2C interface board, JP3A and ground J3(SCL post) and J4 (SDA post). The board can now be controlled via the EN and PWMI signal. 9. The LED current is calibrated to 20mA/channel which can be changed by measuring current across JP7B and varying POT R15 by Equation 3: 12. The LED current is calibrated to 20mA/channel, which can be changed by measuring current across JP7B and varying POT R15 by Equation 1: I LED = 401.8 ⁄ R 15 (EQ. 1) The measured current divided by six is the LED current per channel. For example, 120mA measured current will correspond to 20mA/channel. 13. The PWM dimming frequency is calibrated to 200Hz on this evaluation board but can be adjusted by varying POT R11 by Equation 2: 7 F SW = ( 6.66 × 10 ) ⁄ R 11 (EQ. 2) 14. ISL97671IRZ-EVAL Evaluation Board should be powering 6P10S or 6P12S LED's. 8. Apply a PWM signal from a function generator to PWMI jumper, J6. I LED = 401.8 ⁄ R 15 (EQ. 3) The measured current divided by six is the LED current per channel. For example, 120mA measured current will correspond to 20mA/channel. 10.The boost switching frequency is calibrated to 600kHz on this evaluation board but can be adjusted by varying POT R11 by Equation 4: F SW = ( 5 × 10 10 ) ⁄ R 11 (EQ. 4) 11.At this point, the ISL97672IRZ-EVAL Evaluation Board should be powering 6P10S or 6P12S LED's. ISL97673 1. Jumpers JP7B, JP8B, JP9, JP10, JP11, JP12 and JP13 should be inserted for LED's in 6P12S configuration. 2. Jumpers in line 1, plus JP14, JP15, JP16, JP17, JP18 and JP19 should be inserted for LED's in 6P10S configuration. 3. Jumpers JP3A, JP5A and JP6A are inserted. 4. Connect the I2C interface board to the ISL97673/4IRZEVAL Evaluation Board, as shown in Figure 3. FIGURE 3. I2C INTERFACE BOARD CONNECTED TO ISL97673IRZ-EVAL EVALUATION BOARD 2 August 3, 2010 AN1581.0 Application Note 1581 5. JP1 should be inserted only if the input fault MOSFET Q1 is not used. 6. Apply input voltage to the VIN and GND post on the top left corner of the ISL97673IRZ-EVAL Evaluation Board. For PWMI dimming, only go to Step 7; for SMBus dimming go to Step 8; for direct PWM go to Step 9; for DC current adjustment go to Step 10. 7. JP7A in the bottom position corresponds to SEL2 pin being high, which corresponds to fixed delay; floating JP7A corresponds to float on SEL2 pin, which corresponds to equal phase shift; inserting JP7A in the top position, corresponds to no delay. 8. JP5 inserted in the bottom position 9. Insert JP5A in top position and JP7A in the top position. 10. Insert JP5 in the top position 11. Jumper JP3 should be in the left position and EN/PWM signal from function generator connected to PWMI jumper, J6. 12. To enable the board in SMBUS dimming, write a hex 05 in register 01; writing a hex 01 in register 01 will enable DPST (see data sheet FN7633 for more detail); writing a hex 03 in register 01 will only allow external PWM signal for dimming. 3 13.The LED current is calibrated to 20mA/channel which can be changed by measuring current across JP7B and varying POT R15 by Equation 5: I LED = 401.8 ⁄ R 15 (EQ. 5) The measured current divided by six is the LED current per channel. For example, 120mA measured current will correspond to 20mA/channel. 14.The PWM dimming frequency is calibrated to 200Hz on this evaluation board but can be adjusted by varying POT R11 by Equation 6: 7 F SW = ( 6.66 × 10 ) ⁄ R 11 (EQ. 6) 15.At this point, the ISL97673IRZ-EVAL Evaluation Board should be powering 6P10S or 6P12S LED's. ISL97674 1. Jumpers JP7B, JP8B, JP9, JP10, JP11, JP12 and JP13 should be inserted for LED's in 6P12S configuration. 2. Jumpers in line 1, plus JP14, JP15, JP16, JP17, JP18 and JP19 should be inserted for LED's in 6P10S configuration. 3. Insert jumpers JP3A, JP5A and JP6A. 4. Connect the I2C interface board to the ISL97674IRZ-EVAL Evaluation Board, as shown in Figure 4. August 3, 2010 AN1581.0 Application Note 1581 FIGURE 4. I2C INTERFACE BOARD CONNECTED TO ISL97674IRZ-EVAL EVALUATION BOARD 5. Jumper JP3 should be in the left position and En/PWM signal from function generator connected to PWMI jumper, J6. 10.The LED current is calibrated to 20mA/channel which can be changed by measuring current across JP7B and varying POT R15 by Equation 7: 6. JP1 should be inserted only if the input fault MOSFET Q1 is not used. I LED = 401.8 ⁄ R 15 7. Apply input voltage to the VIN and GND post on the top left corner of the ISL97674IRZ-EVAL Evaluation Board. The measured current divided by six is the LED current per channel. For example, 120mA measured current will correspond to 20mA/channel. 8. Insert JP8A in the bottom position and apply a 60Hz VSYNC signal to VSYNC post, J7. 9. To enable the board in SMBUS control dimming, write a hex 05 in register 01; for PWM dimming control, write a hex 03 in register 01. 4 (EQ. 7) 11.The boost switching frequency can be programmed to either 600kHz or 1.2MHz by writing a '1' or a '0' in hex register 08, Bit 2. See ISL97674 data sheet, FN7634, Table 2B for more details. 12.At this point, the ISL97674IRZ-EVAL Evaluation Board should be powering 6P10S or 6P12S LED's. August 3, 2010 AN1581.0 Application Note 1581 ISL97671/2/3/4IRZ-EVAL Evaluation Board Schematic J9A LX Q1 LED1 C18 HDR1 Open 1 JP3A 4 C10 CAP EN JP3 10k C8 3.3nF JP5A 1 2 3 SCL JP6A SDA 18 C20 TP1 CH0 CH0 10 SDA 6 3 JP5 1 2 3 HEADER 3 PWM JP8A R5A 3 2 1 RES1 5 8 CH2 SMBDAT/SDA, _FLAG, SMBDAT/SDA/_FLAG, SDA CH3 CH4 C17 CAP 17 0 LED27 JP16 LED52 JP17 LED53 JP18 LED78 JP19 LED25 LED28 LED51 LED54 LED77 LED3 LED24 LED29 LED50 LED55 LED76 LED4 LED23 LED30 LED49 LED56 LED75 14 0 R15 1M open LED5 LED22 LED31 LED48 LED57 LED74 LED6 LED21 LED32 LED47 LED58 LED73 LED7 LED20 LED33 LED46 LED59 LED72 LED8 LED19 LED34 LED45 LED60 LED71 LED9 LED18 LED35 LED44 LED61 LED70 LED10 LED17 LED36 LED43 LED62 LED69 C16 1nF 1nF 1nF TP5 CH4 TP6 CH5 15 RSET AGND 9 ISL97671~4 R14 R9 TP4 CH3 1nF 1nF FPWM, FSW, FPWM, PLLC C R10 R11 100k 13 PWM, PWM, SEL1, VSYNC CH5 TP2 CH2 12 EN, EN, EN/PWM, EN/PWM J7(VSYNC) VSYNC 11 0 or Open C19 CAP HEADER 3 HEADER 3 R5 CH1 SMBCLK/SCL, NC, SMBCLK/SCL/SEL2, SCL 1nF TP3 CH1 C15 19 COMP 390pF 7 HEADER 3 3 2 1 R22 100 LED26 JP15 R2A 10K VDC JP7A J4 (SDA) JP13 LED2 C14 SDA SCL R2 JP4 J3 (SCL) JP12 R1 358K C7 1uF/10V SDA SCL JP11 C9 100pF/50V VIN PGND J5 (EN) JP10 J9(VDC) R6 R7 4.7k 4.7k EN JP14 20 16 C13 J2 (VLogic) R21 100 R23 100 OVP 2 SCL PWMI LX VDC HEADER10(FMale) Vlogic J6 (PWMI) FAULT C12 EN SDA C3 ~ C6 are X7R 50V rated ceram ic caps C4~C6 are reserved pads Y5V ceram ic cap is not recomm ended ISL97671~4 1 2 3 4 5 6 7 8 9 10 C11 PWM VSYNC PAD SCL JP9 C6 JP8B C5 FDMA530PZ C4 4 .7u F/50 V C2 JP7B 12 10uH C3 4 .7u F/50 V 3 J10(Vout) Vout D1 SS25 WR L1 4 .7u F/50 V 1 0u F/50 V C1 1 2 5 6 4 .7u F/50 V 4 0 .1u F/50 V J1(Vin) VIN = 4.75 ~26V R13 JP20 For 2 layers board, connect top lay er PGND open LED11 LED16 LED37 LED42 LED63 LED68 JP21 A1 R12 27K A3 LED12 LED15 LED38 LED41 LED64 LED67 LED13 LED14 LED39 LED40 LED65 LED66 JP1A JP1B JP1C JP1D JP1E JP22 R16 5K P1 ISL97671 ISL97672 ISL97673 ISL97674 - A2 P2 P3 JP23 R4 stuffed and R5, C20, C19 = no stuff R4 stuffed and R5, C20, C19 = no stuff R4 stuffed and R5, C20, C19 = no stuff R4 no stuffed and R5=, C20=, C19 = ISL97671/2/3/4IRZ-EVAL Evaluation Board Layout FIGURE 5. TOP LAYER 5 August 3, 2010 AN1581.0 Application Note 1581 ISL97671/2/3/4IRZ-EVAL Evaluation Board Layout (Continued) FIGURE 6. BOTTOM LAYER Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 6 August 3, 2010 AN1581.0