ISL24010EVAL2 User’s Manual ® Application Note November 11, 2005 Description Using the ISL24010EVAL2 Board The ISL24010EVAL2 is the evaluation board for the ISL24010 Octal Level Shifter for TFT/LCD Panels. The part was designed to level shift a digital input signal to +22V and -5V for TFT-LCD displays. The device is capable of level shifting a CMOS logic signal between +40V and -20V. Applying Power to the Board The ISL24010 will level shift a digital input signal (VIH = 1.8V, VIL = 0.8V) to an output voltage nearly equal to its output supply voltages. The ISL24010 has 3 supplies. VON1 and VON2 are positive supplies with a voltage range between +10V and +40V (absolute maximum). VOFF is the negative supply with a voltage range between -5V and -20V (absolute maximum). Outputs 1 through 6 are connected to VON1 and VOFF. Outputs 7 and 8 are connected to VON2 and VOFF (reference Figure 1). This configuration enables outputs 1 through 6 to provide slicing to the row drivers of a TFT/LCD panel to reduce flicker, and outputs 7 and 8 to control possible supply lines. VON2 should remain constant. It is possible to tie VON1 and VON2 supplies together, if independent control as described above is not desired. VON2 is required to be greater than or equal to VON1 at all times. IN1 Connected to VON1 and VOFF CH1 OUT1 CH2 OUT3 CH3 IN3 OUT4 CH4 IN4 OUT5 • Recommended power supply sequence: VON2, VON1, VOFF then input logic signals. Avoid hot plugging the supplies. The ESD protection scheme of the ISL24010 is based on diodes from the pins to the VON2 supply and a dV/dt- triggered clamp. This dV/dt triggered clamp imposes a maximum supply turn-on slew rate of 10V/µs. This clamp will trigger if the supply powers up too fast, causing amps of current to flow. Capacitors C1 through C3 and C12 through C17 help to slow up the supply ramp to the part but may not be enough for hot plugging the supplies. Operation of the Board Operation of the board is simple. You provide a logic signal on the input (VIH = 1.8V, VIL = 0.8V) and monitor the output voltage which will swing nearly equal to the VON1/2 and VOFF supplies. ISL24010EVAL2 Picture CH5 IN5 If voltage supplies VON1 and VON2 are different supplies, then the supply sequence needs to be VON2 then VON1. The reason for this requirement is shown in Circuit 4 in the Pin Description Table. The ESD protection diode between VON2 and VON1 will forward bias if VON1 becomes a diode drop greater than VON2. The schematic of the board is shown in Figure 3. The output load provided is a parallel combination of 5kΩ and 100pF. The board has provisions for including a series resistor for analysis of various loads (R9 through R16). If different loads are evaluated, the user needs to limit the output load less than 10mA per channel because the ISL24010 has no output short circuit current limit. OUT2 IN2 AN1214.0 OUT6 CH6 IN6 IN7 Connected to VON2 and VOFF CH7 CH8 OUT7 OUT8 IN8 FIGURE 1. ISL24010 FUNCTIONAL BLOCK DIAGRAM FIGURE 2. ISL24010 EVAL BOARD 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. Application Note 1214 Pin Descriptions PIN NUMBER TSSOP-20 PIN NAME EQUIVALENT CIRCUIT 1 GND 4 Ground pin 2 IN1 1 Level shifter input 1 3 IN2 1 Level shifter input 2 4 IN3 1 Level shifter input 3 5 IN4 1 Level shifter input 4 6 IN5 1 Level shifter input 5 7 IN6 1 Level shifter input 6 8 IN7 1 Level shifter input 7 9 IN8 1 Level shifter input 8 10 VOFF 4 Negative output supply for all channels 11 VON2 4 Positive output supply for channels 7 and 8. VON2 is required to be greater than or equal to VON1. 12 OUT8 3 Lever shifter output 8 13 OUT7 3 Lever shifter output 7 14 OUT6 2 Lever shifter output 6 15 OUT5 2 Lever shifter output 5 16 OUT4 2 Lever shifter output 4 17 OUT3 2 Lever shifter output 3 18 OUT2 2 Lever shifter output 2 19 OUT1 2 Lever shifter output 1 20 VON1 4 Positive output supply for channels 1 through 6. VON1 is required to be less than or equal to VON2. DESCRIPTION VON2 IN VOFF Outputs 1-6 CIRCUIT 1. VON1 VON2 OUT OUT VOFF Outputs 7-8 CIRCUIT 2. VOFF CIRCUIT 3. VON2 VON1 ESD CLAMP GND VOFF CIRCUIT 4. 2 AN1214.0 November 11, 2005 ISL24010EVAL2 Schematic VOFF VON1 J9 C1 1µF J10 J11 C2 1µF C3 1µF C16 C15 0.1µF J1 VON2 C13 1µF 3 J2 J12 C17 0.1µF 0.1µF IN1 GND C14 1µF J14 R10 0Ω C12 1µF IN2 J13 OUT1 R9 0Ω OUT2 J15 R11 0Ω J5 IN5 J6 IN6 VON2 VOFF J4 IN4 IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 OUT3 19 18 17 16 15 14 13 12 J16 R12 0Ω OUT4 R13 0Ω J17 OUT5 J18 R14 0Ω OUT6 GND J7 1 J19 R15 0Ω OUT7 IN7 J20 R16 0Ω J8 OUT8 IN8 R1 50Ω R2 50Ω R3 50Ω R4 50Ω R5 50Ω R6 50Ω R7 50Ω C4 100pF C8 100pF R17 5kΩ R21 5kΩ R8 50Ω C5 100pF C9 100pF R18 5kΩ C6 100pF C10 100pF R19 5kΩ C7 100pF AN1214.0 November 11, 2005 FIGURE 3. EVAL BOARD SCHEMATIC R22 5kΩ R20 5kΩ R23 5kΩ C11 100pF R24 5kΩ Application Note 1214 2 3 4 5 6 7 8 9 VON1 J3 IN3 Application Note 1214 ISL24010EVAL2 Bill of Materials TABLE 1. ISL24010EVAL2 BOM PART NUMBER REF. DES. QTY. VALUE TOL. DESCRIPTION ISL24010EVAL2REVAPCB PCB 1 PWB-PCB, ISL24010EVAL2, REVA H1046-00101-50V10-T C4-C11 8 100pF, 50V 10% Capacitor, SMD, 0805, NPO H1046-00104-50V10-T C15-C17 3 0.1µF, 50V 10% Capacitor, SMD, 0805, X7R H1065-00105-25V10-T C1-C3, C12-C14 5 1.0µF 10% Capacitor, SMD, 1206 108-0740-001 J9-J12 4 Conn-Jack, Bana-SS-Sdrless, Vertical 31-5329-52RFX J1-J8, J13-J20 16 Conn-BNC, Female, 50Ω, 4 Post Vertical PC Mount ISL24010IVZ U1 1 IC-Octal Level Shifter, 20P, TSSOP, Pb-free CRCW251249R9FKEG R1-R8 8 49.9Ω, 1W, H2512-00R00-1/10W-T R9-R16 8 0Ω, 1/10W, H2512-04991-1/10W1-T R17-R24 8 4.99kΩ, 1/10W 4-40X1-STANDOFF-METAL Four corners 4 Standoff, 4-40X1 4-40X1/2-SCREW-SS Four corners 4 Screw, 4-40X1/2in, PAN, SS, Philip 1% Resistor, SMD, 2512, TF, Pb-free Resistor, SMD, 0805, TF 1% Resistor, SMD, 0805, TF NOTE: Decoupling capacitors C12 through C14 only need to be 0.1µF. The capacitors provided on the board are 1.0µF to insure robustness of the eval board. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding. For information regarding Intersil Corporation and its products, see www.intersil.com 4 AN1214.0 November 11, 2005