DATASHEET

Data Sheet
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ISL5911
March 15, 2007
40MHz Rail-to-Rail Video Buffer
Features
The ISL59112 is a single rail-to-rail 6dB video buffer with a 3dB
roll-off frequency of 40MHz and a slew rate of 60V/µs. Input
signal DC restoration is accomplished with an internal sync tip
clamp. Operating from single supplies ranging from +2.5V to
+3.6V and sinking an ultra-low 2mA quiescent current, the
ISL59112 is ideally suited for low power, battery-operated
applications. It also features inputs capable of reaching down to
0.15V below the negative rail. Additionally, an enable high pin
shuts the part down in under 20ns.
• 40MHz -3dB bandwidth
The ISL59112 is designed to meet the needs for very low
power and bandwidth criteria inherent to battery operated
communication, instrumentation and modern industrial
applications, such as video on demand, cable set-top boxes,
DVD players and HDTV. The ISL59112 is offered in a spacesaving SC-70 package guaranteed to a 1mm maximum
height constraint and specified for operation from
-40°C to +85°C temperature range.
PART
MARKING
ISL59112IEZ-T7 CPA
TAPE &
REEL
FN6142.4
• 85V/µs slew rate
• Low supply current = 2mA
• Power-down current less than 1µA
• Supplies from 2.5V to 3.6V
• Rail-to-rail output
• Input to 0.15V below ground
• Internal sync tip clamp
• SAG correction reduces coupling capacitor size
• Pb-free plus anneal available (RoHS compliant)
Applications
• Video amplifiers
• Digital cameras
Ordering Information
PART
NUMBER
(Note)
ISL59112
• Camera phones
PACKAGE
(Pb-Free)
7” (3k pcs) 6 Ld SC-70
PKG.
DWG. #
P6.049A
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
• Portable/handheld products
• Communications devices
• Video on demand
• Cable set-top box
• Satellite set-top box
• DVD players
• HDTV
• Personal video recorders
Pinout
ISL59112
(6 LD SC-70)*
TOP VIEW
IN+ 1
GND 2
SAG 3
6 V+
LPF
+
-
5 EN
4 OUT
*1mm MAXIMUM HEIGHT GUARANTEED
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2005, 2006, 2007. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL59112
Absolute Maximum Ratings (TA = +25°C)
Thermal Information
Supply Voltage from VS+ to VS- . . . . . . . . . . . . . . . . . . . . . . . . 3.6V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . VS+ +0.3V to VS- -0.3V
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . 40mA
ESD Rating
Human Body Model (Per MIL-STD-883 Method 3015.7) . . .3000V
Machine Model (Per EIAJ ED-4701 Method C-111) . . . . . . . .300V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +125°C
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +125°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
DESCRIPTION
VS+ = 3.3V, VS- = GND, TA = +25°C, RL = 150 to GND, unless otherwise specified
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
3.6
V
2.75
mA
3
µA
INPUT CHARACTERISTICS
VCC
Supply Voltage Range
IDD(ON)
Quiescent Supply Current
VIN = 500mV, EN = VDD, no load
IDD(OFF)
Shutdown Supply Current
EN = 0V
VOLS
Output Level Shift Voltage
VIN = 0V, no load
60
130
200
mV
VCLAMP
Input Voltage Clamp
IIN = -1mA
-40
-15
+10
mV
ICLAMP
Clamp Current
VIN = VCLAMP - 100mV
-6
-3
mA
IB
Input Bias Current
VIN = 500mV
2.5
5
7.5
µA
RIN
Input Resistance
0.5V < VIN < 1.0V
0.5
3
AV
Voltage Gain
RL = 150
5.8
6.0
ASAG
SAG Correction DC Gain to VOUT
SAG open
PSRR
DC Power Supply Rejection
VDD = 2.7V to 3.3V
VOH
Output Voltage High Swing
VIN = 2V, RL = 150 to GND
ISC
Output Short-Circuit Current
VIN = 2V, to GND through 10
2.5
2
M
6.2
dB
2.25
V/V
43
63
dB
2.85
3.2
V
-94
VIN = 100mV, out short to VDD through 10
65
115
-3
0
IENABLE
Enable Current
Enable pin = 0V to 3.6V
VIL
EN Logic Low Threshold
VDD = 2.7V to 3.3V
VIH
EN Logic High Threshold
VDD = 2.7V to 3.3V
1.6
ROUT
Shutdown Output Impedance
EN = 0V DC
3.6
-65
mA
mA
+3
µA
0.8
V
V
4.5
5.9
k
EN = 0V, f = 4.5MHz
3.4
k
AC PERFORMANCE
BW
-3dB Bandwidth
RL = 150, CL = 5pF
40
MHz
BW
±0.1dB Bandwidth
RL = 150, CL = 5pF
27
MHz
dG
Differential Gain
NTSC and PAL DC coupled
0.02
%
NTSC and PAL AC coupled
0.02
%
NTSC and PAL DC coupled
0.4
°
NTSC and PAL AC coupled
0.04
°
dP
Differential Phase
D/DT
Group Delay Variation
f = 100kHz, 5MHz
5.4
ns
SNR
Signal To Noise Ratio
100% white signal
65
dB
tON
Enable Time
VIN = 500mV, VOUT to 1%
570
ns
2
FN6142.4
March 15, 2007
ISL59112
Electrical Specifications
DESCRIPTION
VS+ = 3.3V, VS- = GND, TA = +25°C, RL = 150 to GND, unless otherwise specified (Continued)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
tOFF
Disable Time
VIN = 500mV, VOUT to 1%
SR(Ih)
Positive Slew Rate
VIN = 1VSTEP, 10% - 90%
SR(hl)
Negative Slew Rate
VIN = 1VSTEP
tF
Fall Time
1.0VSTEP
9
ns
tR
Rise Time
1.0VSTEP, 20% - 80%
9
ns
30
14
ns
85
V/µs
-80
-30
V/µs
Typical Performance Curves
VDD = +3.3V
RL = 150
CL = 27pF
CL = 18pF
VDD = +3.3V
CL = 5pF
RL = 570
RL = 210
CL = 10pF
CL = 5pF
RL = 150
RL = 27
CL = 0pF
RL = 10
FIGURE 1. FREQUENCY RESPONSE FOR VARIOUS CLOAD
1V
VDD = +3.3V
RL = 150
SOURCE = -15dB
500mV
200mV
100mV
42mV
FIGURE 3. FREQUENCY RESPONSE FOR VARIOUS VOS
3
FIGURE 2. FREQUENCY RESPONSE FOR VARIOUS RLOAD
VDD = +3.3V
RL = 150
SOURCE = -30dB
VIN = -20dBm
VIN = -10dBm
VIN = -5dBm
VIN = 0dBm
FIGURE 4. FREQUENCY RESPONSE FOR VARIOUS VIN
FN6142.4
March 15, 2007
ISL59112
Typical Performance Curves (Continued)
VDD = +3.3V
RL = 150
FREQ = 500kHz
VDD = +3.3V
RL = 150
VOPP = 2V
THD
THD
2nd HD
2nd HD
3rd HD
3rd HD
FIGURE 5. HARMONIC DISTORTION vs OUTPUT VOLTAGE
FIGURE 6. HORMONIC DISTORTION vs FREQUENCY
VDD = +3.3V
VDD = +3.3V
FIGURE 7. OUTPUT IMPEDENCE vs FREQUENCY
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.55
0.50
450mW
0.40
0.30
0.25
0.20
SC
7
=
+2 0-6
20
°C
/W
0.15
0.10
0.05
0.40
0.35
A
JA
500mW
0.45
-6
/W
70 0°C
SC 20
+
=

0.35
0
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
J
POWER DISSIPATION (W)
0.45
POWER DISSIPATION (W)
0.50
FIGURE 8. PSRR vs FREQUENCY
0.30
0.25
0.20
0.15
0.10
0.05
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 9. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
4
0
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 10. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FN6142.4
March 15, 2007
ISL59112
SYNC CLAMP
VDD
VDD
VDD
+
CIN
RIN
75
VDC
IN
+
–
IN
SAG
NETWORK
100nF
+
-
OUT
C5
75
47µF
R6
R7
R5
AC COUPLING
CAPACITOR
SAG
75
C4
22µF
EN
GND
EN = GND: SHUTDOWN IDD~0
EN = VDD: ACTIVE IDD~2.0mA
R4
FIGURE 11. BLOCK DIAGRAM
Application Information
The ISL59112 is a single supply rail-to-rail output buffer
achieving a -3dB bandwidth of around 40MHz and slew rate
of about 85V/µs while demanding only 2mA of supply
current. This part is ideally suited for applications with
specific micropower consumption and high bandwidth
demands. As described in both the performance
characteristics section and the features section, the
ISL59112 is designed to be very attractive for portable
composite video applications.
The ISL59112 features a sync clamp and SAG network at
the output facilitating reduction of typically large AC coupling
capacitors. See Figure 11.
Internal Sync Clamp
The typical embedded video DAC operates from a ground
referenced single supply. This becomes an issue because
the lower level of the sync pulse output may be at a 0V
reference level to some positive level. The problem is
presenting a 0V input to most single supply driven amplifiers
will saturate the output stage of the amplifier, resulting in a
clipped sync tip and degrading the video image. A larger
positive reference may offset the input above its positive
range.
stage of the amplifier by setting the signal closer to the best
voltage range.
The simplified block diagram of the ISL59112 in Figure 11 is
divided into four sections. The first (Section A) is the Sync
Clamp. The AC coupled video sync signal is pulled negative
by a current source at the input of the comparator amplifier.
When the sync tip goes below the comparator threshold, the
output comparator is driven negative and the PMOS device
turns on clamping sync tip to near ground level.
AC Output Coupling and the SAG Network
Composite video signals carry viable information at
frequencies as low as 30Hz up to 5MHz. When a video
system output is AC coupled it is critical that the filter
represented by the output coupling capacitor and the
surrounding resistance network provide a band pass
function with a low pass band low enough to exclude very
low frequencies down to DC, and with a high pass band pass
sufficiently high to include frequencies at the higher end of
the video spectrum.
The ISL59112 features an internal sync clamp and an offset
function to level shift the entire video signal to the best level
before it reaches the input of the amplifier stage. These
features are also helpful to avoid saturation of the output
5
FN6142.4
March 15, 2007
ISL59112
SAG
NETWORK
AC COUPLING
CAPACITOR
C5
R6
ROUT
RL
C4
R7
Short-circuit protection can be provided externally with a
back match resistor in series with the output placed close as
possible to the output pin. In video applications this would be
a 75 resistor and will provide adequate short-circuit
protection to the device. Care should still be taken not to
stress the device with a short at the output.
Power Dissipation
R5
R4
FIGURE 12. SAG NETWORK AND AC COUPLING CAPACITORS
Typically, this is accomplished with 220µF coupling
capacitor, a large and somewhat costly solution providing a
low frequency pole around 5Hz. If the size of this capacitor is
even slightly reduced we have found that the accompanying
phase shift in the 50Hz to 100Hz frequency range results in
field tilt, which results in a degraded video image.
With the high output drive capability of the ISL59112, it is
possible to exceed the +125°C absolute maximum junction
temperature under certain load current conditions.
Therefore, it is important to calculate the maximum junction
temperature for an application to determine if load conditions
or package types need to be modified to assure operation of
the amplifier in a safe operating area.
The maximum power dissipation allowed in a package is
determined according to Equation 1:
T JMAX – T AMAX
PD MAX = -------------------------------------------- JA
(EQ. 1)
The internal SAG network of the ISL59112 replaces the
220µF AC coupling capacitor with a network of two smaller
capacitors as shown, in Figure 12. Additionally, the network
is designed to place a zero in the ~30Hz range, providing a
small amount of peaking to compensate the phase response
associated with field tilt.
Where:
DC Output Coupling
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or
The ISL59112 internal sync clamp makes it possible to DC
couple the output to a video load, eliminating the need for
any AC coupling capacitor, thereby saving board space and
additional expense for capacitors. Additionally, this solution
completely eliminates the issue of field tilt in the lower
frequency. The trade off is greater demand of supply current.
Typical load current for AC coupled is around 3mA
compared to typical 6mA used when DC coupling.
+
-
ENABLE
ROUT
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
JA = Thermal resistance of the package
for sourcing:
V OUT i
PD MAX = V S  I SMAX +  V S – V OUT i   ----------------RL i
(EQ. 2)
for sinking:
PD MAX = V S  I SMAX +  V OUT i – V S   I LOAD i
(EQ. 3)
Where:
VS = Supply voltage
ISMAX = Maximum quiescent supply current
TELEVISION
OR VCR
FIGURE 13. DC COUPLE
VOUT = Maximum output voltage of the application
RLOAD = Load resistance tied to ground
ILOAD = Load current
Output Drive Capability
The ISL59112 does not have internal short-circuit protection
circuitry. If the output is shorted indefinitely, the power
dissipation could easily overheat the die or the current could
eventually compromise metal integrity. Maximum reliability is
maintained if the output current never exceeds ±40mA. This
limit is set by the design of the internal metal interconnect.
Note that in transient applications, the part is robust.
6
By setting the two PDMAX equations equal to each other, we
can solve the output current and RLOAD to avoid the device
overheat.
FN6142.4
March 15, 2007
ISL59112
Power Supply Bypassing Printed Circuit Board
Layout
As with any modern operational amplifier, a good printed
circuit board layout is necessary for optimum performance.
Lead lengths should be as short as possible. The power
supply pin must be well bypassed to reduce the risk of
oscillation. For normal single supply operation, where the
VS- pin is connected to the ground plane, a single 4.7µF
tantalum capacitor in parallel with a 0.1µF ceramic capacitor
from VS+ to GND will suffice. This same capacitor
combination should be placed at each supply pin to ground if
split supplies are to be used. In this case, the VS- pin
becomes the negative supply rail.
Printed Circuit Board Layout
For good AC performance, parasitic capacitance should be
kept to minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier's inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
7
FN6142.4
March 15, 2007
ISL59112
Small Outline Transistor Plastic Packages (SC70-6)
0.20 (0.008) M
VIEW C
C
P6.049A
CL
6 LEAD SMALL OUTLINE TRANSISTOR PLASTIC PACKAGE
e
b
6
INCHES
5
4
CL
CL
E1
E
1
2
3
e1
SYMBOL
MIN
MAX
MIN
MAX
NOTES
A
0.031
0.039
0.80
1.00
-
A1
0.001
0.004
0.025
0.10
-
A2
0.034
0.036
0.85
0.90
-
b
0.006
0.012
0.15
0.30
-
b1
0.006
0.010
0.15
0.25
-
c
0.004
0.008
0.10
0.20
6
D
c1
0.004
0.006
0.10
0.15
6
CL
D
0.073
0.085
1.85
2.15
3
C
E
A
MILLIMETERS
A2
SEATING
PLANE
A1
-C-
E1
e
e1
L
0.10 (0.004) C
WITH
b
PLATING
b1
0.084 BSC
0.045
c1
1.15
0.0256 Ref
0.018
-
1.35
3
0.65 Ref
0.0512 Ref
0.010
-
1.30 Ref
0.26
-
0.46
4
L1
0.016 Ref.
0.400 Ref.
-
L2
0.006 BSC
0.15 BSC
-
N
c
0.053
2.1 BSC
6
6
5
R
0.004
-
0.10
-

0°
8°
0°
8°
Rev. 0 7/05
NOTES:
BASE METAL
1. Dimensioning and tolerance per ASME Y14.5M-1994.
2. Package conforms to EIAJ SC70 and JEDEC MO203AB.
4X 1
3. Dimensions D and E1 are exclusive of mold flash, protrusions,
or gate burrs.
R1
4. Footlength L measured at reference to gauge plane.
5. “N” is the number of terminal positions.
R
GAUGE PLANE
SEATING
PLANE
L
C
L1

L2
6. These Dimensions apply to the flat section of the lead between
0.08mm and 0.15mm from the lead tip.
7. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only
4X 1
VIEW C
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
8
FN6142.4
March 15, 2007