CT RODU P U CT E T E L PROD E T OBSO U IT UBST IBLE S ICL3222E POSSSheet Data ® +/- 15kV ESD Protected, +3V to +5.5V, 1 Microamp, 250kbps, RS-232 Transmitter/Receiver Table 1 summarizes the features of the ICL3310E, while Application Note AN9863 summarizes the features of each device comprising the ICL32XX 3V family. Part # Information PKG. DWG. # PACKAGE FN6000.3 • ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000) The single pin powerdown function (SHDN = 0) disables all the transmitters and receivers, while shutting down the charge pump to minimize supply current drain. TEMP. RANGE (°C) July 2004 Features The Intersil ICL3310E contains 3.0V to 5.5V powered RS-232 transmitters/receivers which meet ElA/TIA-232 and V.28/V.24 specifications, even at VCC = 3.0V. Targeted applications are PDAs, Palmtops, and notebook and laptop computers where the low operational, and even lower standby, power consumption is critical. Efficient on-chip charge pumps, coupled with a manual powerdown function reduces the standby supply current to a 1µA trickle. Small footprint packaging, and the use of small, low value capacitors ensure board space savings as well. Data rates greater than 250kbps are guaranteed at worst case load conditions. This device is fully compatible with 3.3V only systems, mixed 3.3V and 5.0V systems, and 5.0V only systems. PART NO. ICL3310E ICL3310ECB 0 to 70 18 Ld SOIC M18.3 ICL3310ECB-T 0 to 70 Tape and Reel M18.3 ICL3310ECA 0 to 70 20 Ld SSOP M20.209 ICL3310ECA-T 0 to 70 Tape and Reel M20.209 ICL3310EIB -40 to 85 18 Ld SOIC M18.3 ICL3310EIB-T -40 to 85 Tape and Reel M18.3 ICL3310EIA -40 to 85 20 Ld SSOP M20.209 ICL3310EIA-T -40 to 85 Tape and Reel M20.209 • Drop In Replacement for MAX3384ECWN (SOIC) • Low Power, Pin Compatible Upgrade for 5V MAX222, SP310E, ADM222, and LT1780 • Single SHDN Pin Disables Transmitters and Receivers • Meets EIA/TIA-232 and V.28/V.24 Specifications at 3V • RS-232 Compatible Outputs at 2.7V • Latch-Up Free • On-Chip Voltage Converters Require Only Four External 0.1µF Capacitors • Receiver Hysteresis For Improved Noise Immunity • Very Low Supply Current . . . . . . . . . . . . . . . . . . . . 0.3mA • Guaranteed Minimum Data Rate . . . . . . . . . . . . . 250kbps • Guaranteed Minimum Slew Rate . . . . . . . . . . . . . . . 6V/µs • Wide Power Supply Range . . . . . . . Single +3V to +5.5V • Low Supply Current in Powerdown State. . . . . . . . . .<1µA Applications • Any System Requiring RS-232 Communication Ports - Battery Powered, Hand-Held, and Portable Equipment - Laptop Computers, Notebooks, Palmtops - Modems, Printers and other Peripherals - Digital Cameras - Cellular/Mobile Phones Related Literature • Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)” • AN9863, “3V to +5.5V, 250k-1Mbps, RS-232 Transmitters/Receivers” TABLE 1. SUMMARY OF FEATURES NO. OF NO. OF PART NUMBER Tx. Rx. ICL3310E 2 2 1 NO. OF MONITOR Rx. (ROUTB) DATA RATE (kbps) Rx. ENABLE FUNCTION? READY OUTPUT? MANUAL POWERDOWN? AUTOMATIC POWERDOWN FUNCTION? 0 250 No No Yes No CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners. ICL3310E Pinouts ICL3310E (SOIC) TOP VIEW ICL3310E (SSOP) TOP VIEW 20 SHDN NC 1 18 SHDN NC 1 C1+ 2 17 VCC C1+ 2 19 VCC 3 16 GND V+ 3 18 GND C1- 4 15 T1OUT C1- 4 17 T1OUT C2+ 5 14 R1IN C2+ 5 16 R1IN C2- 6 13 R1OUT C2- 6 15 R1OUT V+ 14 NC V- 7 12 T1IN V- 7 T2OUT 8 11 T2IN T2OUT 8 13 T1IN R2IN 9 12 T2IN 10 R2OUT R2IN 9 11 NC R2OUT 10 Pin Descriptions PIN VCC FUNCTION System power supply input (3.0V to 5.5V). V+ Internally generated positive transmitter supply (+5.5V). V- Internally generated negative transmitter supply (-5.5V). GND Ground connection. C1+ External capacitor (voltage doubler) is connected to this lead. C1- External capacitor (voltage doubler) is connected to this lead. C2+ External capacitor (voltage inverter) is connected to this lead. C2- External capacitor (voltage inverter) is connected to this lead. TIN TTL/CMOS compatible transmitter Inputs. TOUT RIN ±15kV ESD Protected, RS-232 level (nominally ±5.5V) transmitter outputs. ±15kV ESD Protected, RS-232 compatible receiver inputs. ROUT TTL/CMOS level receiver outputs. SHDN Active low input to shut down transmitters, receivers, and on-board power supply, to place device in low power mode. Typical Operating Circuits ICL3310E (NOTE 2) C3 (OPTIONAL CONNECTION, NOTE 1) C1 0.1µF + C2 0.1µF + T1IN TTL/CMOS LOGIC LEVELS + 0.1µF T2IN R1OUT 2 4 5 6 + +3.3V to +5V 17 C1+ VCC C1C2+ C2- 12 11 V- 2 7 15 T2 8 14 13 5kΩ C4 0.1µF T1OUT T2OUT R1IN 9 10 NOTES: 1. The negative terminal of C3 can be connected to either VCC or GND. 2. Pin numbers refer to SOIC package. + C3 0.1µF + T1 R1 R2OUT 3 V+ R2 5kΩ GND SHDN 16 R2IN 18 VCC RS-232 LEVELS ICL3310E Absolute Maximum Ratings Thermal Information VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3V to -7V V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14V Input Voltages TIN, SHDN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6V RIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25V Output Voltages TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±13.2V ROUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC +0.3V Short Circuit Duration TOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table Thermal Resistance (Typical, Note 3) θJA (°C/W) 18 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75 20 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 122 Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C (Lead Tips Only) Operating Conditions Temperature Range ICL3310ECX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C ICL3310EIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to 85°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 3. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified. Typicals are at TA = 25°C Electrical Specifications PARAMETER TEST CONDITIONS TEMP (°C) MIN TYP MAX UNITS 25 - 0.1 5 µA Full - 1 50 µA Full - 0.3 3.0 mA DC CHARACTERISTICS Supply Current, Powerdown SHDN = GND All Outputs Unloaded, SHDN = VCC Supply Current, Enabled LOGIC AND TRANSMITTER INPUTS AND RECEIVER OUTPUTS Input Logic Threshold Low TIN, SHDN Full - - 0.8 V Input Logic Threshold High TIN, SHDN Full 2.4 - - V Input Leakage Current TIN, SHDN Full - ±0.01 ±1.0 µA Output Leakage Current SHDN = GND Full - ±0.05 ±10 µA Output Voltage Low IOUT = 3.2mA Full - - 0.4 V Output Voltage High IOUT = -1.0mA Full - V VCC -0.6 VCC -0.1 RECEIVER INPUTS Input Voltage Range Full -25 - 25 V 1.2 - V Input Threshold Low VCC = 3.3V 25 0.6 VCC = 5.0V Full 0.8 1.5 - V Input Threshold High VCC = 3.3V 25 - 1.5 2.4 V VCC = 5.0V Full - 1.8 2.4 V Input Hysteresis Full 0.2 0.5 1 V Input Resistance Full 3 5 7 kΩ TRANSMITTER OUTPUTS Output Voltage Swing All Transmitter Outputs Loaded with 3kΩ to Ground Full ±5.0 ±5.4 - V Output Resistance VCC = V+ = V- = 0V, Transmitter Output = ±2V Full 300 10M - Ω Full ±7 ±35 - mA VOUT = ±12V, VCC = 0V or 3V to 5.5V, SHDN = GND Full - - ±10 µA RL = 3kΩ, CL = 1000pF, One Transmitter Switching Full 250 500 - kbps Output Short-Circuit Current Output Leakage Current TIMING CHARACTERISTICS Maximum Data Rate 3 ICL3310E Test Conditions: VCC = 3V to 5.5V, C1 - C4 = 0.1µF; Unless Otherwise Specified. Typicals are at TA = 25°C (Continued) Electrical Specifications PARAMETER TEST CONDITIONS Transmitter Propagation Delay Receiver Propagation Delay TEMP (°C) MIN TYP MAX UNITS Transmitter Input to Transmitter Output, CL = 1000pF tPHL Full - 0.6 3.5 µs tPLH Full - 0.7 3.5 µs Receiver Input to Receiver Output, CL = 150pF tPHL Full - 0.2 1 µs tPLH Full - 0.3 1 µs Transmitter Output Enable Time From SHDN Rising Edge to TOUT = ±3V 25 - 50 - µs Transmitter Output Disable Time From SHDN Falling Edge to TOUT = ±5V 25 - 600 - ns Transmitter Skew tPHL - tPLH (Note 4) 25 - 100 - ns Receiver Skew tPHL - tPLH 25 - 100 - ns Transition Region Slew Rate VCC = 3.3V, CL = 150pF to RL = 3kΩ to 7kΩ, Measured From 3V to -3V or 2500pF -3V to 3V VCC = 4.5V, CL = 150pF to 2500pF 25 4 - - V/µs 25 6 - - V/µs Human Body Model 25 - ±15 - kV IEC61000-4-2 Contact Discharge 25 - ±8 - kV IEC61000-4-2 Air Gap Discharge 25 - ±15 - kV Human Body Model 25 - ±3 - kV ESD PERFORMANCE RS-232 Pins (TOUT, RIN) All Other Pins NOTE: 4. Transmitter skew is measured at the transmitter zero crossing points. Detailed Description The ICL3310E operates from a single +3V to +5.5V supply, guarantees a 250kbps minimum data rate, requires only four small external 0.1µF capacitors, features low power consumption, and meets all ElA RS-232C and V.28 specifications. The circuit is divided into three sections: The charge pump, the transmitters, and the receivers. Charge-Pump Intersil’s new ICL3310E utilizes regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate ±5.5V transmitter supplies from a VCC supply as low as 3.0V. This allows these devices to maintain RS-232 compliant output levels over the ±10% tolerance range of 3.3V powered systems. The efficient on-chip power supplies require only four small, external 0.1µF capacitors for the voltage doubler and inverter functions over the full VCC range. The charge pumps operate discontinuously (i.e., they turn off as soon as the V+ and V- supplies are pumped up to the nominal values), resulting in significant power savings. All transmitter outputs disable and assume a high impedance state when the device enters the powerdown mode (see Table 2). These outputs may be driven to ±12V when disabled. All devices guarantee a 250kbps data rate for full load conditions (3kΩ and 1000pF), VCC ≥ 3.0V, with one transmitter operating at full speed. Under more typical conditions of VCC ≥ 3.3V, RL = 3kΩ, and CL = 250pF, one transmitter easily operates at 900kbps. Transmitter inputs float if left unconnected (there are no pullup resistors), and may cause ICC increases. Connect unused inputs to GND for the best performance. TABLE 2. POWERDOWN AND ENABLE LOGIC TRUTH TABLE SHDN TRANSMITTER RECEIVER INPUT OUTPUTS OUTPUTS MODE OF OPERATION H Active Active Normal Operation L High-Z High-Z Manual Powerdown Transmitters Receivers The transmitters are proprietary, low dropout, inverting drivers that translate TTL/CMOS inputs to EIA/TIA-232 output levels. Coupled with the on-chip ±5.5V supplies, these transmitters deliver true RS-232 levels over a wide range of single supply system voltages. The ICL3310E contains standard inverting receivers that three-state via the SHDN control line. Receivers driving powered down peripherals must be disabled to prevent current flow through the peripheral’s protection diodes (see Figures 2 and 3). 4 ICL3310E All the receivers convert RS-232 signals to CMOS output levels and accept inputs up to ±30V while presenting the required 3kΩ to 7kΩ input impedance (see Figure 1) even if the power is off (VCC = 0V). The receivers’ Schmitt trigger input stage uses hysteresis to increase noise immunity and decrease errors due to slow input signal transitions. VCC RXOUT RXIN -25V ≤ VRIN ≤ +25V GND ≤ VROUT ≤ VCC 5kΩ GND FIGURE 1. INVERTING RECEIVER CONNECTIONS Low Power Operation This 3V device requires a nominal supply current of 0.3mA, even at VCC = 5.5V, during normal operation (not in powerdown mode). This is considerably less than the 11mA current required by comparable 5V RS-232 devices, allowing users to reduce system power simply by replacing the old style device with the ICL3310E. Low Power, Pin Compatible Replacement Pin compatibility with existing 5V products (e.g., MAX222), coupled with the wide operating supply range, make the ICL3310E a potential lower power, higher performance dropin replacement for existing 5V applications. As long as the VCC When replacing a device in an existing 5V application, it is acceptable to terminate C3 to VCC as shown on the “Typical Operating Circuit”. Nevertheless, terminate C3 to GND if possible, as slightly better performance results from this configuration. Powerdown Functionality The already low current requirement drops significantly when the device enters powerdown mode. In powerdown, supply current drops to 1µA, because the on-chip charge pump turns off (V+ collapses to VCC, V- collapses to GND), and the transmitter and receiver outputs three-state. This micro-power mode makes these devices ideal for battery powered and portable applications. Software Controlled (Manual) Powerdown The ICL3310E may be forced into its low power, standby state via a simple shutdown (SHDN) pin (see Figure 4). Driving this pin high enables normal operation, while driving it low forces the IC into it’s powerdown state. The time required to exit powerdown, and resume transmission is less than 50µs. Connect SHDN to VCC if the powerdown function isn’t needed. VCC VCC TRANSITION DETECTOR CURRENT FLOW VCC TO WAKE-UP LOGIC VOUT = VCC Rx ICL3310E V- VCC POWERED DOWN UART RX Tx GND ±5V RS-232 output swings are acceptable, and transmitter pull-up resistors aren’t required, the ICL3310E should work in most 5V applications. SHDN = GND OLD RS-232 CHIP VOUT = HI-Z POWERED DOWN UART TX FIGURE 2. POWER DRAIN THROUGH POWERED DOWN PERIPHERAL FIGURE 3. DISABLED RECEIVERS PREVENT POWER DRAIN 5 ICL3310E that the transmitters enable only when the magnitude of the supplies exceed approximately 3V. SHDN PWR MGT LOGIC 5V/DIV SHDN ICL3310E I/O UART T1 2V/DIV CPU T2 VCC = +3.3V C1 - C4 = 0.1µF TIME (20µs/DIV) FIGURE 4. CONNECTIONS FOR MANUAL POWERDOWN FIGURE 5. TRANSMITTER OUTPUTS WHEN EXITING POWERDOWN Capacitor Selection The charge pumps require 0.1µF or greater capacitors for operation with 3.3V ≤ VCC ≤ 5.5V. Increasing the capacitor values (by a factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. C2, C3, and C4 can be increased without increasing C1’s value, however, do not increase C1 without also increasing C2, C3, and C4 to maintain the proper ratios (C1 to the other capacitors). When using minimum required capacitor values, make sure that capacitor values do not degrade excessively with temperature. If in doubt, use capacitors with a larger nominal value. The capacitor’s equivalent series resistance (ESR) usually rises at low temperatures and it influences the amount of ripple on V+ and V-. Operation Down to 2.7V ISL3310E transmitter outputs meet RS-562 levels (±3.7V), at the full data rate, with VCC as low as 2.7V. RS-562 levels typically ensure interoperability with RS-232 devices. High Data Rates The ICL3310E maintains the RS-232 ±5V minimum transmitter output voltages even at high data rates. Figure 6 details a transmitter loopback test circuit, and Figure 7 illustrates the loopback test result at 120kbps. For this test, all transmitters were simultaneously driving RS-232 loads in parallel with 1000pF, at 120kbps. Figure 8 shows the loopback results for a single transmitter driving 1000pF and an RS-232 load at 250kbps. The static transmitter was also loaded with an RS-232 receiver. VCC + C1 Transmitter Outputs when Exiting Powerdown Figure 5 shows the response of two transmitter outputs when exiting powerdown mode. As they activate, the two transmitter outputs properly go to opposite RS-232 levels, with no glitching, ringing, nor undesirable transients. Each transmitter is loaded with 3kΩ in parallel with 2500pF. Note 6 C1+ VCC V+ C1+ C2 ICL3310E V- C2+ C2- Power Supply Decoupling In most circumstances a 0.1µF bypass capacitor is adequate. In applications that are particularly sensitive to power supply noise, decouple VCC to ground with a capacitor of the same value as the charge-pump capacitor C1. Connect the bypass capacitor as close as possible to the IC. + 0.1µF TIN ROUT + C3 C4 + TOUT RIN 1000pF 5K VCC SHDN FIGURE 6. TRANSMITTER LOOPBACK TEST CIRCUIT ICL3310E ±15kV ESD Protection 5V/DIV All pins on ICL3310 devices include ESD protection structures, but the ICL3310E incorporates advanced structures which allow the RS-232 pins (transmitter outputs and receiver inputs) to survive ESD events up to ±15kV. The RS-232 pins are particularly vulnerable to ESD damage because they typically connect to an exposed port on the exterior of the finished product. Simply touching the port pins, or connecting a cable, can cause an ESD event that might destroy unprotected ICs. These new ESD structures protect the device whether or not it is powered up, protect without allowing any latchup mechanism to activate, and don’t interfere with RS-232 signals as large as ±25V. T1IN T1OUT R1OUT VCC = +3.3V C1 - C4 = 0.1µF 5µs/DIV Human Body Model (HBM) Testing FIGURE 7. LOOPBACK TEST AT 120kbps 5V/DIV T1IN T1OUT As the name implies, this test method emulates the ESD event delivered to an IC during human handling. The tester delivers the charge through a 1.5kΩ current limiting resistor, making the test less severe than the IEC61000 test which utilizes a 330Ω limiting resistor. The HBM method determines an ICs ability to withstand the ESD transients typically present during handling and manufacturing. Due to the random nature of these events, each pin is tested with respect to all other pins. The RS-232 pins on “E” family devices can withstand HBM ESD events to ±15kV. IEC61000-4-2 Testing R1OUT VCC = +3.3V C1 - C4 = 0.1µF 2µs/DIV FIGURE 8. LOOPBACK TEST AT 250kbps Interconnection with 3V and 5V Logic The ICL3310E directly interfaces with 5V CMOS and TTL logic families. Nevertheless, with the device at 3.3V, and the logic supply at 5V, AC, HC, and CD4000 outputs can drive ICL3310E inputs, but ICL3310E outputs do not reach the minimum VIH for these logic families. See Table 4 for more information. TABLE 3. LOGIC FAMILY COMPATIBILITY WITH VARIOUS SUPPLY VOLTAGES VCC SYSTEM POWER-SUPPLY SUPPLY VOLTAGE VOLTAGE (V) (V) 3.3 3.3 5 5 5 3.3 COMPATIBILITY Compatible with all CMOS families. Compatible with all TTL and CMOS logic families. Compatible with ACT and HCT CMOS, and with TTL. ICL3310E outputs are incompatible with AC, HC, and CD4000 CMOS inputs. 7 The IEC61000 test method applies to finished equipment, rather than to an individual IC. Therefore, the pins most likely to suffer an ESD event are those that are exposed to the outside world (the RS-232 pins in this case), and the IC is tested in its typical application configuration (power applied) rather than testing each pin-to-pin combination. The lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than the HBM test. The extra ESD protection built into this device’s RS-232 pins allows the design of equipment meeting level 4 criteria without the need for additional board level protection on the RS-232 port. AIR-GAP DISCHARGE TEST METHOD For this test method, a charged probe tip moves toward the IC pin until the voltage arcs to it. The current waveform delivered to the IC pin depends on approach speed, humidity, temperature, etc., so it is difficult to obtain repeatable results. The “E” device RS-232 pins withstand ±15kV air-gap discharges. CONTACT DISCHARGE TEST METHOD During the contact discharge test, the probe contacts the tested pin before the probe tip is energized, thereby eliminating the variables associated with the air-gap discharge. The result is a more repeatable and predictable test, but equipment limits prevent testing devices at voltages higher than ±8kV. All “E” family devices survive ±8kV contact discharges on the RS-232 pins. ICL3310E Typical Performance Curves VCC = 3.3V, TA = 25°C 25 VOUT+ 4.0 20 2.0 SLEW RATE (V/µs) TRANSMITTER OUTPUT VOLTAGE (V) 6.0 1 TRANSMITTER AT 250kbps 1 TRANSMITTER AT 30kbps 0 -2.0 15 -SLEW +SLEW 10 VOUT - -4.0 -6.0 0 1000 2000 3000 4000 5 5000 0 1000 FIGURE 9. TRANSMITTER OUTPUT VOLTAGE vs LOAD CAPACITANCE 3.5 40 30 25 120kbps 20 15 4000 5000 NO LOAD ALL OUTPUTS STATIC 3.0 250kbps 35 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 3000 FIGURE 10. SLEW RATE vs LOAD CAPACITANCE 45 20kbps 10 2.5 2.0 1.5 1.0 0.5 5 0 2000 LOAD CAPACITANCE (pF) LOAD CAPACITANCE (pF) 0 1000 2000 3000 4000 5000 LOAD CAPACITANCE (pF) FIGURE 11. SUPPLY CURRENT vs LOAD CAPACITANCE WHEN TRANSMITTING DATA Die Characteristics SUBSTRATE POTENTIAL (POWERED UP) GND TRANSISTOR COUNT 338 PROCESS Si Gate CMOS 8 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 SUPPLY VOLTAGE (V) FIGURE 12. SUPPLY CURRENT vs SUPPLY VOLTAGE 6.0 ICL3310E Small Outline Plastic Packages (SOIC) N INDEX AREA 0.25(0.010) M H M18.3 (JEDEC MS-013-AB ISSUE C) B M 18 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE E INCHES -B- 1 2 3 L SEATING PLANE -A- h x 45o A D -C- e µα A1 B 0.25(0.010) M 0.10(0.004) C A M MIN MAX MIN MAX NOTES A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - B 0.013 0.0200 0.33 0.51 9 C 0.0091 0.0125 0.23 0.32 - D 0.4469 0.4625 11.35 11.75 3 E 0.2914 0.2992 7.40 7.60 4 e C B S 0.050 BSC 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 9 1.27 BSC - H 0.394 0.419 10.00 10.65 - h 0.010 0.029 0.25 0.75 5 L 0.016 0.050 0.40 1.27 6 8o 0o N NOTES: MILLIMETERS SYMBOL α 18 0o 18 7 8o Rev. 0 12/93 ICL3310E Shrink Small Outline Plastic Packages (SSOP) M20.209 (JEDEC MO-150-AE ISSUE B) N 20 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INDEX AREA H 0.25(0.010) M B M INCHES E -B1 2 3 0.25 0.010 SEATING PLANE -A- SYMBOL GAUGE PLANE L A D -C- α e B C 0.10(0.004) 0.25(0.010) M C A M B S MAX MILLIMETERS MIN MAX NOTES A 0.068 0.078 1.73 1.99 A1 0.002 0.008’ 0.05 0.21 A2 0.066 0.070’ 1.68 1.78 B 0.010’ 0.015 0.25 0.38 C 0.004 0.008 0.09 0.20’ D 0.278 0.289 7.07 7.33 3 E 0.205 0.212 5.20’ 5.38 4 e A2 A1 MIN 0.026 BSC 0.65 BSC H 0.301 0.311 7.65 7.90’ L 0.025 0.037 0.63 0.95 8 deg. 0 deg. N α 20 0 deg. 9 6 20 7 8 deg. NOTES: Rev. 3 11/02 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10