nr421a ds en

Buck type Synchronous Switching Regulator IC
NR421A
DATA SHEET
General Descriptions
The NR421A is Synchronous Rectification buck
regulator ICs integrates PowerMOSFETs. With the
current mode control, low ESR capacitors such as
ceramic capacitors can be used. It has achieved a
high efficiency by the synchronous rectification
system. The ICs have protection functions such as
Over-Current Protection (OCP), Under-Voltage
Lockout (UVLO) and Thermal Shutdown (TSD).
Soft starting time can be set up by selecting an
external capacitor value. The ON/OFF pin (EN Pin)
turns the regulator ON/OFF. The NR421A is
available in an 8-pin HSOP package with an exposed
thermal pad on the back side.
Features & Benefits
● For excellent heat dissipation, HSOP8 package with
the heat-slug is adopted.
● Current mode PWM control
● Up to 94% efficiency
● Stable with low ESR ceramic output capacitors
● Built-in protection function
Drooping type Over Current Protection (OCP) with
Auto-restart
Thermal Shutdown (TSD) with Auto-restart
Under Voltage Lockout(UVLO)
● By the internal Phase Compensation, external
component count reduction
● Adjustable Soft-Start with an external capacitor
● Output ON/OFF function (Enable)
Package
● HSOP8
Thermally enhanced 8-Pin package
*Image: Not to scale
Electrical Characteristics
● Input voltage range VIN = 4.5 to 18V
● Output voltage range VO=0.8V to 14V
● Operation Frequency FSW= 350kHz Fixed
Applications
● LCD-TV
● Blu-ray
● Power supply for digital consumer
Basic Circuit Connection
NR421A
NR421A-DSE Rev.1.2
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CONTENTS
General Descriptions ------------------------------------------------------------------------------------------ 1
1. Electrical Characteristics -------------------------------------------------------------------------------- 3
1.1 Absolute Maximum Ratings ----------------------------------------------------------------------- 3
1.2 Recommended Operating Conditions ----------------------------------------------------------- 3
1.3 Electrical Characteristics -------------------------------------------------------------------------- 4
2. Block Diagram & Pin Functions ----------------------------------------------------------------------- 5
2.1 Block Diagram --------------------------------------------------------------------------------------- 5
2.2 Pin Asignments & Functions ---------------------------------------------------------------------- 6
3. Typical Application Circuit ----------------------------------------------------------------------------- 7
4. Allowable package power dissipation ----------------------------------------------------------------- 7
5. Package Outline ------------------------------------------------------------------------------------------- 9
5.1 Outline, Size ------------------------------------------------------------------------------------------ 9
6. Marking --------------------------------------------------------------------------------------------------- 10
7. Operational Descriptions ------------------------------------------------------------------------------ 11
7.1 PWM(Pulse Width Modulation) Output Control ------------------------------------------- 11
7.2 Enable Function (EN:Remote ON / OFF operation of the Regulator) ------------------ 12
7.3 Soft-start Function (SS) -------------------------------------------------------------------------- 13
7.4 Over Current Protection (OCP) ---------------------------------------------------------------- 15
7.5 Thermal Shutdown (TSD) ----------------------------------------------------------------------- 15
8. Design Notes ---------------------------------------------------------------------------------------------- 16
8.1 External Components ---------------------------------------------------------------------------- 16
8.1.1
Inductor L1 ----------------------------------------------------------------------------------- 16
8.1.2
Input Capacitor CIN ------------------------------------------------------------------------- 19
8.1.3
Output Capacitor CO ----------------------------------------------------------------------- 19
8.1.4
Output Voltage Setup Resistor RFB1 & RFB2 ------------------------------------------- 21
8.1.5
External Bootstrap Diode for Low Input Voltage------------------------------------- 23
8.1.6
Free-wheeling diode D1 (option) --------------------------------------------------------- 23
8.2 Pattern Design ------------------------------------------------------------------------------------- 24
8.2.1
Input / Output Capacitors(CIN,CO) ------------------------------------------------------ 24
8.2.2
PCB Layout & Recommended Land Pattern ------------------------------------------ 25
8.3 Applied Design ------------------------------------------------------------------------------------- 27
8.3.1
Spike Noise Reduction(1) ------------------------------------------------------------------ 27
8.3.2
Spike Noise Reduction(2) ------------------------------------------------------------------ 27
8.3.3
Attention about the insertion of the bead-core ---------------------------------------- 28
8.3.4
Reverse Bias Protection -------------------------------------------------------------------- 28
9. Typical characteristics (Ta=25°C) ------------------------------------------------------------------- 29
10. Packing specifications ---------------------------------------------------------------------------------- 31
10.1 Taping & Reel outline ---------------------------------------------------------------------------- 31
IMPORTANT NOTES ------------------------------------------------------------------------------------- 32
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1.
Electrical Characteristics
1.1
Absolute Maximum Ratings
● The polarity value for current specifies a sink as “+” and a source as “−”, referencing the IC.
● Ta=25°C,unless otherwise noted.
Parameter
Symbol
Ratings
Units
DC input voltage
VIN
0.3 to 20
V
BS terminal voltage
VBS
SW terminal voltage
VSW
FB terminal voltage
EN terminal voltage
SS terminal voltage
VFB
VEN
VSS
0.3 to
25.5
0.3 to 6.0
7.5
1 to 20
2 to 20
4 to 20
0.3 to 5.5
0.3 to20
0.3 to 3.5
BS to SW voltage
VBS-SW
V
V
V
DC
* Pulse Width Limitation ≦30[ns]
DC
* Pulse Width Limitation ≦100[ns]
* Pulse Width Limitation ≦10[ns]
V
V
V
(1)
PD
2.97
W
Junction temperature
(2)
TJ
40 to 150
°C
Tstg
40 to 150
°C
Thermal resistance (Junction to GND
θJP
11
Lead)
Thermal resistance (Junction to
θJA
42
Ambient air)
(1)
Limited by thermal shutdown.
(2)
The temperature detection of thermal shutdown is about 165°C.
1.2
V
Power dissipation
Storage temperature
Conditions
Glass-epoxy board mounting in a 40×40mm.
* The implementation in our Demo- Board,
Tj=150°C
°C /W
°C /W
Glass-epoxy board mounting in a 40×40mm.
* The implementation in our Demo- Board.
Recommended Operating Conditions
Operating IC in recommended operating conditions is required for normal operating of circuit functions shown in
the electrical characteristics.
Parameter
DC input voltage range
Symbol
(3)
DC output voltage range
Ratings
Units
MIN
MAX
VIN
VO+3
18
V
VO
0.8
14
V
IO
0
3.0
A
Conditions
(4)
DC output current range
(5)
(5)
Operating ambient temperature
Ta
85
°C
40
(3)
The minimum value of input voltage is taken as the larger one of either 4.5V or VO +3V.
In the case of VIN=VO +1 to VO +3V , it is set to IO = Max. 2A.
(4)
Refer to typical Application Circuit (Fig3-1).
(5)
To be used within the allowable package power dissipation characteristics (Fig4-1).
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1.3
Electrical Characteristics
● The polarity value for current specifies a sink as “+” and a source as “−”, referencing the IC.
● Ta=25°C,unless otherwise noted.
Parameter
MIN
Ratings
TYP
MAX
VREF
0.784
0.800
0.816
V
⊿VREF /⊿T
-
±0.05
-
mV/°C
Symbol
Reference voltage
Reference voltage temperature
coefficient
Switching frequency
Units
fsw
280
350
420
kHz
Test conditions
VIN = 12V,Io = 0.1A
VIN = 12V, Io = 1.0A
-40°C to +85°C
VIN=12V, Vo=3.3V,
IO=1A
VIN= 6.3V to 18V,
Vo=3.3V, IO=1A
VIN=12V, Vo=3.3V,
IO=0.1A to 3.0A
Line regulation
(5)
VLine
-
50
-
mV
Load regulation
(5)
VLoad
-
50
-
mV
Over current protection
threshold
IS
3.1
6.0
A
Supply Current
IIN
-
-
mA
VIN= 12V, EN: 10kΩ Pull
up toVIN)
Shutdown Supply Current
IIN(off)
0
10
μA
VIN=12V, VEN=0V, Io=0A
Input UVLO Threshold
Vuvlo
4
4.4
V
VIN Rising
SS
terminal
EN
terminal
Source current at low
level voltage
6
VIN=12V, Vo=3.3V
ISS
6
10
14
μA
VSS=0V, VIN=12V
VSSH
-
3.0
-
V
VIN=12V
Sink current
IEN
-
50
100
μA
VEN= 10V
Threshold voltage
VEN
0.7
1.4
2.1
V
VIN=12V
Open voltage
Maximum ON duty
(6)
DMAX
-
90
-
%
VIN=12V
Minimum ON time
(6)
TON(MIN)
-
150
-
nsec
VIN=12V
(6)
TSD
151
165
-
°C
VIN=12V
(6)
TSD_hys
-
20
-
°C
VIN=12V
On-resistance of Hi-side MOSFET
(6)
RonH
-
110
-
mΩ
VIN=12V
On-resistance of Lo-side MOSFET
(6)
RonL
-
85
-
mΩ
VIN=12V
Thermal shutdown threshold
temperature
Thermal shutdown restart
temperature hysteresis
(6)
Guaranteed by design,not tested.
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2.
2.1
Block Diagram & Pin Functions
Block Diagram
Fig. 2-1
NR421A Block diagram
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2.2
Pin Asignments & Functions
SS
1
BS
2
8 NC
7 FB
NR421A
SW
3
GND 4
Fig. 2-2
6 EN
5 IN
Pin Assignments
Pin No.
Symbol
Functions
1
SS
Soft-Start control input.
To set the soft-start period, connect to a capacitor between GND.
2
BS
Hi-side Boost Input.
A BS terminal supplies the drive power of the internal PowerMOSFET.
Connect a capacitor between the SW terminal and the BS terminal.
3
SW
Power switching output.
SW supplies power to the output.
Connect the LC filter from SW to the output.
4
GND
5
IN
6
EN
7
FB
Ground.
*Connect the exposed pad of back side to Pin No.4.
Power input.
VIN supplies the power to the internal control circuit and the powerMOSFET.
Enable control input.
By setting the EN pin to high level, the regulator turns on. By setting to low level, it turns off.
Feedback input Pin for compare Reference Voltage.
The feedback threshold voltage (VREF) is 0.8V. To set the output voltage, the FB pin
requires to connect voltage divider resistor RFB1 and RFB2.
8
NC
No connection
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3.
Typical Application Circuit
Standard connection is shown in Fig3-1.
Fig. 3-1
NR421A Standard connection
REN:100kΩ
L: 10μH
CIN: 2×10μF / 25V
CO: 2×22μF / 16V
CBS: 0.1μF
CSS: 0.1μF
RBS:≦22Ω
*As for the circuit diagram of the Demo-Board, please refer to the Demo-Board circuit diagram of the "8.2.2
mounting board pattern example" section.
4.
Allowable package power dissipation
Power Dissipation PD [W]
3.5
3
2.5
2
1.5
1
0.5
0
-40
-20
0
20
40
60
80
100
120
Ambient temperature Ta [℃]
Fig. 4-1
Allowable package powe disspation of NR421A
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Notes:
1) Because the Fig4-1 is defined in "PD=2.97[W]" at "Tj=125 [°C]", please keep enough margin when you use.
2) With glass-epoxy PCB: Size=40×40mm, Copper foil area=25×25mm.
3) Losses can be calculated by the following equation. In addition, efficiency ηx will vary depending on the conditions
of the input voltage, output current. By measuring the ηx in the actual operation, assigns a numerical value to the
equation (1) , as a ηx remain of percent display.
(1)
VO: Output voltage
Main sources of heat generation are an inductor which is flowing
the load current , and the IC which has the PowerMOSFET and
the control circuit.
By subtracting the steady loss of the inductor from the overall
efficiency, the loss of the IC is calculated by equation (1).
If following situations are ...VO = 5[V], IO = 3[A] continuous,
the inductor DCR = 40[mΩ],
the Loss of IC when the overall efficiency is 94 percent,
it will be 0.597[W] from the equation (1).
NR421A-DSE Rev.1.2
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2016.04.27
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VIN: Input voltage
IO: Output current
ηx: Efficiency(%)
L(DCR):DC serial resistance of
inductor (Ω)
8
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5.
Package Outline
5.1
Outline, Size
 HSOP8 Package
8
7
6
5
Chase
number
Top view
1
2
3
4
Side view2
Side view 1
Back side view
Notes:
1) Dimension is in millimeters (mm)
2) Drawing is not to scale.
Fig. 5-1
HSOP8 Package outline
NR421A-DSE Rev.1.2
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6.
Marking
As for the Marking, the product name and lot number, those are laser marking to mold package surface.
*1. Product name
*2. Lot number (3 digits)
The 1st letter : Last one digit of the year (Y)
The 2nd letter : manufacturing Month (M)
Jan - Sep:1 – 9
Oct:O
Nov:N
Dec:D
The 3rd letter : manufacturing Week (W)
First week - Fifth week:1 - 5
*1
NR421A
SK *2
*3
*3. Our control number (4 digits)
Fig. 6-1
NR421A-DSE Rev.1.2
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Marking Specification
10
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7.
Operational Descriptions
The Characteristic value of, unless otherwise noted, it writes the TYP value in accordance with the NR421A
specifications.
7.1
PWM(Pulse Width Modulation) Output Control
The NR421A series consist of three blocks; two feedback loops (voltage control and current control) and one slope
compensation. The PWM is controlled with the current mode control by calculating the voltage feedback control, and
the current feedback control and the slope compensation signals (Fig7-1). For the voltage feedback control, the output
voltage feed back to the PWM control. The error amplifier compares the output voltage divided by resistors with the
reference voltage VREF = 0.8V. For the current feedback control, the inductor current feed back to the PWM control.
The inductor current divided by Sense-MOSFET is detected with the current sense amplifier. To prevent
sub-harmonic oscillations, which is characteristic in current mode control, the slope of current control is compensated.
CIN
VIN
REN
CBS
L1
D1
RFB1
VO
CO
RFB2
CSS
Fig. 7-1
Basic Structure of Chopper Type Regulator with PWM Control by Current Control
The NR421A series start the switching operation when UVLO is released, or EN or SS Pin voltage exceeds the
threshold. Initially, it operates switching with minimum ON duty or maximum ON duty. The high-side switch (M1) is
the switching MOSFET that supplies output power. At first, the low-side switch (M2) turns ON and charges the boost
capacitor C10 that drives M1. When M1 is ON, as the inductor current is increased by applying voltage to SW Pin and
the inductor, the output of inductor current sense amplifier is also increased. Sum of the current sense amplifier output
and slope compensation signal is compared with the error amplifier output. When the summed signal exceeds the
error amplifier (Error Amp.) output voltage, the current comparator output becomes “High” and the RS flip-flop is
reset. When M1 turns OFF and M2 turns ON, the regenerative current flows through M2. In the case that an external
SBD (D1) is connected, the current also flows through D1.
In NR421A series, the set signal is generated in each cycle and RS flip-flop is set. In the case that the summed signal
does not exceed the error amplifier (Error Amp.) output voltage, RS flip-flop is reset without fail by the signal from
OFF duty circuit.
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7.2
Enable Function (EN:Remote ON / OFF operation of the Regulator)
In the condition that the EN terminal is connected to the IN terminal, when the input voltage V IN is increased beyond
4V(typ.), the UVLO is released and started the switching operation. And, in the condition that the input voltage V IN is
applied beyond 6V(typ.), when the EN terminal voltage exceeds 1.4V (typ.), it is started the switching operation.
VIN
VIN
REN
REN
IN
EN
IN
EN
GND
GND
(A)
Fig. 7-2
(B)
Remote ON/OFF operation by EN terminal
The Fig7-2(B) is the option of the "Remote ON/OFF control" by using the EN terminal. By using switch such as
Open-collector and, by removing the EN terminal voltage VEN to GND level (Low), it is possible to turn OFF. In case
of without ON / OFF operation by external signal, please use the Fig7-2 (A) connection. It is started by the applying
of the VIN, and it is stopped by shut-off of the VIN. REN1 is recommended 100[kΩ].
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7.3
Soft-start Function (SS)
By connecting a capacitor between the SS terminal and the GND terminal, when the input voltage is supplied to the
IC, the soft-start function will be effective.The output voltage (Vo) is ramped up by the charging voltage level of Css.
Because the internal constant current source ISS supplied from the SS terminal is 10 μA, the soft-start period depends
on the charging time constant of the CSS. When the charging of CSS is started by the constant current ISS, the SS
terminal voltage VSS is linearly increased. The soft-start period is the time that the VSS passes between the "Soft-start
start threshold voltage VSS1(=0.9V)" and "Soft-start completion threshold voltage VSS2(=1.79V)". During the Soft-start,
the rise-time is controlled by controlling the OFF period of PWM control. The rise time t_SS and the delay time t_delay
are calculated in the following equations…
(2)
Note: VSS1(=0.9V) ≦VSS≦ VSS2 (=1.79V), ISS=10μA
(3)
Note: the period of 0V ≦VSS<VSS1 (0.9V), ISS=10μA
The rise time of the output voltage Vo is " t_delay + tSS ".
Fig. 7-3
The timing chart of the Soft-start in the normal startup
Vss
Vss
Vss2=1.79V
Vss2=1.79V
Vss1=0.9V
Vss1=0.9V
T
Vo
Vo
T
Fig. 7-4
T
T
The occurrence of the overshoot on Vo rising waveform
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Adjust the capacitance of CSS so that the excessive overshoot may not occur on the Rising-Waveform of the output
voltage Vo at the start-up. The overshoot occurs when tss is short.If the soft-start is finished before the constant
voltage control follows Vo rising speed,it may become such waveform of Fig7-4. When a capacitance of the CSS is
increased, though the overshoot will not occur , please understand that the start-up time is longer. In actual operation,
please confirm the Rising-waveform, and adjust the capacitance of the CSS.
Note: About CSS discharge to restart
It is explained about discharging of the CSS capacitor when this IC is restarted such as ON/OFF operation in the EN
terminal. When it was restarted, there is a case where the voltage is remaining in the soft-start capacitor CSS. In this IC,
it has adopted the forced discharge sequence as shown in the Fig7-5. By the internal impedance, after once
discharging the SS terminal voltage to 0.9V or less, and then resume the soft-start.
Discharge of the capacitor Css, it is discharged by the internal impedance 6.1k Ω (typ) in the IC.
VEN=1.4V
Discharge by internal
impedance
VSS=3V
VSS2=1.79V
VSS1=0.9V
Fig. 7-5
Discharge of the capacitor Css at restart
Under the condition that the voltage is remaining in the Css, after the ON-signal is inputted, it takes the time of
“t_discharge+tss” until Vo-waveform rise and stabilize. The soft-start capacitor Css has been charged to the internal
regulator voltage 3V.
It considers the discharge from the condition that the soft-start capacitor CSS has been charged up to 3V in the steady
condition. The SS terminal voltage VSS at optional time t after the start of discharge will be calculated by the equation
(4). For the time t_discharge that the VSS is discharged to 0.9V from 3V, it can be calculated by equation (5).
Ω
Ω
(4)
(5)
When there is a mode for continuous “ON/OFF” operation, consider delay by discharging of the C SS.
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7.4
Over Current Protection (OCP)
The OCP characteristic example is shown in Fig7-6. The NR421A integrates the drooping type over-current
protection circuit. The peak current of switching transistor is detected. When the peak current exceeds rated value, the
over-current protection limits the current by forcibly shortening the ON time of transistor and decreasing the output
voltage. It prevents the current increment at low output voltage by decreasing the switching frequency (FDOWN Mode),
if the output voltage drops lower (The FB terminal voltage decreases to 0.57V from 0.8V). When the over-current
state is released, the output voltage automatically recovers.
Output Voltage VO [V]
The ON period is narrowed.
If the VFB falls below
0.57V, it decreases
switching frequency.
* In terms of VO, it will
be "VO × 71.2%".
Output Current IO [A]
Fig. 7-6
7.5
The OCP characteristic example
Thermal Shutdown (TSD)
The thermal shutdown circuit detects the IC junction
temperature. When the junction temperature exceeds
the rated value (around 165°C), it shuts-down the output
transistor and turns the output OFF. If the junction
temperature falls below the thermal shutdown rated value
by around 20°C, the operation returns automatically.
* (Thermal Shutdown Characteristics)
Notes
The circuit protects the IC against temporary heat
generation. It does not guarantee the operation including
reliabilities under the continuous heat generation
conditions, such as short circuit for a long time.
Output
Voltage
出力電圧
Restart
setup
復帰設定温度
temperature
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Shutdown
setup
保護設定温度
temperature
Junction
temperature
接合温度
Fig. 7-7
TSD Operation
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8.
Design Notes
8.1
External Components
All components are required for matching to the condition of use.
8.1.1
Inductor L1
The Inductor is one of the most important components in the Buck regulators. In order to maintain the stabilized
regulator operation, the Inductor should be carefully selected so it must not saturate or overheat excessively at any
conditions. Please select an inductor with care to 8 items listed below.
 It is for switching regulator use only
Because the coil for the noise filter (For EMI Countermeasure) has large loss and large heat generation, please do not
use.
 Avoidance of sub-harmonic oscillation
Under the peak detection current control, when the control Duty is more than 0.5 in use conditions, the inductor
current may fluctuate at a frequency that is an integer multiple of switching operation frequency. This phenomenon is
the known as sub-harmonic oscillation and this phenomenon theoretically occurs in the peak detection current control
mode. In order to stabilize the operation, although the inductor current compensation is made internally, the
inductance corresponding to the output voltage should be selected as an application. Specifically, for slope
compensation amount is fixed in the IC, it is necessary to moderate the slope of the inductor current. The ripple
portion of Inductor current ΔIL and the peak current ILP are calculated from the following equations:
Large Inductance
small Inductance
Δ
(6)
Δ
(7)
Fig. 8-1
Relationship between the inductance
and ripple current ΔIL
According to the equations, if the inductance of the inductor L is small, both ΔI L and ILP is increased. Consequently,
the inductor current becomes very steep if inductance is too small, so that the operation of the converter might become
unstable. It is necessary to take care of an inductance decrease due to magnetic saturation such as in overload and load
shortage. To prevent subharmonic oscillation, specify the condition of the slope of the inductor current by referring to
Table8-1.
Table. 8-1 Condition of “D≧0.5”
Slope of the
inductor current
ΔIL(A)
K(A/μS)
18
14
0.78
2.777
0.178
0.494
18
12
0.67
2.380
0.311
0.740
18
10
0.56
1.983
0.498
0.988
15
12
0.80
2.856
0.156
0.446
12
9
0.75
2.678
0.207
0.554
10
7
0.70
2.499
0.267
0.667
9
6
0.67
2.380
0.311
0.740
9
5
0.56
1.983
0.498
0.988
8
5
0.63
2.231
0.373
0.832
* As for as necessary inductance, select the same value or larger value in Table8-1.
VIN(V)
Vo(V)
Duty D
TON(MAX)
(μS)
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Necessary
inductance
(μH)Typ
22.48
19.30
16.07
19.24
14.50
11.24
9.65
8.04
8.05
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For Table 8-1, K is the specified value. It is recommended to below this value. For any values other than the ones
combined in the Table8-1, please consider the values close to those ones. It is the combination under the condition of
“VIN≧Vo+3V” in the specification. Table8-1 has been calculated by the following equation.
(8)
(9)
※FSW(MIN):This is the lower limit of the switching frequency. Please refer to the electrical characteristics list.
Δ
(10)
∴Inductance L of the inductor can be calculated by the following equation.
(11)
Δ

Inductance calculation in the normal state
Inductance value of the inductor in the conditions of "Duty <0.5", it will be calculated in the condition of
"Duty D≧0.5" similarly to the above equation (11). ΔIL/Io is the ratio of ΔIL against the maximum load current Io to
use. In case of "ΔIL/Io = 0.2", the necessary inductance is shown as the reference in Table8-2.
Table. 8-2 Condition of “D<0.5” and “ΔIL/Io=0.2”
Necessary
ΔIL/Io
VIN(V)
VO(V)
Duty D
Io(A)
ΔIL(A)
inductance
(example)
(μH)Typ
18
5
0.28
3
0.2
0.6
21.49
18
3.3
0.18
3
0.2
0.6
16.04
15
5
0.33
3
0.2
0.6
19.84
12
5
0.42
3
0.2
0.6
17.36
12
3.3
0.28
3
0.2
0.6
14.24
8
3.3
0.41
3
0.2
0.6
11.54
7
3.3
0.47
3
0.2
0.6
10.38
5
2
0.40
3
0.2
0.6
7.14
5
1.8
0.36
3
0.2
0.6
6.86
5
1.2
0.24
3
0.2
0.6
5.43
* As for as necessary inductance, select the same value or larger value in Table8-2.
Δ
Δ
(12)
※In case of "ΔIL/IO=0.3" and "IO(Max)=3A", the setting of the ΔI L is calculated at 0.3 × 3A = 0.9A.
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 ΔIL/Io Ratio
When ΔIL/IO ratio is large, the nescessary inductance decreases. However, there is a matter of trade-off. For example,
the output ripple voltage increases. When ΔIL/IO ratio is small, the necessary inductance increases, and the outline of
the inductor becomes larger. Conventionally, ΔIL/IO ratio setting of 0.2 to 0.3, it is regarded as a setting for good cost
performance .
 Wire diameter of the inductor
When enlarging inductance, if the outline of the inductor is identical, number of winding increases and
winding-wire’s diameter becomes narrower. Because the Direct Current Resistance ”DCR” increases , so that it
becomes impossible to make a large current flow. But,when giving priority to Low-DCR, the core size becomes
larger.
 DC superimposition characteristics
Depending on the material or shape of the core, the inductance of inductor has DC superposition characteristics that
decreases gradually by the flowing DC current. Be sure to confirm if the inductance value is significantly lower than
the design value when making the maximum load current for practical use flow. Obtain the data of the DC
superposition characteristics including graphs from the manufacturer of the coil to understand the characteristics of
the Inductor used in advance. In doing so, important parameters are:
1) Saturation point...At what amperes does magnetic saturation occur?
2) Inductance fluctuation with the practical load current
For example, for using it up to 3 A in the actual load Io, it can not use the Inductor which the saturation point is such
as 2A. In addition, in spite of having an inductance of 10 μH at the no-load, please pay caution for the thing which has
the characteristic that it decreases to such as 5μH by the superposition current of 1A.
 Less noise
If the core is the open magnetic circuit type shaped like a drum, the magnetic flux passes outside the Inductor, so that
the peripheral circuit might be damaged due to noise. Use the Inductor which has a core/structure of the low-leakage
magnetic flux type. For details, consult the manufacturer of the Inductor.
 Heat generation
In actuality, when using the coil for mounting the PCB, heat generation of the coil main body might be influenced by
peripheral parts. In most cases, temperature rise of the coil includes the Inductor’s own heat generation, and there are
temperature limitations such as below:
1) onboard(Cars) grade product: 150°C
2) highly-reliable product: 125°C
3) general product: 85-100°C
Be sure to evaluate heat generation because temperature rise differs when the PCB on which the Inductor is mounted
is designed differently.In general, Inductors with a smaller DCR value on the specification sheet have smaller loss.
* Select the most appropriate one in consideration of the conditions of use, mounting, heat dissipation, etc.
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8.1.2
Input Capacitor CIN
Please use the ceramic capacitor to the input capacitor. It will lower the input impedance and it will contribute to the
stable operation of the IC. The input capacitor CIN must be arranged in as much as possible the shortest distance to
between IN - GND of the IC. Even if there is a smoothing capacitor CF in the transformer secondary side rectifying
and smoothing circuit, please place the CIN in the immediate vicinity of the IC. As a point of CIN selection, it will
include the following:
 Satisfaction of the withstand voltage and, that capacitance change with respect to the applied voltage is low
 The rate of capacity change in the ambient temperature range to be used is small
 Parts temperature which contains the heat-generation is must satisfy the specifications of the maximum
operating temperature
 Its impedance Z is sufficiently low in the temperature conditions and using frequency
In the case of CIN, if the source impedance of supplied VIN is infinitely low, the ripple current does not flow to C IN.
However, in the actual circuit, the power supply impedance is not that zero.If the power supply to the IC has been
assumed that the almost performed from CIN, it can be calculated approximately using equation (13).
[A]
(13)
* Please query the product information of the capacitor manufacturer.
* Even in the ceramic capacitor, in case of the insertion parts having a lead, its impedance will be higher than
surface-mounted type, therefore please be careful.
* In generally, in case of ceramic capacitors, the allowable ripple current is not included in the specification.
But,because it has the equivalent series resistance ESR inside, the ceramic capacitor occurs slightly heat-generation
by flowing ripple current. Therefore there is a need to comply with the maximum operating temperature containing
the heat generation. In this case, also please consider the heat conduction from the heat generating parts of the
surrounding.
Select the most suitable parts which has a margin in consideration of the use condition, the mounting condition, the
radiation condition, and so on.
8.1.3
Output Capacitor CO
In the current control mode, the feedback loop which detects the inductor current is added to the voltage control mode.
The stable operation is achieved by adding inductor current to the feedback loop without considering the effect of
secondary delay factor of LC filter. It is possible to reduce the capacitance of LC filter that is needed to make
compensations for the secondary delay, and the stable operation is achieved even by using the low ESR capacitor
(ceramic capacitor).
The output capacitor CO comprises the LC low-pass filter with the Inductor L1 and works as the rectifying capacitor
of switching output. The current equal to ripple portion ΔI L of the Inductor current charges and discharges the output
capacitor. The equivalent serial resistance ESR exists in the ceramics capacitor, and the voltage multiplied by ESR
and ΔIL becomes the output ripple voltage and it appears as VOripple.
Ω
Δ
(14)
To suppress output ripple voltage VO ripple to any value, the required ESR conditions in the ceramic capacitor can be
calculated by the following equation (15).
Ω
Δ
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(15)
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The ripple current ICOripple of the output capacitor CO is represented by the following equation.
Δ
(16)
Therefore, if the ripple portion of the inductor current ΔI L is small, the output ripple voltage VO ripple will be
relatively small. Therefore, if the ripple portion of the inductor current ΔI L is small, the output ripple voltage VO ripple
will be relatively small. If the ΔIL is large, it may be necessary to reduce the ESR such as parallel connection of the
ceramic capacitor.
In the same way as the input capacitor CIN, as the point of CO selection, it will include the following:
 Satisfaction of the withstand voltage and, that capacitance change with respect to the applied voltage is low
 The rate of capacity change in the ambient temperature range to be used is small
 Parts temperature which contains the heat-generation is must satisfy the specifications of the maximum
operating temperature
 Its impedance Z is sufficiently low in the temperature conditions and using frequency
*Please query the product information of the capacitor manufacturer
*Even in the ceramic capacitor, in case of the insertion parts having a lead, its impedance will be higher than
surface-mounted type, therefore please be careful.
*In generally, in case of ceramic capacitors, the allowable ripple current is not included in the specification.
But,because it has the equivalent series resistance ESR inside, the ceramic capacitor occurs slightly heat-generation by
flowing ripple current. Therefore there is a need to comply with the maximum operating temperature containing the
heat generation. In this case, also please consider the heat conduction from the heat generating parts of the
surrounding.
Select the most suitable parts which has a margin in consideration of the use condition, the mounting condition, the
radiation condition, and so on.
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8.1.4
Output Voltage Setup Resistor RFB1 & RFB2
The FB terminal is the feedback detection terminal that controls the output voltage. To set the output voltage Vo,
please input the divided-voltage by the voltage divider resistor to the FB terminal . Please connect voltage divider
resistor RFB1 and RFB2 for detecting, as shown in the Fig8-2.
For the stable operation of the IC, RFB1 and RFB2 should be placed to the vicinity of the IC, please do routed between
the RFB1 and VO. If the PCB pattern of the FB terminal potential (0.8V) is routed long, please note that problems may
occur such as abnormal-oscillation by the superimposition of the noise.
Make short
← wiring →
←←Make short wiring→→
Fig. 8-2
Connection of FB terminal
As a minimum setting of the IFB, it is recommended to about 0.2[mA]. The upper limit of the IFB is not particularly.
However, when larger IFB are set up, please note that the power consumption will increase and the efficiency is
decreased. RFB1, RFB2 and the output voltage VO can be calculated as following equation:
Ω
(17)
Ω
Ω
(18)
∴ Output voltage VO is represented by equation (18).
Once you have determined the RFB2 from equation (17), then, using equation (19) that is obtained by modifiying
equation (18), you can calculate the RFB1 corresponding to the VO.
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Ω
Ω
(19)
When the calculation of the above-mentioned the voltage divider resistor, the resistance may not be able to meet the
geometric series of E12 and the E24. In this case, such as the R FB1 in two series connection, please adjust the
combined resistance value. In our Demo Board PCB, It has been designed as RFB1 = R4 + R5, RFB2 = R6. Please refer
to the "Section 8.2.2 Mounting board pattern example".
(Notes)
*RFB2 is required to connect for the stable operation when set to VO = 0.8V.
*Regarding the relation of input / output voltages, it is recommended that setting of the T ON width in the switching
waveform is more than 200[nsec].
When the TON reaches the minimum-ON-time TON(MIN) in electrical characteristics, it becomes impossible to control
narrower than TON(MIN).Therefore, problems will occur to the stabilization of the output voltage VO. The following
shows the calculation method for confirmation.
One cycle T of the switching is represented by equation (20).
(20)
In addition, the relationship between the duty cycle D in the switching and the ON-time TON is expressed in equation
(21).
(21)
In NR421A, the switching frequency is 350kHz(Typ).But, when the switching frequency is 420kHz as the Fsw(Max),
the one cycle of the switching becomes the minimum. The one cycle of 420kHz can be calculated to be 2.38μs by
equation (20). The duty D that can secure 200ns T ON will be calculated by the equation (21).
μ
For example, in case of "VIN=18V", the VO setting condition that satisfies "D≧0.084" is calculated as follows:
Thus, in the above calculation example, it can not use for the V O=0.8V. In this case, lower the V IN, please use the
setting that has margin for T ON (MIN). In the case of "VO=0.8V", if it is condition of "VIN<9.5V", it will be available.
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8.1.5
External Bootstrap Diode for Low Input Voltage
Although the NR421A operates with input voltages lower than 6V, it is recommended to connect a diode between IN
Pin and BS Pin in order to enhance the efficiency (Fig8-3). Alternatively an external voltage source can be connected
through a diode to the BS Pin (Fig8-4).
Fig. 8-3
Bootstrap Diode Connection 1
Fig. 8-4
Bootstrap Diode Connection 2
Notes;
1) Externally applied voltage is valid in the case of the conditions of less than 6V. The withstand voltage of the
bootstrap diode, please use the SBD which has the same withstand voltage with BS-GND of the IC.
2) In the case of more than input voltage 6V, don't use the external power supply.
8.1.6
Free-wheeling diode D1 (option)
In general, in the case of a synchronous rectification system, the forward voltage drop V F of the body diode in the
low-side MOSFET is slightly larger than the properties of the Schottky Barrier Diode (SBD) single-item. When you
insert a SBD which has sufficient low VF characteristics between SW and GND, there is a possibility that the
efficiency is improved. However, through a predetermined dead time, and after the turn-ON of the D-S in the low-side
MOSFET, if the on-resistance RON is sufficiently low, the efficiency improvement effect of additional inserted SBD
will be only during the dead time period. In this application, additional the free-wheeling diode D1 is merely option. If
you use a D1, please set the VRM(reverse-breakdown-voltage) of the D1 to more than SW-GND breakdown-voltage of
the NR421A.
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8.2
Pattern Design
High current paths in the circuit are marked as bold lines in the circuit diagram below. These paths are required for
wide and short trace as possible. In addition, the pattern trace which is the signal system GND, and the pattern trace
which the main circuit current flows, please to so that it does not become common impedance.
Fig. 8-5
8.2.1
Note points in the wiring pattern
Input / Output Capacitors(CIN,CO)
The input capacitor CIN and the output capacitor CO are
required to connect to the IC as short as possible.
In such cases as the secondary side of the switching
power supply, when there is a filter capacitor on the input
side in advance, though it is possible that it is included
with a input capacitor for NR421A, in case of long
distance between filter capacitor and NR421A , it is
necessary to connect as “line-bypass-capacitor”,aside
from the one for the filter.
The ripple current flows to the capacitor of input and
output, you must make Low impedance and ESR.
When you design a circuit board, set to shorter length the
pattern of input and output capacitor.
In the same way,consideration is necessary for route of
the capacitor pattern.
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(A)
(B)
(A)・・・Recommended Pattern
(B)・・・No good pattern example
Fig. 8-6 CIN,CO
pattern example
24
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8.2.2
PCB Layout & Recommended Land Pattern
The pattern example of the printed circuit board for our Demo Board is shown in the following. (Double sided PCB)
Size:40mm×40mm
Base material:FR-4
Thickness:1.6mm
Copper Foil thickness:35μm
Fig. 8-7
Component mounting side (surface)
Fig. 8-8
Back side (see from surface)
Fig. 8-9 NR220, NR230, NR240, NR420 Series Common Demo-board Circuit Diagram
(Reference)
C1,C2:10μF/50V, C3:0.1μF , C4,C5:22μF/25V, C7:0.1μF, R3≦22Ω, R1:100kΩ, R4:8.2kΩ, R5:4.3kΩ
(Settings of R4 & R5, these are for the condition of VO=3.3V.) R6:3.9kΩ, L1:10μH, JP1:Open
*Part number is in accordance with the silk of the Demo-board.
(Optional parts)
C11:Phase advancing capacitor (External Phase Compensation)・・・Experimental
C12:Bypass Capacitor for IN-GND・・・Experimental
C13:Snubber circuit capacitor・・・Experimental, R10:Snubber circuit resistor・・・Experimental
R2:Open ( It is not used in the NR421A)
R3:Adjustment resistor for bootstrap capacitor discharge rate ( For the turn-on speed adjustment )
D1:The Schottky barrier diode for efficiency-improvement・・・Experimental
It is recommended the SBD which has smaller VF than the internal parasitic diode in the Lo-side MOSFET.
D2:It is SBD for external power supply for BS terminal in the low VIN condition・・・Experimental
C9,R9,C10:For External Phase Compensation Circuit (It is not used in the NR421A)
R10,R11:Overcurrent protection activation point adjustment resistor ( It is not used in the NR421A )
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Notes:
1) Dimension is in millimeters
2) Drawing is not to scale.
Fig. 8-10
Recommended Foot-printing Pattern
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8.3
8.3.1
Applied Design
Spike Noise Reduction(1)
The addition of the BS serial resistor
The “turn-on switching speed” of the internal
Power-MOSFET can be slowed down by inserting RBS
(option) of the Fig8-11.It is tendency that Spike noise
becomes small by reducing the switching-speed. Set up
22-ohm as an upper limit when you use RBS.
*Attention
1) When the resistance value of RBS is enlarged by
mistake too much, the internal power-MOSFET becomes
an under-drive,it may be damaged worst.
2) The “defective starting-up” is caused when the
resistance value of RBS is too big.
*The BS serial resistor RBS is R3 in the Demonstration
Board.
8.3.2
RBS
BS
NR421A
Fig. 8-11
SW
CBS
The addition of the BS serial resistor
Spike Noise Reduction(2)
The addition of the Snubber circuit
By adding a resistor and capacitor (RC snubber) to the
above countermeasures as shown in Fig8-12, It corrects
the output waveform and the recovery time of the diode, it
is possible to reduce the further spike noise. However,
please note that this method will slightly reduce the
efficiency.
* For observing the spike noise with an oscilloscope, the
probe lead (GND) should be as short as possible and
connected to the root of output capacitor. If the probe
GND lead is too long, the lead may act like an antenna
and the observed spike noise may be much higher and
may not show the real values.
*The snubber circuit parts are C13 and R10.
IN
SW
NR421A
GND
≒10Ω
*Option
≒1000pF
Fig. 8-12
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The addition of the Snubber circuit
27
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8.3.3
Attention about the insertion of the bead-core
Fig. 8-13
Bead core insertion prohibited area
In the area surrounded by the red dotted line within the Fig8-13, don’t insert the bead-core such as Ferrite-bead.
As for the pattern-design of printed-circuit-board, it is recommended that the parasitic-inductance of wiring-pattern is
made small for the safety and the stability.
When bead-core was inserted, the inductance of the bead-core is added to parasitic-inductance of the wiring-pattern.
By this influence, the surge-voltage occurs often, or , GND of IC becomes unstable, and also, negative voltage occurs
often.
Because of this, faulty operation occurs in the IC. The IC has the possibility of damage in the worst case.
About the Noise-reduction, fundamentally, Cope by “The addition of CR snubber circuit” and “The addition of BS
serial resistor”.
8.3.4
Reverse Bias Protection
A diode for reverse bias protection may be required
between input and output in case the output voltage is
expected to be higher than the input Pin voltage (a
common case in battery charger applications).
IN
2. IN
SW
3.SW
NR421A
NR885E
Fig. 8-14
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Reverse bias protection diode
28
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9.
Typical characteristics (Ta=25°C)
1)Efficiency・Load Regulation
Fig. 9-1
Fig. 9-5
Fig. 9-2
Fig. 9-6
Fig. 9-3
Fig. 9-7
Fig. 9-4
Fig. 9-2
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Fig. 9-9
4) OCP characteristic VO=14V
Fig. 9-10
6)Shutdown Supply Current IIN(off)
Fig. 9-11
8) EN terminal voltage vs. Output Voltage VO
3) OCP characteristic VO=5V
Fig. 9-13
5)Supply Current IIN
Fig. 9-14
7)Operationg Frequency fSW
Fig. 9-15
9) TSD operation temperature, Restart temperature
Restart
Fig. 9-12
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Activate
2) UVLO release voltage
Fig. 9-16
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10. Packing specifications
10.1 Taping & Reel outline
Pocket
5.55
12.0
Round Sprocket
φ1.55
Holes
5.5
0.3
φ2.05
6.7
2.47
8.0
4.0
EIAJ No.TE1208
2.0
Fig. 10-1
Taping Outline
Notes:
1) All dimensions in millimeters (mm)
2) Surface resistance:under 109Ω
3)Drawing is not to scale
Notes:
1) All dimensions in
millimeters (mm)
2) Drawing is not to
scale
EIAJ No.RRM-12DC
Fig. 10-2
Reel Outkine
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Quantity (TBD)
4000pcs/reel
φ330±2
φ13
±0.2
φ80±1
φ21
±0.8
13.5
17.5
±0.5
±1.0
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IMPORTANT NOTES
● All data, illustrations, graphs, tables and any other information included in this document as to Sanken’s products listed herein (the
“Sanken Products”) are current as of the date this document is issued. All contents in this document are subject to any change
without notice due to improvement of the Sanken Products, etc. Please make sure to confirm with a Sanken sales representative
that the contents set forth in this document reflect the latest revisions before use.
● The Sanken Products are intended for use as components of general purpose electronic equipment or apparatus (such as home
appliances, office equipment, telecommunication equipment, measuring equipment, etc.). Prior to use of the Sanken Products,
please put your signature, or affix your name and seal, on the specification documents of the Sanken Products and return them to
Sanken. When considering use of the Sanken Products for any applications that require higher reliability (such as transportation
equipment and its control systems, traffic signal control systems or equipment, disaster/crime alarm systems, various safety
devices, etc.), you must contact a Sanken sales representative to discuss the suitability of such use and put your signature, or affix
your name and seal, on the specification documents of the Sanken Products and return them to Sanken, prior to the use of the
Sanken Products. The Sanken Products are not intended for use in any applications that require extremely high reliability such as:
aerospace equipment; nuclear power control systems; and medical equipment or systems, whose failure or malfunction may result
in death or serious injury to people, i.e., medical devices in Class III or a higher class as defined by relevant laws of Japan
(collectively, the “Specific Applications”). Sanken assumes no liability or responsibility whatsoever for any and all damages and
losses that may be suffered by you, users or any third party, resulting from the use of the Sanken Products in the Specific
Applications or in manner not in compliance with the instructions set forth herein.
● In the event of using the Sanken Products by either (i) combining other products or materials therewith or (ii) physically,
chemically or otherwise processing or treating the same, you must duly consider all possible risks that may result from all such
uses in advance and proceed therewith at your own responsibility.
● Although Sanken is making efforts to enhance the quality and reliability of its products, it is impossible to completely avoid the
occurrence of any failure or defect in semiconductor products at a certain rate. You must take, at your own responsibility,
preventative measures including using a sufficient safety design and confirming safety of any equipment or systems in/for which
the Sanken Products are used, upon due consideration of a failure occurrence rate or derating, etc., in order not to cause any human
injury or death, fire accident or social harm which may result from any failure or malfunction of the Sanken Products. Please refer
to the relevant specification documents and Sanken’s official website in relation to derating.
● No anti-radioactive ray design has been adopted for the Sanken Products.
● No contents in this document can be transcribed or copied without Sanken’s prior written consent.
● The circuit constant, operation examples, circuit examples, pattern layout examples, design examples, recommended examples, all
information and evaluation results based thereon, etc., described in this document are presented for the sole purpose of reference of
use of the Sanken Products and Sanken assumes no responsibility whatsoever for any and all damages and losses that may be
suffered by you, users or any third party, or any possible infringement of any and all property rights including intellectual property
rights and any other rights of you, users or any third party, resulting from the foregoing.
● All technical information described in this document (the “Technical Information”) is presented for the sole purpose of reference
of use of the Sanken Products and no license, express, implied or otherwise, is granted hereby under any intellectual property
rights or any other rights of Sanken.
● Unless otherwise agreed in writing between Sanken and you, Sanken makes no warranty of any kind, whether express or implied,
including, without limitation, any warranty (i) as to the quality or performance of the Sanken Products (such as implied warranty
of merchantability, or implied warranty of fitness for a particular purpose or special environment), (ii) that any Sanken Product is
delivered free of claims of third parties by way of infringement or the like, (iii) that may arise from course of performance, course
of dealing or usage of trade, and (iv) as to any information contained in this document (including its accuracy, usefulness, or
reliability).
● In the event of using the Sanken Products, you must use the same after carefully examining all applicable environmental laws and
regulations that regulate the inclusion or use of any particular controlled substances, including, but not limited to, the EU RoHS
Directive, so as to be in strict compliance with such applicable laws and regulations.
● You must not use the Sanken Products or the Technical Information for the purpose of any military applications or use, including
but not limited to the development of weapons of mass destruction. In the event of exporting the Sanken Products or the Technical
Information, or providing them for non-residents, you must comply with all applicable export control laws and regulations in each
country including the U.S. Export Administration Regulations (EAR) and the Foreign Exchange and Foreign Trade Act of Japan,
and follow the procedures required by such applicable laws and regulations.
● Sanken assumes no responsibility for any troubles, which may occur during the transportation of the Sanken Products including
the falling thereof, out of Sanken’s distribution network.
● Although Sanken has prepared this document with its due care to pursue the accuracy thereof, Sanken does not warrant that it is
error free and Sanken assumes no liability whatsoever for any and all damages and losses which may be suffered by you resulting
from any possible errors or omissions in connection with the contents included herein.
● Please refer to the relevant specification documents in relation to particular precautions when using the Sanken Products, and refer
to our official website in relation to general instructions and directions for using the Sanken Products.
NR421A-DSE Rev.1.2
SANKEN ELECTRIC CO.,LTD
2016.04.27
http://www.sanken-ele.co.jp/en/
© SANKEN ELECTRIC CO.,LTD. 2016
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