si-8205nhg an en

SI-8205NHG
Application Note
Surface Mounted synchronized rectifier type Chopper Regulator IC
SI-8205NHG
November. 2014 Rev.3.0
SANKEN ELECTRIC CO., LTD.
SI-8205NHG
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Contents
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1. General Description
1-1 Features
----------
3
1-2 Applications
----------
3
1-3 Type
----------
3
2-1 Package Information
----------
4
2-2 Ratings
----------
5
2-3 Circuit Diagram
----------
7
2. Specification
3. Terminal Description
3-1 Terminal List
----------
8
3-2 Functional Description of Terminal
----------
8
4. Operational Description
4-1 PWM Output Voltage Control
----------
9
4-2 Overcurrent Protection / Thermal Shutdown
----------
10
5-1 External Components
----------
11
5-2 Pattern Design Notes
----------
18
5-3 Power Supply Stability
----------
20
6-1 Soft Start
----------
21
6-2 Output ON / OFF Control
----------
22
6-3 Spike Noise Reduction
----------
22
6-4 Reverse Bias Protection
----------
23
6-5 External Synchronization
----------
23
----------
24
5. Design Notes
6. Applications
7. Terminology
2
SI-8205NHG
1. General Description
The SI-8205NHG is a synchronized rectifier type chopper regulator IC with a built-in power MOS. Due to
a current control system, it is applicable to such a super low ESR capacitor as a ceramic capacitor. It is
provided with various protection functions such as overcurrent protection, low input prohibition, overheat
protection etc. In order to protect the IC against in-rush current at start-up, the soft start function is provided.
The soft start time can be set by connecting external capacitors. In addition, the internal oscillator can be
operated in 300 kHz to 1MHz by external signals. This device is supplied in a compact and thin HOSP
8-pin package with heat slug on the back side.
●1-1 Features
-
Output current 3.0A
The output current of each output is maximum 3.0A in the HSOP 8-pin surface mounting
package.
-
High efficiency
Maximum efficiency 94%
-
Output voltage variable
0.5 - 24V
-
Low ESR capacitor for output
The ceramic capacitor can be used.
Operating frequency
Frequency fixed mode (SYNC pin = GND): 250kHz
External synchronization mode: 300kHz - 1MHz
-
Built-in functions for overcurrent and thermal shutdown
A current limiting type protection circuit against overcurrent and overheat is built in. (automatic
restoration type)
-
Soft start function (capable of ON/OFF output)
By adding an external capacitor, it is possible to delay the rise speed of the output voltage.
ON/OFF control of the output is also possible.
-
Small package (SI-8205NHG)
HSOP8 pin package with small heat slug
●1-2 Applications
For on-board local power supplies, power supplies for OA equipment, stabilization of secondary output
voltage of regulator and power supply for communication equipment.
●1-3 Type
-
Type: Semiconductor integrated circuits (monolithic IC)
3
SI-8205NHG
-
Structure: Resin molding type (transfer molding)
2. Specification
●2-1 Package Information
Unit: mm
*1 Type number
*2 Lot number (three digit)
1st letter: The last digit of year
2nd letter: Month
1 to 9 for Jan. to Sep.
O for Oct.
N for Nov.
PIN Assignment
1.GND
2.EN/SS
3.VIN
4.SYNC
5.COMP
6.FB
7.BS
8.SW
D for Dec.
3rd and 4th letter: week
*3 Control number (four digit)
External Terminal Processing: Sn-2.5Ag plating
4
SI-8205NHG
●2-2 Ratings
Table 1 Absolute Maximum Rating
Parameter
Symbol
Rating
Unit
Input Voltage VIN
VIN
46
V
BS Pin voltage
VBS
52
V
VBS-SW
6
V
SW Pin voltage
VSW
46
V
FB Pin voltage
VFB
6
V
EN/SS Pin voltage
VEN/SS
6
V
FSET Pin voltage
VFSET
6
V
COMP Pin voltage
VCOMP
6
V
BS Pin-SW Pin voltage
Allowable Power Dissipation
*1
Pd
1.35
W
Junction Temperature
Tj
150
°C
Storage Temperature
Tstg
-40 to 150
°C
Thermal Resistance
θj-c
40
°C /W
θj-a
74
°C /W
(Junction and Case) *2
Thermal Resistance
(Junction and Ambient) *2
*1: Since the thermal shutdown is provided, it may be operated at Tj >140°C.
*2: Glass epoxy board: 30.0mm × 30.0mm (copper foil area: 25.0mm × 25.0mm)
Table 2 Recommended Conditions
Parameter
Symbol
SI-8205NHG
Unit
DC Input Voltage
VIN
7v to 43
V
Output Current
IO
0 to 3.0
A
Temperature in Operation
Top
-40 to +85
°C
*3
*3: The minimum value of input voltage range is 7V or VO + 3V whichever higher.
In the case of VIN = Vo +2 to Vo +3, IOUT=2A MAX
5
SI-8205NHG
(Ta = 25°C, Vo = 5V, R1 = 9kΩ, R2 = 1kΩ)
Table 3 Electrical Characteristics
Parameter
Setting Reference Voltage
Output Voltage
Temperature Coefficient
Efficiency *4
Internal Operation
Frequency
Line Regulation *5
Load Regulation
*5
Overcurrent Protection
Start Current
Circuit Current in
Non-operation 1
Circuit Current in
Non-operation 2
Flow-out
Current
at Low Level
Voltage
EN/SS
terminal
Open-ciruit
Voltage
ON Threshold
Voltage
Parameter
SYNC
Terminal
Synchronous
Threshold
Voltage
Synchronizing
Frequency
Ratings
Symbol
VREF
MIN
TYP
MAX
0.495
0.500
0.505
⊿VREF/⊿
T
η
Unit
Test Condition
V
VIN=14V, IO=1.0A
VIN=14V, IO=1.0A
Ta=-40°C to +85°C
VIN=14V, Vo=5V, IO=1A
VIN=14V, Vo=5V, IO=1A
SYNC=GND
±0.05
mV/°C
90
%
fo
250
kHz
VLine
50
mV
VIN=8 to 43V, Vo=5V, IO=1A
VLoad
50
mV
VIN=14V, Vo=5V,IO=0.1 to 3.0A ,
f=500kHz
A
VIN=14V, Vo=5V
IS
3.1
IIN
6.0
12
IIN(off)
35
IEN/SS
5
mA
VIN= 14V, Vcomp=0V
uA
VIN= 14V, VEN/SS= 0V
μA
VEN/SS=0V, VIN= 12V
VSSH
3.0
4.5
6.0
V
VIN=14V
VC/EH
0.6
1.3
2.0
V
VIN=14V
Ratings
Symbol
Unit
Test Condition
MIN
TYP
MAX
VSYNC
-
1.85
-
V
VIN=14V, Vo=5V, IO=1A
FSYNC
300
1000
kHz
VIN=14V, Vo=5V, IO=1A
Tj
151
Thermal Shutdown Start
Temperature
Error Amplifier Voltage
Gain *5
Error Amplifier
Trans-conductance *5
Current Sense
Amplifier Conductance*5
Maximum ON Duty
Minimum ON Duty
High-side Switching
ON resistance *5
Low-side Switching
ON resistance *5
160
°C
AEA
800
V/V
GEA
800
uA/V
GCS
3.33
A/V
DMAX
DMIN
RonH
90
150
150
%
nsec
mΩ
VIN=12V
RonL
150
mΩ
VIN=12V
*4: Efficiency should be calculated by using the following equation: η(%)=
VO・IO
VIN・IIN ×100
*5: This is a design assurance value.
6
SI-8205NHG
●2-3 Circuit Diagram
2-3-1 Internal Equivalent Circuit
VIN
VIN
CUR_SNS
REG
DRV_REG
ICSpwm
REG_DRV
ICSocp
REG_DRV
REG
ISNS
REG
REG_DRV
REG
BS
REG_BIAS STANDBY
STANDBY
OVC
OCP_CMP
RegOK
REG_UVLO
H/S
Drv
BG
VIN_UVLO
VinOK
M1
Level
Shift
CBoot
REG
VinOK
REG
VinOK
Set_PH
Phase_
logic
Forc_Off
OSC_RAMP
Iramp
GATE_logic
INIT_CC
INIT_PH
Res_PH
CUR_COMP
L/S
Drv
LSoff
REG
FB
SYNC
M2
Level
Shift
LSon
Phase
STANDBY
LSoff
Szse
l
CBchg
REG
Vo
SW
HSon
PWR_stage
REG
REG
VinOK
BS_CHG
PH_Open
OVT
REG
Forc_Off
Set_PH
Control_logic
OVT
TSD
BG
REG
RegOK
INIT_OVP
VinOK
OVP
OVP_CMP
Ref
EN_SS
EN/SS
BG
SS_Ref
REG
INIT_COMP
REG_BIAS
REG
FB
Err_AMP
STANDBY
REF
Ref
SS_Ref
GND
COMP
Fig. 1
2-3-2 Typical Connection Diagram
VIN
R5
3
VIN
2
EN/SS
C1
7
BS
C4
SW
Vo
L1
8
A ceramics capacitor should be a good
temperature character.
SI-8205NHG
4
C5
SYNC
GND
1
FB
COMP
5
C3
C2
6
R1
GND
C6
Open
R3
C1:10μF/50V ×2
C2:22μF/16V ×2
C3:270pF
C4:0.1μF
C5:1μF
D1
GND
L1:10μH
D1: SJPB-L6 (SANKEN)
R1:9kΩ
(at Vo=5V)
R2:1kΩ
R3:51kΩ
R5:20Ω to 47Ω
R2
Fig. 2
7
SI-8205NHG
3. Terminal Description
●3-1 Terminal List
Table 4
Terminal
1
2
3
4
5
6
7
8
Symbol
GND
EN/SS
VIN
SYNC
COMP
FB
BS
SW
SI-8205NHG
Description
Ground Terminal
Soft Start Terminal (ON/OFF Terminal)
Input Terminal
External Synchronization Signal Input Terminal
Phase Compensation Terminal
Feedback Voltage Terminal
High side Boost Terminal
Switching Output Terminal
●3-2 Functional Description of Terminal
-
GND (terminal No. 1)
It is a ground terminal.
-
EN/SS (terminal No. 2)
It is a terminal for turning ON/OFF the IC. The soft start of output voltage can be made by connecting
a capacitor to this terminal also.
-
VIN (terminal No. 3)
It is an input voltage of IC.
-
SYNC (terminal No. 4)
This pin is intended to operate the internal oscillator by external signals.
-
COMP (terminal No. 5)
It is a phase compensation terminal for controlling the loop stably.
-
FB (terminal No. 6)
It is a terminal for setting the output voltage. The output voltage is set by R1 and R2.
-
BS (terminal No. 7)
It is an internal power supply for driving the gate of high side switch Nch - MOS. A capacitor of 10
nF or more is connected between the SW terminal and BS terminal to drive the high side Nch - MOS.
-
SW (terminal No. 8)
It is a switching output terminal which supplies power to the output.
8
SI-8205NHG
4. Operational Description
●4-1 PWM Output Voltage Control
The SI-8205NHG consists of two systems of feedback loops of current control and voltage control and
three blocks which compensate slope and, in the voltage control feedback, the output voltage is fed back
for PWM control loop and the SI-8205NHG is composed of an error amplifier which compares the division
of resistance with the reference voltage of 0.5V. The current control feedback is a loop which feeds back
the inductor current for PWM control and the inductor current shunted by using a sense MOS is detected
by a current sense amplifier. With respect to the slope compensation, in consideration of current control
system, in order to avoid the sub harmonic oscillation, slope compensation is made for the current control
slope. As shown in Fig.5, in the SI-8205NHG, by means of voltage control feedback, current control
feedback and calculation of slope compensation, the PWM control by current control system is made.
M1
BS_M
M2
Reference Voltage 0.5V
Fig.3 Current Control PWM Chopper Regulator Basic Configuration
Since the SI-8205NHG is a current control regulator, the COMP terminal voltage is proportional to the
peak value of the inductor current. When the ULVO is released or current of the EN/SS terminal exceeds
the threshold value, the switching operation is made. At first, switching operation is made by MIN ON duty
or MAX ON duty. The high side switch (hereinafter called as M1) is a switching MOS which supplies
power to the output and a switch for charging the BS capacitor (hereinafter called as BS M) charges the
capacitor C4 to drive M1.
At M1: ON, inductor current is increased by applying voltage to the SW switch and inductor, and the
output of the current detection amplifier which detects it also rises. The signal to which the output of this
current detection amplifier and the Ramp compensation signal are added is compared with the output of the
error amplifier by the current comparator (CUR COMP). When the added signal exceeds the output of the
error amplifier (COMP terminal voltage), the output of the current comparator becomes “H” to reset the RS
flip-flop. Then, M1 turns off and M2 turns on. Thereby, the regenerated current flows through M2 and the
external SBD (D1).
In the SI-8205NHG, the reset signal is generated at each cycle to reset the RS flip-flop. In the case the
9
SI-8205NHG
added signal does not exceed the COMP terminal voltage, the RS flip-flop is reset without fail by the signal
of the 10% OFF Duty circuit.
●4-2 Overcurrent Protection / Thermal Shutdown
過電流保護特性
voltageVVo[V]
Output
O [V]
出力電圧 6
5
4
3
As Vo drops, the oscillating frequency
2
is lowered.
1
0
0
1
2
3
4
5
6
出力電流 I o[A]
Output Current IO [A]
Fig.4 Output Voltage Characteristics in Overcurrent
The SI-8205NHG incorporates a current limiting type overcurrent protection circuit. The overcurrent
protection circuit detects the peak current of a switching transistor and when the peak current exceeds the
set value, the ON time of the transistor is compulsorily shortened to limit the current by lowering the output
voltage. In addition, when the output voltage is lowered, the increase of current at low output voltage is
prevented by dropping the switching frequency. When the overcurrent condition is released, the output
voltage will be automatically restored.
出力電圧
Output Voltage
Restoration Setting
復帰設定温度
Temperature
Protection Setting Temperature
保護設定温度
接合温度
Junction
Temperature
Fig.5 Output Voltage Characteristics in Thermal Shutdown
The thermal shutdown circuit detects the semiconductor junction temperature of the IC and when the
junction temperature exceeds the set value (around 150°C), the output transistor is stopped and the output is
turned OFF. When the junction temperature drops from the set value for overheat protection by around
10°C, the output transistor is automatically restored.
* Note for thermal shutdown characteristic
This circuit protects the IC against overheat resulting from the instantaneous short circuit, but it should be
noted that this function does not assure the operation including reliability in the state that overheat
continues due to long time short circuit.
10
SI-8205NHG
5. Cautions
●5-1 External Components
5-1-1 Choke coil L1
The choke coil L1 plays a main role in the chopper type switching regulator. In order to maintain the stable
operation of the regulator, such dangerous state of operation as saturation state and operation at high
temperature due to heat generation must be avoided.
The following points should be taken into consideration for the selection of the choke coil.
a) The choke coil should be fit for the switching regulator.
The coil for a noise filter should not be used because of large loss and generated heat.
b) For the peak detection current control, the inductance current may fluctuate at the cycle of integral
multiple of switching operation frequency.
Such phenomenon is called as sub harmonic oscillation and it may theoretically occur in the peak detection
current control mode.
Therefore, in order to assure stable operation, the inductance current is compensated inside the IC, and it is
required to select a proper inductance value to the output voltage.
Fig. 6 shows the selection range of the inductance L value to avoid the sub harmonic oscillation. The upper
limit of inductance L is variable subject to the input/output conditions, load current etc., therefore please
regard it as a reference in the Fig. 6 below.
Inductance L [μH]
Inductance L
Selectable area
Output Voltage Vo [V]
Fig. 6 Selection range of the inductance L value
11
SI-8205NHG
The pulse current of choke coil ΔIL and the peak current ILp are expressed by the following equation:
IL 
(Vin  Vout )  Vout
L  Vin  f
---(A)
ILp 
IL
 Iout
2
---(B)
From this equation, you will see that as the inductance L of choke coil is decreased, ΔIL and ILP are
increased. In the event that the inductance is too little, the fluctuation of choke coil current is larger,
resulting in unstable operation of the regulator.
Care should be taken of decrease of inductance of choke coil due to magnetic saturation of overload, load
short circuit etc.
High inductance
Low inductance
Fig.7 Relation between Ripple current ILP and Output Current IO
c) The rated current shall be met.
The rated current of the choke coil must be higher than the maximum load current to be used. When the
load current exceeds the rated current of the coil, the inductance is sharply decreased to the extent that it
causes saturation state at last. Please note that overcurrent may flow since the high frequency impedance
becomes low.
d) Noise shall be low.
In the open magnetic circuit core which is of drum shape, since magnetic flux passes outside the coil, the
peripheral circuit may be damaged by noise. It is recommended to use the toroidal type, EI type or EE type
coil which has a closed magnetic circuit type core as much as possible.
5-1-2 Input Capacitor C1
The input capacitor is operated as a bypass capacitor of the input circuit to supply steep current to the
regulator during switching and to compensate the voltage drop of the input side. Therefore, the input
capacitor should be placed as close as to the regulator IC.
Even in the case that the rectifying capacitor of the AC rectifier circuit is located in the input circuit, the
input capacitor cannot play a role of the rectifying capacitor unless it is placed near the SI-8205NHG.
The selection of C1 shall be made in consideration of the following points:
12
SI-8205NHG
a) The requirement of withstand voltage shall be met.
b) The requirement of the allowable ripple voltage shall be met.
IIN
C1電流波形
VIN
1.VIN
リップル電流
Ripple
Current
0
Iv
Ip
C1
Ton
T
Fig.8 Current Flow of C1
D
Ton
T
Fig. 9 Current Waveform of C1
The ripple current of the input capacitor
is increased in accordance with the
increase of the load current.
If the withstanding voltages or allowable ripple voltages are exceeded or used without derating, it is in
danger of causing not only the decreasing the capacitor lifetime (burst, capacitance decrease, equivalent
impedance increase, etc) but also the abnormal oscillations of regulator.
Therefore, the selection with sufficient margin is needed.
The effective value of ripple current flowing across the input capacitor can be obtained by the following
equation (2):
Irms  1.2 
Vo
 Io
Vin
--(2)
For instance, where VIN=20V, Io=3A, Vo=5V
I r m 1s.2 
5
 3  0.9 A
20
Therefore, it is necessary to select the capacitor with the allowable ripple current of 0.9A or higher.
5-1-3 Output Capacitor C2
The current control system is a voltage control system to which a loop which detects and feeds back the
inductance current is added. By adding inductor current to the feedback loop, stable operation is realized
without taking into consideration the influence of secondary delay of the LC filter. Therefore, the
capacitance C of the LC filter which is required to compensate the secondary delay can be decreased and
furthermore, stable operation can be obtained, even if the low ESR capacitor (ceramic capacitor) is used.
The output capacitor C2 composes a LC low pass filter together with a choke coil L1 and functions as a
rectifying capacitor of switching output.
The current equivalent to the pulse current ΔIL of the choke coil current is charged and discharged in the
13
SI-8205NHG
output capacitor.
Therefore, it is necessary to meet the requirements of withstand voltage and allowable ripple current with
sufficient margin like the input capacitor.
IL
Vout
L1
Ripple
current
リップル電流
ESR
C2電流波形
Io
0
RL
⊿IL
The ripple current of the output capacitor is
C2
equal to the ripple current of the choke coil and
does not vary even if the load current increases
Fig.10 C2 current flow
Fig.11 C2 current curve
or decreases.
The ripple current effective value of the output capacitor is obtained by the equation (3).
Irms 
IL
2 3
Irms 
0.5
≒ 014
. A
2 3
---(3)
When ΔIL = 0.5A,
Therefore a capacitor having the allowable ripple current of 0.14A or higher is required.
In addition, the output ripple voltage Vrip of the regulator is determined by a product of the pulse current
ΔIL of the choke coil current (= C2 charging/discharging current) and the equivalent series resistance ESR
of the output capacitor.
Vrip  IL  C2ESR
---(4)
It is therefore necessary to select a capacitor with low equivalent series resistance ESR in order to lower the
output ripple voltage. As for general electrolytic capacitors of same product series, the ESR shall be lower,
for the products of higher capacitance with same withstand voltage, or with higher withstand voltage
(almost proportional to larger externals) with same capacitance.
When ΔIL=0.5A, Vrip=40mV,
C2esr  40  05
.  80m
As shown above, a capacitor with the ESR of 80mΩ or lower should be selected. In addition, since the ESR
varies with temperature and increases at low temperature, it is required to examine the ESR at the actual
operating temperatures. It is recommended to contact capacitor manufacturers for the ESR value since it is
peculiar to capacitors.
14
SI-8205NHG
5-1-4 Flywheel Diode D1
The SI-8205NHG has a switch-over function between synchronous rectification and asynchronous one
subject to input/output conditions, load conditions etc.. Since asynchronous operation is made as well, it is
recommended to connect a fly wheel diode D1 externally.
The flywheel diode D1 is to discharge the energy which is stored in the choke coil at switching OFF.
For the flywheel diode, the Schottky barrier diode must be used. If a general rectifying diode or fast
recovery diode is used, the IC may be destroyed by applying reverse voltage due to the recovery and ON
voltage.
In addition, since the output voltage from the SW terminal (pin 8) of the SI-8205NHG series is almost
equivalent to the input voltage, the flywheel diode with the reverse withstand voltage of the input voltage or
higher should be used.
It is recommended not to use the ferrite bead for the flywheel diode.
5-1-5 Phase compensation elements C3, C6, R3
The stability and responsiveness of the loop are controlled through the COMP terminal.
The COMP terminal is an output of the internal trans-conductance amplifier.
The series combination of a capacitor and resistor sets the combination of pole and zero which determines
characteristics of the control system. The DC gain of voltage feedback loop can be calculated by the
following equation:
Adc  Rl  Gcs  AEA 
VFB
Vout
Here, VFB is feedback voltage (0.5V). AEA is the voltage gain of error amplifier, GCS trans-inductance of
current detection and R1 a load resistance value. There are two important poles. One is produced by a
phase compensation capacitor (C3) and an output resistor of the error amplifier.
Another one is produced by a output capacitor and a load resistor. These poles appear at the following
frequencies:
fp1 
GEA
2  C 3  AEA
1
2  C 2  Rl
fp2 
Here, GEA is the trans-conductance of error amplifier. In this system, one zero is important. This zero is
produced by phase compensation capacitor C3 and phase compensation resistance R3. This zero appears in
the following frequencies:
fz1 
1
2  C 3  R3
If the output capacitor is large and/or ESR is large, this system may have another important zero. This zero
is produced by the ESR and capacitance of the output capacitor. And it exists in the following frequencies:
fESR 
1
2  C 2  RESR
15
SI-8205NHG
In this case, the third pole which is set by the phase compensation capacitor (C6) and phase compensation
resistor (R3) is used to compensate the effect of ESR zero on the loop gain.
This pole exists in the following frequencies:
fp3 
1
2  C 6  R3
The objective of design of phase compensation is to form the converter transfer function to obtain the
desired loop gain. The system crossover frequency where the feedback loop has a single gain is important.
The lower crossover frequency will produce the slower line and load transient. In the meantime, the higher
crossover frequency may cause instability of the system. The selection of the most suitable phase
compensation element is described below.
1. A phase compensation resistor (R3) is selected to set the resistor at the desired crossover frequency.
The calculation of R3 is made by the following equation:
R3 
2  C 2  fc Vout 2  C 2  0.1 fs Vout



GEA  GCS VFB
GEA  GCS
VFB
Here, fc is a desired crossover frequency. It should be one tenth or lower of the normal switching frequency
(fs).
2. In order to achieve the desired phase margin, a phase compensation capacitor (C3) is selected.
For the application having a representative inductance value, adequate phase margin is provided by setting
the zero compensation of one fourth or lower of the crossover frequency.
C3 is calculated by the following equation.
C3 
4
2  R3  fc
R3 is a phase compensation resistor.
3. It is required to judge whether the second compensation capacitor C6 is necessary or not.
It will be necessary, when the ESR zero of the output capacitor is located at a frequency which is lower
than the half of the switching frequency.
Namely, it is necessary, when the following equation is applicable.
1
fs

2  C 2  RESR
2
In this case, the second compensation capacitor C6 is added and the frequency fp3 of ESR zero is set.
C6 is obtained from the following equation.
C 2  RESR
R3
The constants for each output setting voltage in the case that ceramic capacitors or aluminum electrolytic
C6 
capacitors are used are shown in the following table.
The inductor L should be selected by reference to the choke coil L1 of 5-1-1. (Refer to Fig. 6 Scope of
16
SI-8205NHG
selection of inductance L value)
Table
Vout
[V]
1.2
1.8
3.3
5
12
Vout
[V]
1.2
1.8
3.3
5
12
L
[uH]
2.0 - 10
3.0 - 10
6.8 - 16
8.2 - 22
22 - 68
L
[uH]
2.0 - 10
3.0 - 10
6.8 - 16
8.2 - 22
22 - 68
Cout[uF]
(ceramic capacitor)
22 x 2
22 x 2
22 x 2
22 x 2
22 x 2
fc=50kHz
R3
C3
[kΩ]
[pF]
12
1000
18
680
33
330
51
220
124
100
Cout [uF]/
ESR [mΩ]
(aluminum electrolytic capacitor)
220/100
220/100
220/100
220/100
220/100
C6
[pF]
No
No
No
No
No
fc=50kHz
R3
C3
[kΩ]
[pF]
62
220
91
180
160
100
240
100
620
100
fc=20kHz
R3
C3
[kΩ]
[pF]
4.7
6800
7.3
4700
13
3300
20
1800
47
680
C6
[pF]
470
330
180
100
100
C6
[pF]
No
No
No
No
No
5
Output
setting
voltage (use
ceramic
capacitors)
fc=20kHz
R3
C3
[kΩ]
[pF]
24
1500
36
1000
68
470
100
330
240
150
C6
[pF]
1000
680
330
220
100
Table 6 Output setting voltage (use aluminum electrolytic capacitors)
17
SI-8205NHG
●5-2 Pattern Design Notes
5-2-1 High Current Line
Since high current flows in the bold lines in the connection diagram, the pattern should be as wide and
short as possible.
VIN
4
3
IN
FEST
SYNC
C4
2
SS/EN
C5
R1
FB
COMP
5
VO
L1
SW 8
SI-8205NHD
SI-8205NHG
R4
C1
7
BS
GND
1
6
VFB
C2
D1
C3
R2
IADJ
C6
OPEN
R3
GND
GND
Fig. 12 Circuit Diagram
5-2-2 Input/ Output Capacitor
The input capacitor C1 and the output capacitor C2 should be placed to the IC as close as possible. If the
rectifying capacitor for AC rectifier circuit is on the input side, it can be used as an input capacitor.
However, if it is not close to the IC, the input capacitor should be connected in addition to the rectifying
capacitor. Since high current is discharged and charged through the leads of input/output capacitor at high
speed, the leads should be as short as possible. A similar care should be taken for the patterning of the
capacitor.
C1,C2
Fig. 13 Improper Pattern Example
C1,C2
Fig. 14 Proper Pattern Example
18
SI-8205NHG
5-2-3 FB Terminal (Output Voltage Set-up)
The FB terminal is a feedback detection terminal for controlling the output voltage. It is recommended to
connect it as close as possible to the output capacitor C2. When they are not close, the abnormal oscillation
may be caused due to the poor regulation and increase of switching ripple. The output voltage set-up is
achieved by connecting R1 and R2. IFB should be set to be around 0.5mA.
(The IFB lower limit is 0.5mA, and the upper limit is not defined. However, it is necessary to consider that
the consumption current shall increase according to the IFB value, resulting in lower efficiency.)
R1, R2 and output voltage are calculated from the following equations:
IFB=VFB/R2
R1=(Vo-VFB) / IFB
*VFB=0.5v±1%
R2=VFB / IFB
Vout=R1× (VFB/R2) +VFB
Fig. 15
-
R2 should be connected for the stable operation when set to Vo = 0.5V.
-
As to the relationship with the input/output voltage, it is recommended to set the ON width of SW
terminal to be 200 nsec or longer.
The wiring of COMP terminal, FB terminal, R1 and R2 that run parallel to the flywheel diode should be
avoided, because switching noise may interfere with the detection voltage to cause abnormal oscillation. It
is recommended to implement the wiring from the FB terminal to R2 as short as possible.
19
SI-8205NHG
-
Mounting Board Pattern Example
Surface Mounting Type (SI-8205NHG)
Fig. 16 Front side: materials on this side
Fig. 17 Back side: GND side
Fig. 18 Pattern Circuit Diagram
5-3 Power Supply Stability
The phase characteristics of the chopper type regulator are synthesized by the phase characteristics inside
the regulator IC and that of output capacitor Cout and the load resistor Rout. The phase characteristics
inside the regulator IC are generally determined by the delay time of the control block and the phase
characteristic of the output error amplifier. Among these two factors, the phase delay due to the delay time
of the control block rarely causes problems in actual use. Therefore, the phase characteristics of the error
amplifier are important. With respect to the compensation of phase characteristics of the output error
amplifier, external parts such as resistors and capacitors should be connected outside the IC for phase
compensation.
Please refer to phase compensation elements C3, C6 and R3 of 5-1-5.
20
SI-8205NHG
6. Applications
●6-1 Soft Start
When a capacitor is connected to terminal 2, the soft start is activated when the input voltage is applied.
Vout rises in relation with the charging voltage of Css. Therefore, the rough estimation is done by the time
constant calculation of Css charging.
The capacitor Css controls the rise time by controlling the OFF period of PWM control. The rise time tss
and the delay time t_delay are obtained approximately by the following equation:
It is the delay time t_delay when voltage of EN/SS terminal <1.6V.
It is the rise time tss when 1.6V< voltage of EN/SS <2.1V
t_delay = CEN/SS × VEN/SS-1 / IEN/SS = 0.1μF × 1.6V / 5μA = 32msec
tss = CEN/SS × (VEN/SS-2 – VEN/SS-1) / IEN/SS = 0.1μF × 0.5V / 5μA = 10msec
When not using the soft start function, the No.2 terminal should be open.
Fig. 19 Characteristic on Soft Start
Since the EN/SS terminal is pulled up (4.5V TYP) with the internal power supply of IC, the external
voltage can not be applied.
If there is no Css or it is extremely low, Vout rises at the time constants charging the output capacitor with
the output current restricted by the overcurrent protection Is.
Time constants at output capacitor start-up
t = (Co × Vo) / Is (at no load)
21
SI-8205NHG
*The amount of load current is deducted from the Is value at load.
●6-2 Output ON / OFF Control
The output ON-Off control is possible using the EN/SS terminal (No.2). The output is turned OFF when
the terminal 5 voltage falls below VC/EH (1.6V TYP) by such as open collector. It is possible to use the soft
start together. Since the soft start terminal has been already pulled up (4.5V TYP), no voltage shall be
applied from the external side.
SI-8205NHG
SI-8205NHG
2.EN/SS
2.EN/SS
Fig. 20 ON / OFF Control 1
Fig. 21 ON / OFF Control 2
●6-3 Spike Noise Reduction
In order to reduce the spike noise, it is possible to compensate the output waveform of the SI-8205NHG
and the recovery time of the diode by a capacitor (snubber), but it should be noted that the efficiency is also
slightly reduced.
3.VIN
8.SW
SI-8205NHG
Around 10Ω
1.GND
Around 1000pF
Fig. 22 Example of Snubber
22
SI-8205NHG
* When the spike noise is observed with an oscilloscope, the lead wire may function as an antenna and the
spike noise may be observed extremely higher than usual if the probe GND lead wire is too long. In the
observation of spike noise, the probe lead wire should be as short as possible and be connected with the
root of the output capacitor.
●6-4 Reverse Bias Protection
A diode for reverse bias protection will be required between input and output when the output voltage is
higher than the input terminal voltage, such as in battery chargers.
3PIN
SI-8205NHD
SI-8205NHG
8PIN
Fig. 23 Diode for Reverse Bias Protection
●6-5 External synchronization
When the external signal is input (300kHz (TYP) to 1MHz (TYP)) to the 4th pin, operation can be
performed at a frequency in synchronization with external signals. Fig.24 shows the operating waveform in
synchronization with external signals. In addition, the operation is performed at a fixed frequency 250kHz
by connecting the 4th pin to GND.
Condition
External synchronization 500 kHz (2 μsec/ div)
SYNC terminal (external input: 500 kHz)
SW terminal (operation frequency)
External synchronization 1 MHz (1 μsec/ div)
SYNC terminal (external input: 1 MHz)
SW terminal (operation frequency)
Fig.24 External synchronization operation
23
SI-8205NHG
7. Terminology
-
Jitter
It is a kind of abnormal switching operations and is a phenomenon that the switching pulse width varies in
spite of the constant condition of input and output. The output ripple voltage peak width is increased when
a jitter occurs.
-
Recommended Conditions
It shows the operation conditions required for maintaining normal circuit functions. It is required to meet
the conditions in actual operations.
-
Absolute Maximum Ratings
It shows the destruction limits. It is required to take care so that even one item does not exceed the
specified value for a moment during instantaneous or normal operation.
-
Electrical Characteristics
It is the specified characteristic value in the operation under the conditions shown in each item. If the
operating conditions are different, it may be out of the specifications.
-
PWM (Pulse Width Modulation)
It is a kind of pulse modulation systems. The modulation is achieved by changing the pulse width in
accordance with the variation of modulation signal waveform (the output voltage for chopper type
switching regulator).
-
ESR (Equivalent Series Resistance)
It is the equivalent series resistance of a capacitor. It acts in a similar manner to the resistor
series-connected to the capacitor.
24
SI-8205NHG
Notice
・The contents of this description are subject to change without prior notice for improvement etc. Please
make sure that any information to be used is the latest one.
・Any example of operation or circuitry described in this application note is only for reference, and we are
not liable to any infringement of industrial property rights, intellectual property rights or any other rights
owned by third parties resulting from such examples.
・In the event that you use any product described here in combination with other products, please review the
feasibility of combination at your responsibility.
・Although we endeavor to improve the quality and reliability of our product, in the case of semi-conductor
components, defects or failures which occur at a certain rate of probability are inevitable.
The user should take into adequate consideration the safety design in the equipment or the system in order to
prevent accidents causing death or injury, fires, social harms etc..
・Products described here are designed to be used in the general-purpose electronic equipment (home
appliances, office equipment, communication terminals, measuring equipment etc.).
If used in the equipment or system requiring super-high reliability (transport machinery and its control
equipment, traffic signal control equipment, disaster/crime prevention system, various safety apparatus etc.),
please consult with our sales office. Please do not use our product for the equipment requiring ultrahigh
reliability (aerospace equipment, atomic control, medical equipment for life support etc.) without our written
consent.
・The products described here are not of radiation proof type.
・The contents of this brochure shall not be transcribed nor copied without our written consent.
25