Off-Line PRC Controllers with Integrated Power MOSFET STR-A6100 Series General Descriptions Package The STR-A6100 series are power ICs for switching power supplies, incorporating a MOSFET and a current mode PRC controller IC. PRC (Pulse Ratio Control) controls on-time with fixed off-time. The IC includes a startup circuit and a standby function to achieve the low standby power. The rich set of protection features helps to realize low component counts, and high performance-to-cost power supply. DIP8 D51 VOUT PC1 P S R52 C6 U2 5 7 D D D2 ST NC R2 U1 C2 D S/OCP VCC GND FB/OLP 1 2 3 ST − − STR-A61××E 11.5 μs * ST pin does not need Diode. − − Yes* Power MOSFET Electrical Characteristics and output power, POUT(1) Products VDSS (min.) RDS(ON) (max.) 2.62 Ω 500 V STR-A6131M STR-A6151M 650 V STR-A6159 R56 Startup resistance STR-A6159M POUT (Open frame) AC85 AC220V ~265V 16 W(2) 18 W(3) 3.95 Ω 13 W(2) 15 W(3) 1.9 Ω 22 W 18 W 3.95 Ω 15 W 13 W 6Ω 13 W 10 W STR-A6169 800 V 19.2 Ω 8W 5W The EI-16 core of transformer is assumed. The output power is based on the thermal ratings, and the peak output power can be 120 to 140 % of the value stated here. At low output voltage, small core and short ON Duty, the output power may be less than the value stated here. (2) AC100V (3) AC120V (1) 4 DZ1 ROCP C4 5 11.5 μs STR-A6151 GND STR-A6100 4 STR-A61××M C53 C52 R53 8 6 STR-A61×× STR-A6153E R54 R51 R55 C51 D1 D Auto bias function Yes STR-A6132 R1 DST 7 Fixed off-time 8 μs Products STR-A6131 C5 2 Electrical Characteristics L51 C1 VCC Lineup Typical Application Circuit VAC D FB/OLP Normal Operation ------------------------------ PRC Mode Standby ---------------------------- Burst Oscillation Mode No Load Power Consumption < 40mW Leading Edge Blanking Function Auto Bias Function Protections Overcurrent Protection (OCP); pulse-by-pulse Overload Protection (OLP); auto-restart Overvoltage Protection (OVP); latched shutdown Thermal Shutdown Protection (TSD); latched shutdown T1 8 Not to Scale Current Mode Type Pulse Ratio Control Auto Standby Function BR1 1 GND Features S/OCP C3 PC1 CY Applications White goods Auxiliary SMPS Low power SMPS, etc. STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. http://www.sanken-ele.co 1 STR-A6100 Series CONTENTS General Descriptions -------------------------------------------------------------------------------1 1. Absolute Maximum Ratings -----------------------------------------------------------------3 2. Electrical Characteristics --------------------------------------------------------------------4 3. Performance Curves --------------------------------------------------------------------------5 3.1 Derating Curves ----------------------------------------------------------------------5 3.2 MOSFET Safe Operating Area Curves ------------------------------------------6 3.3 Ambient Temperature versus Power Dissipation, PD1 Curves --------------7 3.4 Internal Frame Temperature versus Power Dissipation, PD2 Curves ------7 3.5 Transient Thermal Resistance Curves -------------------------------------------8 4. Functional Block Diagram ----------------------------------------------------------------- 10 5. Pin Configuration Definitions ------------------------------------------------------------- 11 6. Typical Application Circuit --------------------------------------------------------------- 12 7. Package Outline ----------------------------------------------------------------------------- 13 8. Marking Diagram --------------------------------------------------------------------------- 13 9. Operational Description-------------------------------------------------------------------- 14 9.1 Startup Operation ----------------------------------------------------------------- 14 9.2 Undervoltage Lockout (UVLO) ------------------------------------------------- 14 9.3 Constant Output Voltage Control ---------------------------------------------- 14 9.4 Leading Edge Blanking Function ----------------------------------------------- 15 9.5 Auto Standby Function ----------------------------------------------------------- 15 9.6 Auto Bias Function (STR-A61××) ---------------------------------------------- 16 9.7 Overcurrent Protection Function (OCP) -------------------------------------- 16 9.8 Overload Protection (OLP) ------------------------------------------------------ 16 9.9 Overvoltage Protection (OVP) -------------------------------------------------- 17 9.10 Thermal Shutdown Function (TSD) -------------------------------------------- 17 10. Design Notes ---------------------------------------------------------------------------------- 18 10.1 External Components ------------------------------------------------------------- 18 10.2 PCB Trace Layout and Component Placement ------------------------------ 19 11. Pattern Layout Example ------------------------------------------------------------------- 21 12. Reference Design of Power Supply ------------------------------------------------------- 22 OPERATING PRECAUTIONS --------------------------------------------------------------- 24 IMPORTANT NOTES -------------------------------------------------------------------------- 25 STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. 2 STR-A6100 Series 1. Absolute Maximum Ratings The polarity value for current specifies a sink as "+," and a source as "−," referencing the IC. Unless otherwise specified, TA is 25 °C, 7 pin = 8 pin Parameter Drain Peak Current Maximum Switching Current Symbol (1) (2) Test Conditions IDPEAK IDMAX Single pulse (3) Pins Units 1–3 2–3 4–3 5−3 Rating 3.2 4.0 2.5 3.4 1.8 1.2 3.2 4.0 2.5 3.4 1.8 1.2 32 78 72 136 24 7 − 0.5 to 6 35 − 0.5 to 10 − 0.3 to 600 1.35 W 8–1 8–1 ILPEAK = 2.1 A ILPEAK = 2.6 A (4) Avalanche Energy (5) EAS ILPEAK = 2.5 A ILPEAK = 3.4 A 8–1 ILPEAK = 1.8 A ILPEAK = 1.2 A S/OCP Pin Voltage VCC Pin Voltage FB/OLP Pin Voltage ST Pin Voltage MOSFET Power Dissipation Control Part Power Dissipation Frame Temperature in operation Operating Ambient Temperature Storage Temperature Junction Temperature VOCP VCC VFB/OLP VST (6) PD1 (7) 8–1 (8) PD2 VCC × ICC 2–3 0.15 A6131/31M A6132 A A6151/51M A6153E A6159/59M A6169 A6131/31M A6132 A A6151/51M A6153E A6159/59M A6169 A6131/31M A6132 mJ A6151/51M A6153E A6159/59M A6169 V V V V W 0.46 TF Notes − 20 to 125 °C TOP ― − 20 to 125 °C Tstg Tch ― ― − 40 to 125 150 °C °C A61×× A61××M A6153E Recommended operation temperature TF = 115 °C (max.) (1) Refer to Figure 3-1 SOA Temperature Derating Coefficient Curve Maximum Switching Current is Drain current that is limited by the VGS(th) of internal MOSFET and the gate drive voltage of internal control IC setting. TA = −20 to 125 °C (3) STR-A61×× : V1-3 = 0.86 V, STR-A61××M/E : V1-3 = 1.28 V (4) Refer to Figure 3-2 Avalanche Energy Derating Coefficient Curve (5) Single pulse, VDD = 99 V, L = 20 mH (6) Refer to Section 3.3 Ta-PD1 curve (7) When embedding this hybrid IC onto the printed circuit board (cupper area in a 15 mm × 15 mm) (8) Refer to Section 3.4 Ta-PD2 curve (2) STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. 3 STR-A6100 Series 2. Electrical Characteristics The polarity value for current specifies a sink as "+," and a source as "−," referencing the IC. Unless otherwise specified, TA = 25 °C, VCC = 20 V, 7 pin = 8 pin Parameter Symbol Test Conditions Pins Min. Typ. Max. Units VCC(ON) 2−3 16 17.5 19.2 V VCC(OFF) 2−3 9 10 11 V ICC(ON) 2−3 − − 4 mA 2−3 − − 50 µA Notes Power Supply Startup Operation Operation Start Voltage Operation Stop Voltage Circuit Current in Operation Circuit Current in Non Operation Auto Bias Threshold Voltage VCC(BIAS)－VCC(OFF) (1) ICC(OFF) VCC = 14 V (1) (2) VCC(BIAS) 2−3 9.6 10.6 11.6 V A61×× (2) − − 0.2 − − V A61×× 2−3 − 1230 − 790 − 340 µA ISTART(leak) 5−3 − − 30 µA 8−3 7.3 8 8.7 tOFF(MAX) Burst Threshold Voltage VBURST 4−3 Protection Operation Leading Edge Blanking Time tBW − OCP Threshold Voltage VOCP(TH) 1−3 OLP Threshold Voltage VOLP 4−3 FB/OLP Pin Source Current in OLP Operation IOLP 4−3 IFB(MAX) 4−3 Startup Current ST Pin Leakage Current ISTARTUP VCC = 15 V PRC Operation Maximum OFF Time 10.5 11.5 12.5 0.70 0.79 0.88 A61×× µs A61××M A6153E Standby Operation FB/OLP Pin Maximum Source Current 0.66 0.75 0.84 200 320 480 0.69 0.77 0.86 0.96 1.13 1.28 6.5 7.2 7.9 −35 −26 −18 −34.1 −26 −18.2 −388 −300 −227 −390 −300 −220 A61×× V A61××M A6153E ns A61×× V A61××M A6153E V A61×× µA A61××M A6153E A61×× µA A61××M A6153E VCC Pin OVP Threshold VCC(OVP) 2−3 28.7 31.2 34.1 V Voltage Latched Shutdown Keep ICC(H) 2−3 − − 200 μA Current Latched Shutdown Release Threshold VCC(La.OFF) 2−3 6.6 7.3 8.0 V Voltage Thermal Shutdown Tj(TSD) − 135 − − °C Operating Temperature (1) VCC(BIAS) > VCC(OFF) always. (2) STR-A61××M and STR-A6153E do not have the Auto Bias Threshold voltage because auto bias function is not included. STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. 4 STR-A6100 Series Parameter Symbol Test Conditions Pins Min. Typ. Max. Units Notes 500 − − 650 − − 800 − − − − 300 − − 1.9 A6153E − − 2.62 A6132 − − 3.95 − − 6 − − 19.2 8–1 − − 250 ns − − − 52 °C/W MOSFET Drain-to-Source Breakdown Voltage ID = 300 μA VDSS Drain Leakage Current IDSS On Resistance VD = VDSS RDS(ON) Switching Time tf ID = 0.4 A VD = 10V 8–1 8–1 8–1 V A6131/31M A6132 A6151/51M A6159/59M A6153E A6169 μA Ω A6131/31M A6151/51M A6159/59M A6169 Thermal Characteristics (3) Thermal Resistance (3) θch-F θch-F is thermal resistance between channel and frame. Frame temperature (T F) is measured at the base of pin 3. 3. Performance Curves 3.1 Derating Curves EAS Temperature Derating Coefficient (%) Safe Operating Area Temperature Derating Coefficient (%) 100 80 60 40 20 0 0 25 50 75 100 125 150 100 80 60 40 20 0 25 STR-A6100 - DS Rev.2.0 Dec. 25, 2013 75 100 125 150 Channel Temperature, Tch (°C) Channel Temperature, Tch (°C) Figure 3-1 SOA Temperature Derating Coefficient Curve 50 Figure 3-2 Avalanche Energy Derating Coefficient Curve SANKEN ELECTRIC CO.,LTD. 5 STR-A6100 Series 3.2 MOSFET Safe Operating Area Curves When the IC is used, the safe operating area curve should be multiplied by the temperature derating coefficient derived from Figure 3-1. The broken line in the safe operating area curve is the drain current curve limited by on-resistance. Unless otherwise specified, TA = 25 °C, Single pulse STR-A6131 / 31M STR-A6132 10 10 0.1ms Drain Current, ID (A) Drain Current, ID (A) 0.1ms 1 1ms 0.1 1 1ms 0.1 0.01 0.01 1 10 100 1 1000 10 100 1000 Drain-to-Source Voltage (V) Drain-to-Source Voltage (V) STR-A6151 / 51M STR-A6159 / 59M 10 10 0.1ms Drain Current, ID (A) Drain Current, ID (A) 0.1ms 1 1ms 0.1 1 1ms 0.1 0.01 0.01 1 10 100 1 1000 Drain-to-Source Voltage (V) 10 100 1000 Drain-to-Source Voltage (V) STR-A6169 STR-A6153E 10 10 0.1ms Drain Current, ID (A) Drain Current, ID (A) 0.1ms 1 1ms 0.1 0.01 1 1ms 0.1 0.01 1 10 100 1000 1 Drain-to-Source Voltage (V) STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. 10 100 1000 Drain-to-Source Voltage (V) 6 STR-A6100 Series 3.3 Ambient Temperature versus Power Dissipation, PD1 Curves 1.6 Power Dissipation, PD1 (W) 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 25 50 75 100 125 150 Ambient Temperature, TA (°C ) 3.4 Internal Frame Temperature versus Power Dissipation, PD2 Curves STR-A61×× STR-A61××M STR-A6153E 0.50 0.14 0.45 PD2 = 0.15 W Power Dissipation, PD2 (W) Power Dissipation, PD2 (W) 0.16 0.12 0.10 0.08 0.06 0.04 0.02 PD2 = 0.46 W 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0.00 0.00 0 20 40 60 80 100 120 140 Internal Frame Temperature, TF (°C) STR-A6100 - DS Rev.2.0 Dec. 25, 2013 0 25 50 75 100 125 150 Internal Frame Temperature, TF (°C) SANKEN ELECTRIC CO.,LTD. 7 STR-A6100 Series 3.5 Transient Thermal Resistance Curves STR-A6131 / 31M Transient Thermal Resistance θch-c (°C/W) 100 10 1 0.1 0.01 1µ 10µ 100µ 1m Time (s) 10m 100m 1 10 STR-A6132 Transient Thermal Resistance θch-c (°C/W) 10 1 0.1 0.01 1µ 10µ 100µ 1m 10m 100m Time (s) STR-A6151 / 51M Transient Thermal Resistance θch-c (°C/W) 100 10 1 0.1 0.01 1µ 10µ 100µ 1m 10m 100m 1 10 Time (s) STR-A6159 / 59M Transient Thermal Resistance θch-c (°C/W) 10 1 0.1 0.01 1µ 10µ 100µ 1m 10m 100m Time (s) STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. 8 STR-A6100 Series STR-A6169 Transient Thermal Resistance θch-c (°C/W) 10 1 0.1 0.01 1µ 10µ 100µ 1m 10m 100m 1m 10m 100m Time (s) STR-A6153E Transient Thermal Resistance θch-c (°C/W) 10 1 0.1 0.01 0.001 1µ 10µ 100µ Time (s) STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. 9 STR-A6100 Series 4. Functional Block Diagram STR-A61×× 2 VCC ST 5 OVP UVLO ＋ － Internal Bias ＋ － Latch Delay TSD Power MOS FET OFF Timer 7,8 D Drive PWM Latch ＋ S Q － OLP Bias R ＋ － － ＋ Burst Blanking ＋ － Discharge － FB OCP 1 S/OCP ＋ － ＋ Buffer 3 GND FB/OLP 4 STR-A61××M 2 ST 5 OVP UVLO ＋ － VCC ＋ － Internal Bias Latch Delay TSD Power MOS FET OFF Timer 7,8 D Drive PWM Latch ＋ － OLP S Q ＋ － R Burst Blanking ＋ － Discharge － FB OCP 1 S/OCP ＋ － ＋ Buffer FB/OLP 3 GND 4 STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. 10 STR-A6100 Series STR-A6153E 2 ST 5 OVP UVLO ＋ － Internal Bias ＋ － VCC Latch Delay TSD Power MOS FET OFF Timer 7,8 D Drive PWM Latch ＋ － OLP S Q ＋ － R Burst Blanking ＋ － Discharge － FB OCP 1 S/OCP ＋ － ＋ Buffer FB/OLP 3 GND 4 5. Pin Configuration Definitions Pin Name 1 S/OCP Descriptions MOSFET source and input of overcurrent protection (OCP) signal Power supply voltage input for control part and input of overvoltage protection (OVP) signal Ground Input of constant voltage control signal and input of over load protection (OLP) signal Startup current input S/OCP 1 8 D 2 VCC VCC 2 7 D 3 GND GND 3 6 4 FB /OLP 5 ST FB/OLP 4 5 6 − (Pin removed) D Power MOSFET drain ST 7 8 STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. 11 STR-A6100 Series 6. Typical Application Circuit The PCB traces of D pins should be as wide as possible, in order to enhance thermal dissipation. In applications having a power supply specified such that V DS has large transient surge voltages, a clamp snubber circuit of a capacitor-resistor-diode (CRD) combination should be added on the primary winding P, or a damper snubber circuit of a capacitor (C) or a resistor-capacitor (RC) combination should be added between the D pin and the S/OCP pin. As shown in Figure 6-2, STR-A6153E does not need diode connected to ST pin. CRD clamp snubber BR1 C1 R54 R51 PC1 P DST D2 D C5 R52 S C52 R53 U51 ST NC C53 R2 5 D R55 C51 D1 7 VOUT R1 C6 8 L1 D51 T1 VAC C2 U1 R56 D STR-A61×× STR-A61××M GND S/OCP VCC GND FB/OLP C（RC） Damper snubber 1 2 3 4 CY DZ1 ROCP C3 PC1 C4 Figure 6-1 Typical application circuit (STR-A61××/ STR-A61××M) CRD clamp snubber BR1 L1 D51 T1 VAC VOUT R54 R51 R1 C6 C1 PC1 P R55 C51 D1 D2 8 C5 D C52 U51 ST NC R52 C2 U1 C53 R53 R2 5 7 D S R56 D GND STR-A6153E S/OCP VCC GND FB/OLP C（RC） Damper snubber 1 2 3 4 CY DZ1 ROCP C3 PC1 C4 Figure 6-2 Typical application circuit (STR-A6153E) STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. 12 STR-A6100 Series 7. Package Outline DIP8 (Type A) NOTES: 3) Dimension is in millimeters 4) Pb-free. Device composition compliant with the RoHS directive DIP8 (Type B) NOTES: 1) Dimension is in millimeters 2) Pb-free. Device composition compliant with the RoHS directive 8. Marking Diagram STR-A6131/32/51/59/69/31M/59M/51E 8 STR-A6151M 8 Part Number SKYMD A6151 Part Number (A61×× / A6153E A6131M / A6159M) SKYMDM Lot Number 1 Y = Last Digit of Year (0-9) M = Month (1-9,O,N or D) D =Period of days (1 to 3) 1 : 1st to 10th 2 : 11th to 20th 3 : 21st to 31st Lot Number 1 Sanken Control Number STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. Y = Last Digit of Year (0-9) M = Month (1-9,O,N or D) D =Period of days (1 to 3) 1 : 1st to 10th 2 : 11th to 20th 3 : 21st to 31st Sanken Control Number 13 STR-A6100 Series 9. Operational Description All of the parameter values used in these descriptions are typical values of STR-A6151, unless they are specified as minimum or maximum. With regard to current direction, "+" indicates sink current (toward the IC) and "–" indicates source current (from the IC). The approximate value of auxiliary winding voltage is about 15 V to 20 V, taking account of the winding turns of D winding so that VCC pin voltage becomes Equation (2) within the specification of input and output voltage variation of power supply. VCC( BIAS) (max .) VCC VCC(OVP ) (min .) ⇒ 11.6(V) VCC 28.7(V) (1) 9.1 Startup Operation Figure 9-1 shows the circuit around VCC pin. Figure 9-2 shows VCC pin voltage behavior during the startup period. BR1 The startup time of IC is determined by C2 capacitor value. The approximate startup time tSTART is calculated as follows: t START C2 × T1 VCC( ON )－VCC( INT ) (2) I STRATUP VAC C1 P DST where, tSTART VCC(INT) 5 U1 ST VCC 2 D2 R2 9.2 Undervoltage Lockout (UVLO) C2 GND 3 Figure 9-3 shows the relationship of VCC pin voltage and circuit current ICC. When VCC pin voltage increases to VCC(ON) = 17.5 V, the control circuit starts switching operation and the circuit current ICC increases. When VCC pin voltage decreases to VCC(OFF) = 10 V, the control circuit stops operation by UVLO (Undervoltage Lockout) circuit, and reverts to the state before startup. VD D Figure 9-1 VCC pin peripheral circuit VCC pin voltage IC starts operation Startup success Target operating voltage VCC(ON) : Startup time of IC (s) : Initial voltage on VCC pin (V) Circuit current, ICC ICC（ON） Increase with rising of output voltage VCC(OFF) Stop Startup failure Start Time Figure 9-2 VCC pin voltage during startup period The IC incorporates the startup circuit. The circuit is connected to ST pin. During the startup process, the constant current, ISTARTUP = − 790 µA, charges C2 at VCC pin. When VCC pin voltage increases to VCC(ON) = 17.5 V, the IC starts the operation. Then circuit current increases and VCC pin voltage decreases. Since the Operation Stop Voltage VCC(OFF) = 10 V is low, the auxiliary winding voltage reaches to setting value before VCC pin voltage decreases to VCC(OFF). Thus control circuit continues the operation. The voltage from the auxiliary winding D in Figure 9-1 becomes a power source to the control circuit in operation. STR-A6100 - DS Rev.2.0 Dec. 25, 2013 VCC（OFF） VCC（ON） VCC pin voltage Figure 9-3 Relationship between VCC pin voltage and ICC 9.3 Constant Output Voltage Control Figure 9-4 shows FB/OLP pin peripheral circuit, Figure 9-5 shows the waveform of ID and FB comparator input. The IC achieves the constant voltage control of the power supply output by PRC (Pulse Ratio Control). PRC SANKEN ELECTRIC CO.,LTD. 14 STR-A6100 Series controls on-time with fixed off-time. In addition, the IC uses the peak-current-mode control method, which enhances the response speed and provides the stable operation. D Timer reset OFF signal output OFF Timer Circuit 7,8 Drive S R ON/OFF PRC latch circuit VSC -V + OCPM FB Comp. Buffer S/OCP + OCP Comp. 1 VOCP(TH) ID 4 GND FB/OLP VROCP IFB ROCP DZ1 C4 C3 When load conditions become lighter, the output voltage, VOUT, increases. Thus, the feedback current from the error amplifier on the secondary-side also increases. The feedback current is sunk at the FB/OLP pin, transferred through a photo-coupler, PC1, and the FB/OLP pin voltage decreases. Thus, VSC decreases, and the peak value of VOCPM is controlled to be low, and the peak drain current of I D decreases. This control prevents the output voltage from increasing. Heavy load conditions U1 3 The IC controls the peak value of VOCPM voltage to be close to target voltage (VSC), comparing VOCPM with VSC by internal FB comparator. VOCPM is amplified VROCP voltage that is a detection voltage by current detection resistor, ROCP. Light load conditions Gate control Q to the gate control circuit, and power MOSFET turns off. PC1 When load conditions become greater, the IC performs the inverse operation to that described above. Thus, VSC increases and the peak drain current of ID increases. This control prevents the output voltage from decreasing. 9.4 Leading Edge Blanking Function Figure 9-4 FB/OLP pin peripheral circuit FB comparator - VSC + VOCPM Drain current, ID The constant voltage control of output of the IC uses the peak-current-mode control method. In peak-current-mode control method, there is a case that the power MOSFET turns off due to unexpected response of FB comparator or overcurrent protection circuit (OCP) to the steep surge current in turning on a power MOSFET. In order to prevent this operation, Leading Edge Blanking Time, tBW = 320 ns is built-in. In the period of tBW, the IC does not respond to the surge voltage in turning on the power MOSFET. Figure 9-5 The waveform of ID and FB comparator input 9.5 Auto Standby Function The internal fixed off-time, tOFF is made from internal off timer circuit, the turn-on timing of power MOSFET depends on tOFF. Turn-on After the period of tOFF, OFF signal output becomes High, Q of PRC latch circuit is latched to Low. As a result, turn-on signal is input to the gate control circuit, and power MOSFET turns on. Tuen-off When the OCP comparator or the FB comparator resets the PRC latch circuit, Q of PRC latch circuit is latched to High. As a result, turn-off signal is input STR-A6100 - DS Rev.2.0 Dec. 25, 2013 Automatic standby mode is activated automatically when the drain current, ID, reduces under light load conditions, at which ID is less than 25% of the maximum drain current (it is in the Overcurrent Protection state). The operation mode becomes burst oscillation, as shown in Figure 9-6. The 25% of the maximum drain current corresponds to the Burst Threshold Voltage of FB/OLP pin, VBURST = 0.79 V (0.75 V for STR-A61××M and STR-A6153E). Burst oscillation mode reduces switching losses and improves power supply efficiency because of periodic non-switching intervals. Generally, to improve efficiency under light load conditions, the frequency of the burst mode becomes SANKEN ELECTRIC CO.,LTD. 15 STR-A6100 Series just a few kilohertz. Because the IC suppresses the peak drain current well during burst mode, audible noises can be reduced. Output current, IOUT current is. As a result, the detection voltage becomes higher than VOCP(TH). Thus, the output current depends on the AC input voltage in OCP operation (refer to Figure 9-7). Below several kHz Drain current, ID Normal operation Standby operation Normal operation Output voltage, VOUT（V） Burst oscillation Low AC input voltage High AC input voltage Output current, IOUT（A） Figure 9-6 Auto Standby mode timing Figure 9-7 Output characteristic curve 9.6 Auto Bias Function (STR-A61××) STR-A61×× includes the auto bias function. The function becomes active during burst oscillation mode. When VCC pin voltage decreases to the Auto Bias Threshold Voltage, VCC(BIAS) = 10.6 V, during burst oscillation mode, the IC shifts to PRC operation so that VCC pin voltage does not decrease. As a result, the IC achieves stable standby operation. However, if the Bias Assist function is always activated during steady-state operation including standby mode, the power loss increases. Therefore, the VCC pin voltage should be more than VCC(BIAS), for example, by adjusting the turns ratio of the auxiliary winding and secondary winding and/or reducing the value of R2 in Figure 10-2 (refer to Section 10.1 Peripheral Components for a detail of R2). 9.7 Overcurrent Protection Function (OCP) Overcurrent Protection Function (OCP) detects each drain peak current level of a power MOSFET on pulse-by-pulse basis, and limits the output power when the current level reaches to OCP threshold voltage, VOCP(TH) = 0.77 V (1.13 V for STR-A61××M and STR-A6153E). Figure 9-7 shows the output characteristics. When OCP becomes active, the output voltage decreases and the auxiliary winding voltage, VD decreases in proportion to the output voltage. When VCC pin voltage decreases to VCC(OFF) = 10 V, the control circuit stops operation by UVLO circuit, and reverts to the state before startup. After that, VCC pin voltage is increased by Startup Current, ISTARTUP. When VCC pin voltage increases to VCC(ON) = 17.5 V, the IC restarts the operation. Thus the intermittent operation by UVLO is repeated in OCP operation. The IC usually has some propagation delay time. The steeper the slope of the actual drain current at a high AC input voltage is, the larger the actual peak of drain STR-A6100 - DS Rev.2.0 Dec. 25, 2013 When the multi outputs transformer is used, there is the case that the auxiliary winding voltage, VD does not decrease and the intermittent operation is not started, even if output voltage decreases in OCP operation. This is due to the poor coupling of transformer. In this case, the overload protection (OLP) becomes active. (refer to Section 9.8.) 9.8 Overload Protection (OLP) Figure 9-8 shows the FB/OLP pin peripheral circuit. Figure 9-9 shows the OLP operational waveforms. When the peak drain current of ID is limited by OCP operation, the output voltage, VOUT, decreases and the feedback current from the secondary photo-coupler becomes zero. Thus, the feedback current, IFB, charges C3 connected to the FB/OLP pin and the FB/OLP pin voltage increases. When the FB/OLP pin voltage increases to VFB(OLP) = 7.2 V or more for the OLP delay time, tDLY or more, the OLP function is activated and the IC stops switching operation. tDLY is calculated using Equation (3). t DLY C3 × (VOLP － VZ －VF ) (3) I OLP there, tDLY: OLP delay time VZ: zener voltage of zener diode, DZ1 VF: forward voltage of D3 IOLP: FB/OLP Pin Source Current in OLP Operation is − 26 µA After the switching operation stops, VCC pin voltage decreases to Operation Stop Voltage VCC(OFF) = 10 V and the intermittent operation by UVLO is repeated. This intermittent operation reduces the stress of parts such as power MOSFET and secondary side rectifier SANKEN ELECTRIC CO.,LTD. 16 STR-A6100 Series diode. In addition, this operation reduces power consumption because the switching period in this intermittent operation is short compared with oscillation stop period. When the abnormal condition is removed, the IC returns to normal operation automatically. As shown in Figure 9-9, tDLY should be longer than tSTART which is the period until the output voltage becomes constant. If tDLY is shorter than tSTART, the power supply may not start due to OLP operation. Releasing the latched state is done by turning off the input voltage and by dropping the VCC pin voltage below VCC(La.OFF) = 7.3 V. VCC pin voltage Latched state VCC（OVP）=31.2V VCC（ON）=17.5V U1 S/OCP VCC（OFF）=10V GND FB/OLP 1 3 4 DZ1 VROCP PC1 ROCP C4 Drain current, ID IFB C3 Figure 9-10 OVP operational waveforms Figure 9-8 FB/OLP pin peripheral circuit tSTART tSTART tDLY tDLY VCC pin voltage VCC(ON) VCC(OFF) FB/OLP pin voltage VOUT(OVP) VOLP Drain current, ID If output voltage detection circuit becomes open, the output voltage of secondary side increases. In case the VCC pin voltage is provided by using auxiliary winding of transformer, the overvoltage conditions can be detected because the VCC pin voltage is proportional to output voltage. The approximate value of output voltage VOUT(OVP) in OVP condition is calculated by using Equation (4). Non-switching interval VOUT ( NORMAL ) VCC( NORMAL ) × 31.2 (4) where, VOUT(NORMAL): Output voltage in normal operation VCC(NORMAL): VCC pin voltage in normal operation Figure 9-9 OLP operational waveforms 9.10 Thermal Shutdown Function (TSD) 9.9 Overvoltage Protection (OVP) Figure 9-10 shows the OVP operational waveforms. When a voltage between VCC pin and GND terminal increases to VCC(OVP) = 31.2 V or more, OVP function is activated. When the OVP function is activated, the IC stops switching operation at the latched state. After that, VCC pin voltage is decreased by circuit current of IC. When VCC pin voltage becomes VCC(OFF) = 10 V or less, VCC pin voltage is increased by Startup Current. When VCC pin voltage increases to VCC(ON) = 17.5 V, the circuit current increases and VCC pin voltage decreases. In this way, VCC pin voltage goes up and down between VCC(OFF) and VCC(ON) during the latched state, excessive increase of VCC pin voltage is prevented. STR-A6100 - DS Rev.2.0 Dec. 25, 2013 When the temperature of control circuit increases to Tj(TSD) = 135 °C or more, Thermal Shutdown function is activated. When the TSD function is activated, the IC stops switching operation at the latched state (see the Section 9.9). Releasing the latched state is done by turning off the input voltage and by dropping the VCC pin voltage below VCC(La.OFF) = 7.3 V. SANKEN ELECTRIC CO.,LTD. 17 STR-A6100 Series 10.Design Notes Without R2 VCC pin voltage 10.1 External Components Take care to use properly rated, including derating as necessary and proper type of components. Output current, IOUT CRD clamp snubber BR1 T1 VAC ( C6 RST 8 D C5 P D1 D2 5 7 D Figure 10-2 Variation of VCC pin voltage and power R1 DST ) C1 R2 ST NC U1 C2 STRA6100 D S/OCP VCC GND FB/OLP C（RC） damper snubber 1 2 3 4 DZ1 C3 ROCP PC1 C4 Figure 10-1 The IC peripheral circuit Electrolytic Capacitor Apply proper derating to ripple current, voltage, and temperature rise. Use of high ripple current and low impedance types, designed for switch mode power supplies, is recommended. S/OCP Pin Peripheral Circuit Choose a type of low internal inductance because a high frequency switching current flows to ROCP in Figure 10-1, and of properly allowable dissipation. VCC Pin Peripheral Circuit The value of C2 in Figure 10-1 is generally recommended to be 10µ to 47μF (refer to Section 9.1, because the startup time is determined by the value of C2). In actual power supply circuits, there are cases in which the VCC pin voltage fluctuates in proportion to the output current, IOUT (see Figure 10-2), and the Overvoltage Protection function (OVP) on the VCC pin may be activated. This happens because C2 is charged to a peak voltage on the auxiliary winding D, which is caused by the transient surge voltage coupled from the primary winding when the power MOSFET turns off. For alleviating C2 peak charging, it is effective to add some value R2, of several tenths of ohms to several ohms, in series with D2 (see Figure 10-1). The optimal value of R2 should be determined using a transformer matching what will be used in the actual application, because the variation of the auxiliary winding voltage is affected by the transformer structural design. STR-A6100 - DS Rev.2.0 Dec. 25, 2013 With R2 FB/OLP Pin Peripheral Circuit Figure 10-1 performs high frequency noise rejection and phase compensation, and should be connected close to these pins. The value of C3 is recommended to be about 2200p to 0.01µF. In order to make the value of C3 low and make the output response fast, DZ1 and C4 are connected. DZ1 prevents C4 charging in normal operation. The zener voltage of DZ1, VZ should be set higher than FB/OLP pin voltage in normal operation. Usually, the value of VZ is about 4.7 V to 5.6 V. C4 is for OLP delay time, tDLY setting. If C4 is too small, the power supply may not start due to OLP operation (see Section 9.8). The value of C4 is about 4.7 μF to 22 μF. C3, C4 and DZ1 should be selected based on actual operation in the application. ST Pin Peripheral Circuit When STR-A61×× and STR-A61××M are used, DST or RST should be connected to ST pin as shown in Figure 10-1. DST and RST prevent negative voltage from applying to ST pin. If ST pin voltage becomes under −0.3 V, the power supply may not start. The value of DST and RST should be selected based on actual operation in the application. Recommended value of RST is 33 kΩ, Recommended characteristics of DST is as follows: Characteristics Peak Reverse Voltage, VRM Forward current, IF Reverse Recovery Time, trr Reverse Leakage Current, IR Recommended range > 35 V > 1.5 mA < 27 μs < 100 μA Snubber Circuit In case the serge voltage of VDS is large, the circuit should be added as follows (see Figure 10-1); ・ A clamp snubber circuit of a capacitor-resistordiode (CRD) combination should be added on the primary winding P. ・ A damper snubber circuit of a capacitor (C) or a resistor-capacitor (RC) combination should be added between the D pin and the GND pin. In case the damper snubber circuit is added, this components should be connected near D pin and S/OCP pin. SANKEN ELECTRIC CO.,LTD. 18 STR-A6100 Series Phase Compensation A typical phase compensation circuit with a secondary shunt regulator (U51) is shown in Figure 10-3. C52 and R53 are for phase compensation. The value of C52 and R53 are recommended to be around 0.047 μF to 0.47 μF and 4.7 kΩ to 470 kΩ, respectively. They should be selected based on actual operation in the application. L51 T1 VOUT D51 PC1 R55 C51 S R54 R51 R52 In order to reduce the influence of surge voltage on the VCC pin, Figure 10-4 shows winding structural examples that are considered the placement of the auxiliary winding D. ▫ Winding structural example (a) : Separating the auxiliary winding D from the primary windings P1 and P2. where: P1 and P2 are windings divided the primary winding into two. ▫ Winding structural example (b) : Placing the auxiliary winding D within the secondary-side stabilized output winding, S1, in order to improve the coupling of those windings. where: S1 is a stabilized output winding of secondary-side windings, controlled to constant voltage. C53 Margin tape U51 R56 Bobbin C52 R53 GND P1 S1 P2 S2 D P1、P2 ： Primary main winding D ： Primary auxiliary winding S1 ： Secondary Stabilized output winding S2 ： Secondary output winding Margin tape Winding structural example (a) Figure 10-3 Peripheral circuit around secondary shunt regulator (U51) ▫ Increase the number of wires in parallel. ▫ Use litz wires. ▫ Thicken the wire gauge. Fluctuation of the VCC pin voltage by IOUT worsens in the following cases, requiring a transformer designer to pay close attention to the placement of the auxiliary winding D: ▫ Poor coupling between the primary and secondary windings (this causes high surge voltage and is seen in a design with low output voltage and high output current) ▫ Poor coupling between the auxiliary winding D and the secondary stabilized output winding where the output line voltage is controlled constant by the output voltage feedback (this is susceptible to surge voltage) STR-A6100 - DS Rev.2.0 Dec. 25, 2013 Bobbin Transformer Apply proper design margin to core temperature rise by core loss and copper loss. Because the switching currents contain high frequency currents, the skin effect may become a consideration. Choose a suitable wire gauge in consideration of the RMS current and a current density of about 3 to 4A/mm2. If measures to further reduce temperature are still necessary, the following should be considered to increase the total surface area of the wiring: Margin tape P1 S1 D S2 S1 P2 Margin tape Winding structural example (b) Figure 10-4 Winding structural examples 10.2 PCB Trace Layout and Component Placement Since the PCB circuit trace design and the component layout significantly affects operation, EMI noise, and power dissipation, the high frequency PCB trace should be low impedance with small loop and wide trace. In addition, the ground traces affect radiated EMI noise, and wide, short traces should be taken into account. Figure 10-5 shows the circuit design example. (1) Main Circuit Trace Layout: S/OCP pin to ROCP to C1 to T1 (winding P) to D pin This is the main trace containing switching currents, and thus it should be as wide trace and small loop as possible. If C1 and the IC are distant from each other, placing a capacitor such as film capacitor (about 0.1 μF and with proper voltage rating) close to the transformer or the IC is recommended to reduce impedance of the high frequency current loop. SANKEN ELECTRIC CO.,LTD. 19 STR-A6100 Series (2) Control Ground Trace Layout Since the operation of IC may be affected from the large current of the main trace that flows in control ground trace, the control ground trace should be separated from main trace and connected at a single point grounding of point A in Figure 10-5 as close to the ROCP pin as possible. (5) FB/OLP Trace Layout The components connected to FB/OLP pin should be as close to FB/OLP pin as possible. The trace between the components and FB/OLP pin should be as short as possible. (6) Secondary Rectifier Smoothing Circuit Trace Layout: T1 (winding S) to D51 to C51 This is the trace of the rectifier smoothing loop, carrying the switching current, and thus it should be as wide trace and small loop as possible. If this trace is thin and long, inductance resulting from the loop may increase surge voltage at turning off the power MOSFET. Proper rectifier smoothing trace layout helps to increase margin against the power MOSFET breakdown voltage, and reduces stress on the clamp snubber circuit and losses in it. (3) VCC Trace Layout: GND pin to C2 (negative) to T1 (winding D) to R2 to D2 to C2 (positive) to VCC pin This is the trace for supplying power to the IC, and thus it should be as small loop as possible. If C2 and the IC are distant from each other, placing a capacitor such as film capacitor Cf (about 0.1 μF to 1.0 μF) close to the VCC pin and the GND pin is recommended. (4) ROCP Trace Layout (7) Thermal Considerations Because the power MOSFET has a positive thermal coefficient of RDS(ON), consider it in thermal design. Since the copper area under the IC and the D pin trace act as a heatsink, its traces should be as wide as possible. ROCP should be placed as close as possible to the S/OCP pin. The connection between the power ground of the main trace and the IC ground should be at a single point ground (point A in Figure 10-5) which is close to the base of ROCP. (1) Main trace should be wide trace and small loop (6) Main trace of secondary side should be wide trace and small loop D51 T1 R1 C6 C1 P DST (7)Trace of D pin should be wide for heat release 8 C5 S 5 7 D C51 D1 D D2 NC R2 ST U1 STR-A6100 C2 D S/OCP VCC GND FB/OLP 1 2 3 4 (3) Loop of the power supply should be small ROCP DZ1 C4 PC1 C3 (5)The components connected to FB/OLP pin should be as close to FB/OLP pin as possible A CY (4)ROCP should be as close to S/OCP pin as possible. (2) Control GND trace should be connected at a single point as close to the ROCP as possible Figure 10-5 Example of peripheral circuit around the IC STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. 20 STR-A6100 Series 11.Pattern Layout Example The following show the PCB pattern layout example and the circuit schematic with STR-A6100 series. Top view Bottom view Figure 11-1 PCB circuit trace layout example J1 F1 L1 D1 R1 ZNR1 R2 C1 J2 R11 C91 C2 L2 D11 T1 R13 R91 R92 R93 D4 D91 PC1 R12 C11 P R14 S D2 8 C12 C13 R16 5 7 D R9 D C14 ST NC C4 U1 D IC2 R15 STR-A61×× STR-A61××M S/OCP VCC GND FB/OLP 1 2 3 4 C99 D3 C3 C8 PC1 C5 R3 R4 R5 R6 Figure 11-2 Circuit schematic for PCB circuit trace layout The above circuit symbols correspond to these of Figure 11-1. STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. 21 STR-A6100 Series 12.Reference Design of Power Supply As an example, the following show the power supply specification, the circuit schematic, the bill of materials, and the transformer specification. Power supply specification IC Input voltage Maximum output power STR-A6159 Output 5V/1A AC 85 V to AC 265 V 5W Circuit schematic Refer to Figure 11-2 Bill of materials Symbol Part type Ratings(1) Recommended Sanken Parts AC 250 V, 500 mA Symbol Part type Ratings(1) General, chip 10 Ω, 1/4 W General, chip 0 Ω, 1/4 W R91 Metal oxide, chip 270 kΩ, 1/4 W AM01A (Axial) R92 Metal oxide, chip 270 kΩ, 1/4 W AL01Z R93 Metal oxide, chip 270 kΩ, 1/4 W 5.1 V PC1 Photo-coupler PC123 or equiv General, chip 200 V, 1 A IC1 IC Fast recovery 1000 V, 0.2 A － See the specification Film 0.15 μF, 270 V L2 C2 Electrolytic 22 μF, 450 V C3 Ceramic, chip 4700 pF, 50 V C4 Electrolytic F1 Fuse R6 L1 (2) CM inductor 16.5 mH R9 ZNR1 (2) Varistor Open D1 General 600 V, 1 A D2 Fast recovery 200 V, 1 A D3 Zener, chip D4 D91 C1 (2) C5 C8 (2) EG01C (2) T1 Transformer Inductor 2.2 μF D11 Schottky, chip 60 V, 2 A C11 Electrolytic 680 μF, 10 V 22 μF, 50 V C12 Electrolytic 220 μF, 10 V Electrolytic 2.2 μF, 50 V C13 Ceramic, chip 0.1 μF, 50 V Ceramic, chip 0.33 μF, 50 V C14 Ceramic, chip Open (2) (2) Ceramic, chip 1000 pF, 630 V R11 General, chip 220 Ω, 1/8 W C99 (2) Ceramic, Y1 2200 μF, AC 250 V R12 General, chip 1.5 kΩ, 1/8 W R1 (2) General, chip Open R13 R2 (2) General, chip Open R14 General, chip, 1% 10 kΩ, 1/8 W R3 General, chip 10 Ω, 1/4 W R15 General, chip, 1% 10 kΩ, 1/8 W R4 General, chip 10 Ω, 1/4 W R16 General, chip 47kΩ, 1/8 W R5 General, chip 10 Ω, 1/4 W IC2 Shunt regulator VREF = 2.5 V TL431 or equiv C91 (2) Recommended Sanken Parts STR-A6159 SJPB-H6 General, chip, 1% 0 Ω, 1/8 W (1) Unless otherwise specified, the voltage rating of capacitor is 50 V or less and the power rating of resistor is 1/8 W or less. It is necessary to be adjusted based on actual operation in the application. (3) Resistors applied high DC voltage and of high resistance are recommended to select resistors designed against electromigration or use combinations of resistors in series for that to reduce each applied voltage, according to the requirement of the application. (2) STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. 22 STR-A6100 Series Transformer specification ▫ Primary inductance, LP ▫ Core size ▫ Al-value ▫ Winding specification : 3.1 mH : EI-16 : 114 nH/N2 (Center gap of about 0.188 mm) Symbol Number of turns (T) Primary winding P1 66 φ 0.18 UEW Primary winding P2 99 φ 0.18 UEW Auxiliary winding Output D S1 29 11 φ 0.18 UEW φ 0.4 × 3 TIW Winding Wire diameter (mm) Double-layer, solenoid winding Triple-layer, solenoid winding Solenoid winding Solenoid winding 5V VOUT(+) VDC P1 P2 D S1 P1 Bobbin Construction S1 P2 VOUT(-) D VCC D GND : Start at this pin Cross-section view STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. 23 STR-A6100 Series OPERATING PRECAUTIONS In the case that you use Sanken products or design your products by using Sanken products, the reliability largely depends on the degree of derating to be made to the rated values. Derating may be interpreted as a case that an operation range is set by derating the load from each rated value or surge voltage or noise is considered for derating in order to assure or improve the reliability. In general, derating factors include electric stresses such as electric voltage, electric current, electric power etc., environmental stresses such as ambient temperature, humidity etc. and thermal stress caused due to self-heating of semiconductor products. For these stresses, instantaneous values, maximum values and minimum values must be taken into consideration. In addition, it should be noted that since power devices or IC’s including power devices have large self-heating value, the degree of derating of junction temperature affects the reliability significantly. Because reliability can be affected adversely by improper storage environments and handling methods, please observe the following cautions. Cautions for Storage Ensure that storage conditions comply with the standard temperature (5 to 35°C) and the standard relative humidity (around 40 to 75%); avoid storage locations that experience extreme changes in temperature or humidity. Avoid locations where dust or harmful gases are present and avoid direct sunlight. Reinspect for rust on leads and solderability of the products that have been stored for a long time. Cautions for Testing and Handling When tests are carried out during inspection testing and other standard test periods, protect the products from power surges from the testing device, shorts between the product pins, and wrong connections. Ensure all test parameters are within the ratings specified by Sanken for the products. Remarks About Using Silicone Grease with a Heatsink When silicone grease is used in mounting the products on a heatsink, it shall be applied evenly and thinly. If more silicone grease than required is applied, it may produce excess stress. Volatile-type silicone greases may crack after long periods of time, resulting in reduced heat radiation effect. Silicone greases with low consistency (hard grease) may cause cracks in the mold resin when screwing the products to a heatsink. Our recommended silicone greases for heat radiation purposes, which will not cause any adverse effect on the product life, are indicated below: Type Suppliers G746 Shin-Etsu Chemical Co., Ltd. YG6260 Momentive Performance Materials Inc. SC102 Dow Corning Toray Co., Ltd. Soldering When soldering the products, please be sure to minimize the working time, within the following limits: • 260 ± 5 °C 10 ± 1 s (Flow, 2 times) • 380 ± 10 °C 3.5 ± 0.5 s (Soldering iron, 1 time) Soldering should be at a distance of at least 1.5 mm from the body of the products. Electrostatic Discharge When handling the products, the operator must be grounded. Grounded wrist straps worn should have at least 1MΩ of resistance from the operator to ground to prevent shock hazard, and it should be placed near the operator. Workbenches where the products are handled should be grounded and be provided with conductive table and floor mats. When using measuring equipment such as a curve tracer, the equipment should be grounded. When soldering the products, the head of soldering irons or the solder bath must be grounded in order to prevent leak voltages generated by them from being applied to the products. The products should always be stored and transported in Sanken shipping containers or conductive containers, or be wrapped in aluminum foil. STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. 24 STR-A6100 Series IMPORTANT NOTES The contents in this document are subject to changes, for improvement and other purposes, without notice. Make sure that this is the latest revision of the document before use. Application and operation examples described in this document are quoted for the sole purpose of reference for the use of the products herein and Sanken can assume no responsibility for any infringement of industrial property rights, intellectual property rights or any other rights of Sanken or any third party which may result from its use. Unless otherwise agreed in writing by Sanken, Sanken makes no warranties of any kind, whether express or implied, as to the products, including product merchantability, and fitness for a particular purpose and special environment, and the information, including its accuracy, usefulness, and reliability, included in this document. Although Sanken undertakes to enhance the quality and reliability of its products, the occurrence of failure and defect of semiconductor products at a certain rate is inevitable. Users of Sanken products are requested to take, at their own risk, preventative measures including safety design of the equipment or systems against any possible injury, death, fires or damages to the society due to device failure or malfunction. Sanken products listed in this document are designed and intended for the use as components in general purpose electronic equipment or apparatus (home appliances, office equipment, telecommunication equipment, measuring equipment, etc.). When considering the use of Sanken products in the applications where higher reliability is required (transportation equipment and its control systems, traffic signal control systems or equipment, fire/crime alarm systems, various safety devices, etc.), and whenever long life expectancy is required even in general purpose electronic equipment or apparatus, please contact your nearest Sanken sales representative to discuss, prior to the use of the products herein. The use of Sanken products without the written consent of Sanken in the applications where extremely high reliability is required (aerospace equipment, nuclear power control systems, life support systems, etc.) is strictly prohibited. When using the products specified herein by either (i) combining other products or materials therewith or (ii) physically, chemically or otherwise processing or treating the products, please duly consider all possible risks that may result from all such uses in advance and proceed therewith at your own responsibility. Anti radioactive ray design is not considered for the products listed herein. Sanken assumes no responsibility for any troubles, such as dropping products caused during transportation out of Sanken’s distribution network. The contents in this document must not be transcribed or copied without Sanken’s written consent. STR-A6100 - DS Rev.2.0 Dec. 25, 2013 SANKEN ELECTRIC CO.,LTD. 25