si-7510 an en

Application Information
SI-7510
5-Phase New Pentagon Stepper Motor Pre-Driver IC
Introduction
The SI-7510 is a pre-driver IC for driving 5-phase stepper
motors wound in the New Pentagon configuration (driver
circuit design patented by Oriental Motor Co., Ltd.). Direct
external control of motor driving functions are synchronized
by the built-in sequencer to an applied clock input (CL)
signal. The SI-7510 drive is implemented with a user-configurable output stage consisting of dual N-channel power
MOSFETs. This results in lower thermal resistance and
greater efficiency.
Features and Benefits
• Main supply voltage, VCC1 : 10 to 42 V
• Logic supply voltage, VCC2 : 3 to 5.5 V
• External forward and backward motor rotation control via
CW/CCW input
• External selection of 4-phase (full step) and 4-5–phase
(half step) driving via F/H pin
• Output enable/disable control via Enable pin (internal
sequencer function remains active during Disable state,
monitoring the clock input (CL) for automatic sequencing)
• Built-in charge pump circuit for driving external high-side
N-channel MOSFETs of all output phases
• Self-excitation constant current control set by external R-C
circuit time constant on RC input
• Maximum output current set by the SI-7510 and the
combined rating of the dual external MOSFET array
as follows:
Output Current
IO (max)
Recommended
MOSFET Array
Manufacturer
6A
SLA5073 and SLA5074
Sanken
7A
SLA5065 and SLA5068
Sanken
SI-7510-AN, Rev. 3
Not to scale
Figure 1. SI-7510 package is a 30-pin, fully molded DIP,
with a 1.778 mm pin pitch.
SANKEN ELECTRIC CO., LTD.
http://www.sanken-ele.co.jp/en/
March 2008
Table of Contents
Introduction
1
Features and Benefits
1
Specifications
3
Functional Block Diagram
Pin Assignment Table
Package Outline Drawing and Branding
Absolute Maximum Ratings
Recommended Operating Conditions
Electrical Characteristics
Load Supply Derating
Logic Truth Table
Typical Connection
Input and Output Timing Chart
Input Switching Timing
Motor Coil Excitation Sequence
Functional Description
Reset Control
Calculating Motor Current
Power-Down (Hold) Method
Output Chopping
Power Dissipation
Precautions for Use
SI-7510-AN, Rev. 3
3
3
4
5
5
6
7
7
8
9
9
10
11
11
11
11
12
13
15
SANKEN ELECTRIC CO., LTD.
March 2008
2
Functional Block Diagram
VCC2
VCC1
MC1 MC3 MC2
Charge Pump
Oscillator
OHGA
OHSA
OHGB
OHSB
OHGC
OHSC
OHGD
OHSD
OHGE
OHSE
Enable
High-Side Drive
MO
Sequencer
CL
F/H
CW/CCW
OLA
OLB
OLC
OLD
OLE
Low-Side Drive
Reset
RC
PWM
Control
Ref
Sense
Gnd
Pin Assignment and Function Table
Pin
Number
Symbol
Function
Pin
Number
Symbol
1
MC1
Capacitor connection terminal for charge pump
(connect externally to MC2)
16
OLE
Low-side MOSFET gate connection pin, phase E
2
MC3
Capacitor connection terminal for charge pump
(connect externally to GND)
17
OLD
Low-side MOSFET gate connection pin, phase D
3
MC2
Capacitor connection terminal for charge pump
(connect externally to MC1)
18
OLC
Low-side MOSFET gate connection pin, phase C
4
VCC1
Main supply voltage input
19
OLB
Low-side MOSFET gate connection pin, phase B
5
Enable
Output enable/disable logic input; set low to
disable output
20
OLA
Low-side MOSFET gate connection pin, phase A
6
VCC2
Logic supply voltage input
21
OHSE
High-side MOSFET source connection pin, phase E
7
MO
Monitor to detect motor position
22
OHGE
High-side MOSFET gate connection pin, phase E
8
CL
Clock logic input; internal sequencer updates
on positive edge
23
OHSD
High-side MOSFET source connection pin, phase D
9
F/H
4-phase (full step)/4–5-phase (half-step)
switching logic input; set low for full step
24
OHG
10
CW/CCW
Forward (CW) / backward (CCW) rotation logic
input; set low for forward rotation
25
OHSC
High-side MOSFET source connection pin, phase C
11
Reset
Reset logic input; set high to reset
26
OHGC
High-side MOSFET gate connection pin, phase C
27
OHSB
High-side MOSFET source connection pin, phase B
Function
High-side MOSFET gate connection pin, phase D
12
RC
R-C network connection terminal for
chopping off-time setting and blanking
time setting.
13
Ref
Reference voltage input terminal for motor
current setting
28
OHGB
High-side MOSFET gate connection pin, phase B
14
Sense
Sense motor current
29
OHSA
High-side MOSFET source connection pin, phase A
15
Gnd
Ground terminal
30
OHGA
High-side MOSFET gate connection pin, phase A
SI-7510-AN, Rev. 3
SANKEN ELECTRIC CO., LTD.
March 2008
3
Package Outline Drawing
27.10 (1.067)
27.10 max( 1.106 max)
16
8.80 (0.346)
10.0 max
(0.394 max)
30
1
15
1.0(0.039)
0.51 min (0.020 min)
10.16
(0.400)
5.08 max
(0.200 max)
2.54 min
(0.100 min)
1.778±0.25
(0.007±0.010)
0.48±0.1
(0.019±0.004)
0.25 +0.11
-0.05
(0.010 +0.004
-0.002 )
0° to 15°
Dimensions in mm
(Inch dimensions in parentheses, for reference only)
Package Branding
(1) (2) (3) (4) J A P A N
S K
Column
Parameter
(1)
Year Code*
(2)
Month Code*
S
I
-
7
5
1
0
Description
The last digit of year
Month
1
2
3
4
5
6
7
8
9
10
11
12
Alphabet
1
2
3
4
5
6
7
8
9
O
N
D
(3)
Control Code
1㨪9,
(4)
Control Code
1㨪9㧘0
0
*Year and month are based on when the branding is made.
Pb-free. Device composition
compliant with the RoHS directive.
SI-7510-AN, Rev. 3
SANKEN ELECTRIC CO., LTD.
March 2008
4
Absolute Maximum Ratings valid at TA = 25°C, unless otherwise noted
Characteristic
Symbol
Rating
Unit
44
V
VCC2
7
V
VIN
–0.3 to VCC2
V
VREF
–0.3 to VCC2
V
VSENSE
2
V
Main Supply Voltage
VCC1
Logic Supply Voltage
Logic Input Voltage
REF Input Voltage
Sense Input Voltage
Charge Pump Output Voltage
Notes
VMC3
48
V
Power Dissipation
PD
1.6
W
Operating Ambient Temperature
TA
–10 to 80
°C
Storage Temperature
TSTG
–20 to 150
°C
Junction Temperature
TJ
150
°C
Recommended Operating Conditions
Characteristic
Symbol
Conditions
Min.
Max.
Unit
Main Supply Voltage
VCC1
Insert a 5 V Zener diode between VCC1 and VMC3
when using the device with a VCC1 of 35 V or
more
10
42
V
Logic Supply Voltage
VCC2
3
5.5
V
REF Input Voltage
VREF
0.1
1
V
SI-7510-AN, Rev. 3
SANKEN ELECTRIC CO., LTD.
March 2008
5
ELECTRICAL CHARACTERISTICS valid at TA = 25°C,VCC1 = 24 V, VCC2 = 5 V; unless otherwise noted
Characteristic
Symbol
Main Supply Current
ICC1
Logic Supply Current
ICC2
Logic Input Voltage
Logic Input Current
Enable Pin Input Current
Ref Pin Input Current
Test Conditions
Min.
Typ.
Max.
Unit
–
–
25
mA
–
–
10
mA
VIL
VCC2 = 5 V
–
–
1.25
V
VIH
VCC2 = 5 V
3.75
–
–
V
IIL
VIL = 0 V
–20
–
20
μA
IIH
VIH = 5.5 V
–20
–
20
μA
IENA
VENA = 0 V
–100
–
20
μA
IREF
IENA = 0 to 5.5 V
–20
–
20
μA
–
1
–
V
μA
Sense Pin Voltage
VSENSE
VREF = 1 V
Sense Pin Current
ISENSE
VSENSE at 0 V and at 2 V
–20
–
20
VMOL
IMOL = 1 mA
–
–
1
V
VMOH
IMOH = –1 mA
4
–
–
V
VRCL
–
0.5
–
V
VRCH
–
1.5
–
V
MO Pin Output Voltage
RC Pin Threshold Voltage
RC Pin Outflow Current
IRC
Charge Pump Output Voltage
VMC3
High-Side Output Voltage (Between
gate sources)
VHGSL
VHGSH
VRC = 0 V
–
300
–
μA
No external Zener diode
–
VCC1 + 9
–
V
–
–
1
V
–
8.5
–
V
No external Zener diode
VLGL
–
–
1
V
VLGH
–
7.5
–
V
Maximum Clock Frequency
fCK
100
–
–
kHz
Low-Side Output Voltage
Minimum Input Clock Pulse Width
tCON
1
–
–
μs
Power-On Reset Time
tPW
–
1.5
–
μs
Output Delay Time
tIO
–
2
–
μs
CW/CCW and F/H Pins Input Data
Setup Time
tICS
Measured from rising edge of input clock pulse
500
–
–
ns
CW/CCW and F/H Pins Input Data
Hold Time
tICH
Measured from rising edge of input clock pulse
500
–
–
ns
SI-7510-AN, Rev. 3
(On, high portion of pulse)
SANKEN ELECTRIC CO., LTD.
March 2008
6
Load Supply Derating
Allowable Load Supply Voltage
VCC1 (V)
45
40
35
30
25
20
15
10
0
10
20
60
30
40
50
Ambient Temperature, TA (°C)
70
80
Logic Input Truth Table1
Each function listed below operates independently of the CL input signal
Pin Name (Number)
Function
CL (8)
Clock input
Enable (5)
Output control
Low Level
High Level
(Positive edge)
Disable2
Enable
F/H (9)
Stepping mode control
Full step
Half step
CW/CCW (10)
Rotation direction control
Forward (CW)
Backward (CCW)
Reset (11)
Asynchronous Reset input
Normal operation
Logic reset3
1At
each CL input positive edge, the internal sequencer automatically responds to current state of logic pins.
sequencer responds to CL input during both Disable and Enable states of Enable pin.
3After reset, device turns-on: high-side phase A, low-side phase C, and low-side phase D.
2Internal
SI-7510-AN, Rev. 3
SANKEN ELECTRIC CO., LTD.
March 2008
7
95
CL
90
CW/CCW
CCW Full Step
100
Conditions for Switching
Input Logic Signals
Disable
105
110
Input and Output Timing Chart and Motor Coil Excitation Sequence
CW Half Step
CCW Half Step
CCW Full Step
CW Full Step
SI-7510-AN, Rev. 3
SANKEN ELECTRIC CO., LTD.
OLA
OLB
OLC
OLD
OLE
MO
OHA
OHB
OHC
OHD
OHE
CL
Reset
Enable
CW/CCW
F/H
0
5
Input and Output Timing
10
15
20
25
30
35
40
45
50
55
60
65
70
75
80
Prohibited
Prohibited
Safe
Switching
Switching
Switching
Range
Range Range
(500 ns)
(500 ns)
Disable
Reset
85
F/H
March 2008
8
SI-7510-AN, Rev. 3
4-5–Phase
Half Step
4-Phase
Full Step
Excitation
Mode
B
B
B
E
B
D
SANKEN ELECTRIC CO., LTD.
A
10
New Pentagon
5-phase motor
C
C
New Pentagon
5-phase motor
A
D
D
0 (Reset)
C
C
E
E
B
B
C
C
New Pentagon
5-phase motor
A
11
New Pentagon
5-phase motor
D
D
B
E
B
C
A
12
New Pentagon
5-phase motor
C
New Pentagon
5-phase motor
A
C
New Pentagon
5-phase motor
A
E
B
2
D
E
A
2
1
New Pentagon
5-phase motor
A
A
New Pentagon
5-phase motor
1
0 (Reset)
Motor Coil
Excitation Sequence
March 2008
9
D
D
D
E
E
E
B
B
B
A
3
C
C
New Pentagon
5-phase motor
A
13
New Pentagon
5-phase motor
C
New Pentagon
5-phase motor
A
3
CCW
D
D
D
E
E
E
B
B
B
C
C
C
New Pentagon
5-phase motor
A
5
New Pentagon
5-phase motor
A
B
B
C
New Pentagon
5-phase motor
A
E
E
B
15
D
D
D
E
A
5
14
New Pentagon
5-phase motor
C
A
4
New Pentagon
5-phase motor
C
New Pentagon
5-phase motor
A
4
D
D
D
E
E
E
B
B
B
C
A
16
New Pentagon
5-phase motor
A
6
New Pentagon
5-phase motor
C
C
New Pentagon
5-phase motor
A
6
D
D
D
E
E
E
CW
B
B
B
C
New Pentagon
5-phase motor
A
17
D
D
B
E
B
C
A
18
New Pentagon
5-phase motor
C
New Pentagon
5-phase motor
A
C
New Pentagon
5-phase motor
A
E
B
8
D
E
A
8
7
New Pentagon
5-phase motor
C
C
New Pentagon
5-phase motor
A
7
D
D
D
E
E
E
B
B
B
A
19
New Pentagon
5-phase motor
A
9
C
New Pentagon
5-phase motor
C
C
New Pentagon
5-phase motor
A
9
D
D
D
E
E
E
Typical Connection
C1
C2
24 V
5V
3
2
MC2 MC3
1
6
VCC2 MC1
4
VCC1
OHGA
OHSA
OHGB
OHSB
OHGC
OHSC
OHGD
OHSD
OHGE
OHSE
C4
5
7
8
Logic Signal
Input and Output
9
10
11
Enable
MO
SI-7510
CL
30
29
28
27
26
25
24
23
22
21
C3
CW/CCW
20
OLA
19
OLB
18
OLC
Reset
Ref
17
OLD
16
OLE
R2
RC
12
Ct
Gnd
15
Sense
15
1
SLA5073
8
13
4
3
2
6
SLA5074
5
10
(Pins 11 to 15
not connected)
1
14
RS
8
IO
Rt
External Component Typical Values
(for reference use only):
Component
Value
Component
Value
R1
510 Ω
C1
2200 pF
R2
100 Ω (varistor)
C2, C4
0.01 μF
R3
20 kΩ
C3
0.1 μF
RS
0.33 Ω, 1 to 2 W
Ct
420 to 1100 pF
Rt
15 to 75 kΩ
SI-7510-AN, Rev. 3
10
5-Phase
New Pentagon
Stepper
Motor
9
7
13
5
F/H
R3
R1
4
3
9
7
14
12
2
6
11
• Take precautions to avoid noise on the VCC lines; noise
levels greater than 0.5 V on a VCC line may cause device
malfunction, so be careful when laying out the traces.
• Calculation of IO:
IO = VRS / RS
IOM = IO / 2, where IOM is the motor coil current
• Calculation of tOFF:
tOFF = 1.1 × Rt × Ct
SANKEN ELECTRIC CO., LTD.
March 2008
10
Functional Description
Reset Control
Reset is non-synchronous reset function. Figure 2 shows
the motor current path after the internal sequencer resets the
device logic.
IOM
Calculating Motor Current
The calculation for setting motor current, IOM , for the SI-7510 is
determined by the ratios of the external components R1 and R2 ,
and the current sense resistor, RS. The SI-7510 controls the total
set current, IO , and the relationship between IO and IOM is as follows:
IO = 2 × IOM
(1)
The current sense voltage, VSENSE , is generated by IO flowing into
the current sense resistor, RS . The ratio of VREF to VSENSE is 1:1,
so IO can be calculated as follows (refer to figure 3):
IO = VREF / RS
(2)
New Pentagon
5-Phase Motor
IOM
2×I OM
VCC1
On
Phase A
Phase B
Phase C
Phase D
On
On
To SI-7510
IO = 2×IOM
(3)
Figure 2. Motor current path after logic reset
Power-Down (Hold) Method
If the motor torque is to be reduced to enter a motor-hold mode,
an external circuit consisting of a resistor, RX , and a transistor,
Q1, should be added, as shown in figure 3. For the current, IOPD ,
required to hold a given torque, the values for the external components can be calculated as follows:
VCC2
1
×
IOPD =
R1 (R2 + RX )
RS
1+ R × R
2
X
Phase E
RS
where VREF is calculated as:
VREF = VCC2 × R2 / (R1 + R2 )
IOM
IOM
VCC2
Ref (13)
RX
(4)
In the above equation, the saturation voltage of the transistor is
not taken into consideration.
SI-7510
R1
Power-Down
Signal
R2
Q1
Sense (14）
V REF
RS
Figure 3. Motor current setting circuit
SI-7510-AN, Rev. 3
SANKEN ELECTRIC CO., LTD.
March 2008
11
Output Chopping
The operating output and feedback pins waveforms during chopping are shown in figure 4, and the current paths during chopping
are shown in figure 5.
Chopping
On-Time
Blanking Time
RC Terminal
Voltage, VRC
Chopping Off Time This product controls output chopping
off-time. Chopping off-time is determined by the time constant
of the external Rt - Ct circuit connected to the RC terminal. The
off-time is the duration for the RC terminal voltage to decrease
from approximately 1.5 V to 0.5 V. The chopping off-time can be
calculated as:
tOFF ≈ 1.1 × Rt × Ct
Chopping
Off-Time
1.5 V
0.5 V
Ringing Noise
Sense Terminal
Voltage, VSENSE
Reference Voltage
Level
VREF
(5)
where Rt is 15 to 75 kΩ, Ct is 420 to 1100 pF (recommended
value).
0V
Blanking Time The Rt - Ct circuit time constant is also related to
the blanking time, tBRK . Blanking time prevents malfunction due
to ringing noise which occurs after chopping transitions from off
to on. Blanking time is the duration for the RC terminal voltage to increase from approximately 0.5 V to 1.5 V. When the RC
terminal voltage increases to this level, a current of approximately
200 μA flows out of the RC terminal.
IO
Nominal
Motor Current, IO
Set Current Level
ION
IOFF
0A
Figure 4. Operating waveforms during chopping
Vcc1
Vcc1
On
ION
ION
ION
IOFF
IOFF
ION
New Pentagon
5-Phase Motor
Off
On
On
New Pentagon
5-Phase Motor
Off
Off
Off
On
Off
Off
ON OFF
RS
RS
(Chopping On-Time)
(Chopping Off-Time)
Figure 5. Current path during chopping; dotted red line indicates path of current: (left) during
chopping on-time ( ION ), and (right) during chopping off-time ( IOFF )
SI-7510-AN, Rev. 3
SANKEN ELECTRIC CO., LTD.
March 2008
12
Blanking time is calculated as:
• Average current ripple, IOM
tBRK ≈ Ct / ( 200 ×10 –6 )
(6)
• Excitation mode
Even if the sense voltage, VSENSE , becomes higher than the reference voltage, VREF , during the blanking time interval, the power
control circuit does not operate and the device output always
remains in the On state. Because of this, if the Ct value is too
large when the output current value must be set small, the output
current may not fall to the set value. In addition, if the Ct value is
too small, it causes malfunction due to ringing noise.
• Chopping time during current control, tON and tOFF
Chopping On-Time Chopping on-time is determined by: VCC1,
Sample Power Dissipation Calculation (Estimation) The
the motor output time constant, and the chopping off-time.
Note: In addition, during the motor actual operation, chopping
on-time changes because the inductance of the coils changes due
to crossing magnetic flux lines.
Calculation of Power Dissipation of Power MOSFETs
The SI-7510 connects to the power MOSFETs of the output stage
and drives the motor. In this section, a method of calculating
an estimate of the power dissipation of the power MOSFETs is
shown. This calculation method uses an approximation formula,
and factors such as parameter changes during actual operation
are not considered in this example. Therefore, please confirm the
thermal characteristics of the power MOSFETs in actual operation to determine the final design.
Parameters for Power Dissipation Calculation The follow-
ing parameters are required to calculate power dissipation of the
power MOSFETs:
• Power MOSFET on-resistance, RDS(ON)
• Power MOSFET body diode forward voltage, VSD
The maximum specifications of the power MOSFETs should be
used for RDS(ON) and VSD. In addition, tON and tOFF must be confirmed in actual operation.
method shown below calculates a power dissipation case for each
phase, in each excitation mode. The example MOSFET array
uses the SLA5073 for phases A, B, and C, and the SLA5074 for
phases D and E.
The dissipation of each case is given in table 1 for 4-phase excitation (full step) and in table 2 for 4-5–phase excitation (half step).
The symbols listing in the tables refer to the following formulas:
• H1 = I2O × RDS(ON) (W)
• H2 = I2OM × RDS(ON) (W)
• L1 = I2O × RDS(ON) × tON / (tON + tOFF)
+ IO × VSD × tOFF / (tON + tOFF) (W)
• L2 = I2OM × RDS(ON) × tON / (tON + tOFF)
+ IOM × VSD × tOFF / (tON + tOFF) (W)
where
IO = IOM × 2, IO = VREF / RS , and
tON : tOFF = 1 : 5 (estimated).
SI-7510-AN, Rev. 3
SANKEN ELECTRIC CO., LTD.
March 2008
13
Table 1. 4-Phase Excitation (Full Step)
Step
MOSFET
SLA5073
SLA5074
Reset (0)
1
2
3
4
5
6
7
8
9
A
B
C
A
B
C
A
B
C
A
B
C
A
B
C
A
B
C
A
B
C
A
B
C
A
B
C
A
B
C
H1
–
L2
H2
H2
–
–
H1
–
–
H2
H2
L2
–
H1
L1
–
H2
L2
L2
–
–
L1
–
–
L2
L2
H2
–
L1
D
E
D
E
D
E
D
E
D
E
D
E
D
E
D
E
D
E
D
E
L2
–
L1
–
L2
L2
–
L1
–
L2
H2
–
H1
–
H2
H2
–
H1
–
H2
Dissipation in Hold State: If the optional Hold state is used, calculate the dissipation at that step as follows (this example uses step 0, Reset):
• Dissipation of SLA5073: H1 + L2
• Dissipation of SLA5074: L2
(W)
(W)
Dissipation in Rotation: Dissipation during normal operation is calculated as an average dissipation, as follows:
• Dissipation of SLA5073: (H1 × 3 + H2 × 6 + L1 × 3 + L2 × 6) / 10
(W)
• Dissipation of SLA5074: (H1 × 2 + H2 × 4 + L1 × 2 + L2 × 4) / 10
(W)
Table 2. 4-5–Phase Excitation (Half Step)
Step
MOSFET
SLA5073
SLA5074
Reset (0)
A
1
B
C
A
H1
–
L2
D
E
L2
–
SLA5074
3
B
C
A
B
C
H1
–
–
H2
H2
–
D
E
D
E
L1
–
L1
–
L1
10
SLA5073
2
11
4
A
B
C
–
H1
–
D
E
–
L2
12
5
A
B
C
–
H1
–
D
E
L2
–
13
6
A
B
C
–
H1
–
D
E
L1
–
14
7
A
B
C
–
H2
H2
D
E
L1
–
15
A
8
B
C
A
–
–
H1
D
E
L1
16
9
B
C
A
L2
–
H1
D
E
–
L2
17
B
C
L1
–
H1
D
E
–
–
18
19
A
B
C
A
B
C
A
B
C
A
B
C
A
B
C
A
B
C
A
B
C
A
B
C
A
B
C
A
B
C
L1
–
H2
L1
–
–
L2
L2
–
–
L1
–
–
L1
–
–
L1
–
–
L2
L2
–
–
L1
H2
–
L1
H1
–
L1
D
E
D
E
D
E
D
E
D
E
D
E
D
E
D
E
D
E
D
E
H2
–
H1
–
H1
–
H1
–
H2
H2
–
H1
–
H1
–
H1
–
H2
–
–
Dissipation in Hold State: If the optional Hold state is used, calculate the dissipation at that step as follows (this example uses step 0, Reset):
• Dissipation of SLA5073: H1 + L2
• Dissipation of SLA5074: L2
(W)
(W)
Dissipation in Rotation: Dissipation during normal operation is calculated as an average dissipation, as follows:
• Dissipation of SLA5073: (H1 × 9 + H2 × 6 + L1 × 9 + L2 × 6) / 20
(W)
• Dissipation of SLA5074: (H1 × 6 + H2 × 4 + L1 × 6 + L2 × 4) / 20
(W)
SI-7510-AN, Rev. 3
SANKEN ELECTRIC CO., LTD.
March 2008
14
The allowable power dissipation of each MOS array is shown in
the follow table:
External
Heatsink
Connection
MOSFET
None
Infinite
Allowable Power
Dissipation
(W)
MOSFET Thermal
Resistance, Rθj-a
(°C/W)
SLA5073
5
25
SLA5074
4.8
26
SLA5073
30
4.17
SLA5074
25
5
To choose a heatsink, refer to the calculated dissipation, the
allowable power dissipation, and figure 6.
When deciding on a heatsink for the SLA5073 or SLA5074,
please confirm the temperature of the product in actual operation. The above calculated values include errors because they are
approximate values. Please choose a heatsink which keeps the
aluminum exposed thermal pad on the back side of the SLA5073
or SLA5074 at a temperature of 100 degrees Celsius or less under
worst-case conditions. Please refer to the product specifications
for the details of SLA5073 and SLA5074.
Precautions for Use
Noise If a noise is superimposed on VCC2 or a logic input, the
internal sequencer may react to the noise and a invalid sequence
step may occur. Please be careful of noise generation.
Power Supply Sequence When turning off the SI-7510, it is
recommended to first turn-off VCC1. If VCC2 is turned off first,
the output stage of the SI-7510 becomes high impedance before
charges accumulated on the MOSFET gates are eliminated completely. During self-discharge of charges on the MOSFET gates,
the MOSFET is turned on. Please be careful of the overcurrent
which occurs during this time.
Power Dissipation, P (W)
6
5
No external heatsink
4
3
2
1
0
0
20
40
120
60
80
100
Ambient Temperature, TA (°C)
140
160
Figure 6. MOSFET power dissipation versus temperature, without heatsink
SI-7510-AN, Rev. 3
SANKEN ELECTRIC CO., LTD.
March 2008
15
Sanken reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in
the performance, reliability, or manufacturability of its products. Therefore, the user is cautioned to verify that the information in this publication is
current before placing any order.
When using the products described herein, the applicability and suitability of such products for the intended purpose shall be reviewed at the users
responsibility.
Although Sanken undertakes to enhance the quality and reliability of its products, the occurrence of failure and defect of semiconductor products
at a certain rate is inevitable.
Users of Sanken products are requested to take, at their own risk, preventative measures including safety design of the equipment or systems
against any possible injury, death, fires or damages to society due to device failure or malfunction.
Sanken products listed in this publication are designed and intended for use as components in general-purpose electronic equipment or apparatus
(home appliances, office equipment, telecommunication equipment, measuring equipment, etc.). Their use in any application requiring radiation
hardness assurance (e.g., aerospace equipment) is not supported.
When considering the use of Sanken products in applications where higher reliability is required (transportation equipment and its control systems
or equipment, fire- or burglar-alarm systems, various safety devices, etc.), contact a company sales representative to discuss and obtain written
confirmation of your specifications.
The use of Sanken products without the written consent of Sanken in applications where extremely high reliability is required (aerospace equipment, nuclear power-control stations, life-support systems, etc.) is strictly prohibited.
The information included herein is believed to be accurate and reliable. Application and operation examples described in this publication are
given for reference only and Sanken assumes no responsibility for any infringement of industrial property rights, intellectual property rights, or
any other rights of Sanken or any third party that may result from its use. The contents in this document must not be transcribed or copied without
Sanken’s written consent.
SI-7510-AN, Rev. 3
SANKEN ELECTRIC CO., LTD.
March 2008
16