str-v653 an en

STR-V600 APPLICATION NOTE
STR-V600
Application Note
Rev.1.1
SANKEN ELECTRIC CO., LTD.
http/www.sanken-ele.co.jp/en/
Copy Right: SANKEN ELECTRIC CO., LTD.
Page.1
Rev.1.1
STR-V600 APPLICATION NOTE
Contents
General Descriptions ----------------------------------------------------------------------- 3
1. Absolute Maximum Ratings --------------------------------------------------------- 4
2. Electrical Characteristics ------------------------------------------------------------ 4
2.1 Electrical Characteristics of Control Part --------------------------------- 4
2.2 Electrical Characteristics of MOSFET ------------------------------------- 5
3. Functional Block Diagram ----------------------------------------------------------- 6
4. Pin List Table --------------------------------------------------------------------------- 6
5. Typical Application Circuit --------------------------------------------------------- 7
6. Package Diagram ---------------------------------------------------------------------- 8
7. Marking Diagram --------------------------------------------------------------------- 8
8. Functional Description --------------------------------------------------------------- 9
8.1 Startup Operation --------------------------------------------------------------- 9
8.2 Undervoltage Lockout (UVLO) Circuit ------------------------------------ 9
8.3 Bias Assist Function ------------------------------------------------------------- 9
8.4 Constant Voltage Control Operation --------------------------------------- 10
8.5 Auto Standby Mode Function ----------------------------------------------- 11
8.6 Random Switching Function ------------------------------------------------- 11
8.7 Brown-In and Brown-Out Function ---------------------------------------- 12
8.8 Overcurrent Protection Function (OCP) ---------------------------------- 14
8.9 Overvoltage Protection Function (OVP) ---------------------------------- 14
8.10 Overload Protection Function (OLP) -------------------------------------- 15
8.11 Thermal Shutdown Function (TSD) ---------------------------------------- 15
9. Design Notes --------------------------------------------------------------------------- 16
9.1 Peripheral Components ------------------------------------------------------- 16
9.2 PCB trace layout and Component placement ------------------------------- 17
IMPORTANT NOTES ------------------------------------------------------------------- 19
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Page.2
Rev.1.1
STR-V600 APPLICATION NOTE
Rev.1.1
General Descriptions
Package
The STR-V600 series is a power IC for switching power
supplies, incorporating a power MOSFET and a current
mode PWM controller IC in one package.
The SIP8L full mold package features low height and
creeping distance of 4mm or longer between high and low
voltage pin bases.
To achieve low power consumption, the product includes a
startup circuit and a standby function in the controller.
The switching modes are automatically changed according
to load conditions so that the PWM mode is in normal
operation and the burst mode is in light load condition.
The rich set of protection features helps to realize low
component counts, and high performance-to-cost power
supply.
SIP8L
Features
Applications
 SIP8L package (2.54 pitch, straight lead): Creeping
distance of 4mm or longer between high voltage and low
voltage pin bases. Low height of less than 12 mm from
PCB (Printed Circuit Board)
 Current mode PWM control
 Auto Standby function: improves efficiency by burst
mode operation in light load
▫ Normal operation: PWM mode
▫ Light load operation: Burst mode
 No load power consumption < 25 mW
 Brown-In and Brown-Out function: auto-restart, prevents
excess input current and heat rise at low input voltage
 Random Switching function: reduces EMI noise, and
simplifies EMI filters
 Slope Compensation function: avoids subharmonic
oscillation
 Leading Edge Blanking function
 High Speed Latch Release function
 Protection features
▫ Overcurrent Protection function (OCP): pulse-by-pulse, with
input compensation function
▫ Overvoltage Protection function (OVP): latched shutdown
▫ Overload Protection function (OLP): auto-restart, with timer
▫ Thermal Shutdown function (TSD): latched shutdown
 Standby power supply
 Home appliances
 Digital appliances
 Office automation (OA) equipment
 Industrial apparatus
 Communication facilities
Product Lineup
Power MOSFET
Output Power, POUT * (W)
Part Number
fOSC (kHz)
VDSS (min)
(V)
RDS(ON) (max)
(Ω)
230VAC
85 to 265VAC
STR-V653
67
650
1.9
30
23
* The listed output power is based on the thermal ratings, and the peak output power can be 120% to 140% of the value stated here.
At low output voltage and short duty cycle, the output power may be less than the value stated here.
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Page.3
STR-V600 APPLICATION NOTE
Rev.1.1
1. Absolute Maximum Ratings
 Refer to the datasheet of each product for these details.
 The polarity value for current specifies a sink as "+," and a source as "−," referencing the IC.
 Unless otherwise specified, Ta is 25 °C
Characteristic
Pins
Symbol
Rating
Unit
Drain Peak Current
1−3
IDPEAK
6.7
A
Single pulse
Avalanche Energy
1−3
EAS
99
mJ
ILPEAK
2.9
A
Single pulse
VDD=99V,L=20mH
S/OCP Pin Voltage
3−5
VOCP
Control Part Input Voltage
8−5
VCC
32
V
FB/OLP Pin Voltage
6−5
VFB
−0.3 to 14
V
FB/OLP Pin Sink Current
6−5
IFB
1.0
mA
BR Pin Voltage
4−5
VBR
−0.3 to 7
V
BR Pin Sink Current
4−5
IBR
1.0
mA
1−3
PD1
10.8
W
With infinite heat sink
Power Dissipation of MOSFET
1.6
W
Without heat sink
−2 to 6
Notes
V
Power Dissipation of Control Part
8−5
PD2
1.2
W
Operating Ambient Temperature
−
Top
−30 to +125
°C
Storage Temperature
−
Tstg
−40 to +125
°C
Channel Temperature
−
Tch
+150
°C
2. Electrical Characteristics
 Refer to the datasheet of each product for these details.
 The polarity value for current specifies a sink as "+," and a source as "−," referencing the IC.
2.1 Electrical Characteristics of Control Part
Unless otherwise specified, Ta is 25 °C, VCC is 18 V
Characteristic
Pins
Symbol
Min.
Typ.
Max.
Unit
8−5
VCC(ON)
13.8
15.3
16.8
V
8−5
VCC(OFF)
7.3
8.1
8.9
V
Circuit Current in Operation
8−5
ICC(ON)
−
−
4
mA
Minimum Startup Voltage
8−5
VST(ON)
−
38
−
V
Startup Current
Startup Current Supply Threshold
Biasing Voltage
Frequency Modulation Deviation
Oscillation Frequency Fluctuation
Range
Maximum Duty Cycle
8−5
I STARTUP
−3.7
−2.5
−1.5
mA
8−5
VCC(BIAS)
8.5
9.5
10.5
V
1−5
fOSC(AVE)
60
67
74
kHz
1−5
Δf
−
5
−
kHz
1−5
DMAX
77
83
89
%
Minimum On-time
−
tON(MIN)
−
550
−
ns
Leading Edge Blanking Time
−
tBW
−
330
−
ns
OCP Compensation Coefficient
−
DPC
−
20
−
mV/µs
OCP Compensation Duty Cycle Limit
−
DDPC
−
36
−
%
Operation Start Voltage
Operation Stop Voltage
(1)
(1)
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Page.4
Notes
VCC=12V
STR-V600 APPLICATION NOTE
Characteristic
OCP Threshold Voltage at Zero Duty
Cycle
OCP Threshold Voltage at 36% Duty
Cycle
Maximum Feedback Current
Rev.1.1
Pins
Symbol
Min.
Typ.
Max.
Unit
3−5
VOCP(L)
0.70
0.78
0.86
V
3−5
VOCP(H)
0.81
0.90
0.99
V
6−5
IFB(MAX)
−340
−230
−150
µA
Minimum Feedback Current
FB/OLP Pin Oscillation Stop
Threshold Voltage
OLP Threshold Voltage
6−5
IFB(MIN)
−30
−15
−7
µA
6−5
VFB(OFF)
0.85
0.95
1.05
V
6−5
VFB(OLP)
7.3
8.1
8.9
V
OLP Delay Time
6−5
tOLP
54
68
82
ms
OLP Operation Current
8−5
ICC(OLP)
−
300
600
µA
FB/OLP Pin Clamp Voltage
6−5
VFB(CLAMP)
11
12.8
14
V
Brown-In Threshold Voltage
4−5
VBR(IN)
5.2
5.6
6
V
Brown-Out Threshold Voltage
4−5
VBR(OUT)
4.45
4.8
5.15
V
BR Pin Clamp Voltage
BR Function Disable Threshold
Voltage
VCC Pin OVP Threshold Voltage
4−5
VBR(CLAMP)
6
6.4
7
V
4−5
VBR(DIS)
0.3
0.48
0.7
V
8−5
VCC(OVP)
26
29
32
V
8−5
ICC(LATCH)
−
700
−
µA
−
Tj(TSD)
135
−
−
°C
Latch Circuit Holding Current
(2)
Thermal Shutdown Temperature
(1)
(2)
Notes
VCC(BIAS) > VCC(OFF) always.
A latch circuit is a circuit operated with Overvoltage Protection (OVP) and/or Thermal Shutdown Protection (TSD) in operation.
2.2 Electrical Characteristics of MOSFET
Unless otherwise specified, Ta is 25 °C
Characteristic
Pins
Symbol
Min.
Typ.
Max.
Unit
Drain-to-Source Breakdown Voltage
1–3
VDSS
650
−
−
V
Drain Leakage Current
1–3
IDSS
−
−
300
μA
On-Resistance
1–3
RDS(ON)
−
−
1.9
Ω
Switching Time
1–3
tf
−
−
250
ns
−
θch−F
−
−
3.0
°C/W
Thermal Resistance
*
* The thermal resistance between the channels of the MOSFET and the internal frame
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Page.5
Notes
STR-V600 APPLICATION NOTE
Rev.1.1
3. Functional Block Diagram
D/ST
VCC
8
VCC
STRATUP
UVLO
REG
OVP
VREG
1
D/ST
TSD
BR
4
BR
Brown-in/Out
6.4V
DRV
PWM OSC
SQ
R
OCP
Drain Peak current
Compensation
OLP
VCC
7V
S/OCP
Feedback
Control
FB/OLP
6
FB
LEB
Slope
Compensation
12.8V
GND
3
S/OCP
GND
5
4. Pin List Table
1
VCC
FB/OLP
GND
BR
S/OCP
D/ST
8
Number
Name
1
D/ST
2
−
3
S/OCP
4
BR
5
GND
6
FB/OLP
7
−
8
VCC
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Page.6
Function
MOSFET drain pin and input of the startup current
(Pin removed)
MOSFET source and input of Overcurrent Protection
(OCP) signal
Input of Brown-In and Brown-Out detection voltage
Ground
Feedback signal input for constant voltage control
signal and input of Overload Protection (OLP) signal
(Pin removed)
Power supply voltage input for Control Part and input
of Overvoltage Protection (OVP) signal
STR-V600 APPLICATION NOTE
Rev.1.1
5. Typical Application Circuit
The following drawings show circuits enabled and disabled the Brown-In/Brown-Out function.
The following design features should be observed:
 The PCB traces from the D/ST pin (pin 1) should be as wide as possible, in order to enhance thermal dissipation.
In applications having a power supply specified such that V DS has large transient surge voltages, a clamp snubber circuit of
a capacitor-resistor-diode (CRD) combination should be added on the primary-side winding P, or a damper snubber circuit
of a capacitor (C) or a resistor-capacitor (RC) combination should be added between the D/ST pin and the S/OCP pin.
CRD clamp snubber
BR1
VAC
VOUT
R54
R1
C5
RA
L51
D51
T1
PC1
C1
R51
P
R55
C51
D1
RB
D2
D/ST
NC
C53
C52 R53
R2
U51
8
1
C4
R52
S
VCC
R56
D
C2
U1
GND
STR-V600
S/OCP BR GND FB/OLP
3
C, CR
damper snubber
RC
4
5
6
C10
C3
PC1
ROCP
C9
Figure 5-1 Typical application circuit instance, enabled Brown-In/Brown-Out function (DC line detection)
CRD clamp snubber
BR1
L51
D51
T1
VAC
VOUT
R54
R1
C5
PC1
C1
P
R55
C51
D1
S
D2
D/ST
C4
NC
R52
U51
VCC
C2
U1
GND
S/OCP BR GND FB/OLP
3
4
5
6
C3
PC1
C9
ROCP
Figure 5-2 Typical application circuit example, disabled Brown-In/Brown-Out function
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R56
D
STR-V600
C, CR
damper snubber
C53
C52 R53
R2
8
1
R51
Page.7
STR-V600 APPLICATION NOTE
Rev.1.1
6. Package Diagram
 SIP8L package (2.54 pitch, straight lead)
 The pin 2 removed to provide greater creepage and clearance isolation between the high voltage pins (pins 1: D/ST) and
the low voltage pin (pin 3: S/OCP).
 Creeping distance of 4mm or longer between high voltage and low voltage pin bases.
 Low height of less than 12 mm from PCB (Printed Circuit Board)
4±0.2
9 ±0.2
1.2±0.1
(At base of pin)
7.2 ±0.5
2.3 ±0.2
Gate burr
1.15 +0.2
-0.1
0.55 +0.2
-0.1
0.55
+0.2
-0.1
7xP2.54±0.1=(17.78)
(At base of pin)
C1.5 ±0.5
0.7
20.15 ±0.3
0.7
Front view
1
2
3
4
5
6
7
0.7
0.7
Side view
8
NOTES:
 Unit: mm
 Gate burr indicates protrusion of 0.3 mm (max).
 Pin treatment Pb-free. Device composition compliant with the RoHS directive.
7. Marking Diagram
YMDD
Lot Number
Y is the last digit of year (0 to 9)
M is the month (1 to 9, N or D)
DD is a period of days (01 to 31)
STRV6xx
Part Number
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Page.8
STR-V600 APPLICATION NOTE
Rev.1.1
8. Functional Description
 All of the parameter values used in these descriptions are typical values, unless they are specified as minimum or maximum.
 With regard to current direction, "+" indicates sink current (toward the IC) and "–" indicates source current (from the IC).
8.1 Startup Operation
Figure 8-1 shows the VCC pin peripheral circuit, disabled the
Brown-In/Brown-Out function by connecting the BR pin trace to the
GND pin trace.
In Figure 8-1, the Startup Current, ISTARTUP, which is a constant current
of –2.5 mA, is provided from the IC to capacitor C2 connected to the
VCC pin, and it charges C2. When the VCC pin voltage increases to
VCC(ON) = 15.3 V, the IC starts operation. After that, the startup circuit
stops automatically, in order to eliminate its own power consumption.
During the IC operation, the rectified voltage from the auxiliary winding
voltage, VD, of Figure 8-1 becomes a power source to the VCC pin.
The winding turns of the winding D should be adjusted so that the VCC
pin voltage is applied to equation (1) within the specification of the input
voltage range and output load range of the power supply. The target
voltage of the winding D is about 18 V.
VCC(ON )  VCC( INT )
ISTARTUP
C1
P
1
D/ST
VCC
D2
8
U1
BR
4
C2
GND
R2
VD
D
5
Figure 8-1 VCC pin peripheral circuit
(1)
The startup time, tSTART, is determined by the value of C2, and it is
approximately given as below:
t START  C2 
T1
(2)
ICC(ON)
= 4mA(max)
Stop
where:
tSTART is the startup time in s, and
VCC(INT) is the initial voltage of the VCC pin in V.
ICC
Start
VCC(BIAS) (max)  VCC  VCC(OVP) (min)
⇒ 10.5(V)  VCC  26.0(V)
BR1
VAC
8.2 Undervoltage Lockout (UVLO) Circuit
Figure 8-2 shows the relationship of VCC and ICC. After the IC starts
operation, when the VCC pin voltage decreases to VCC(OFF) = 8.1 V, the
IC stops switching operation by the UVLO (Undervoltage Lockout)
circuit and reverts to the state before startup again.
8.1V
VCC(OFF)
15.3V
VCC(ON)
Figure 8-2 VCC versus ICC
8.3 Bias Assist Function
Figure 8-3 shows the VCC pin voltage behavior during the
startup period. When the VCC pin voltage increases to
VCC(ON) = 15.3 V, the IC starts operation. Thus, the circuit
current, ICC, increases, and the VCC pin voltage begins
dropping. At the same time, the auxiliary winding voltage, V D,
increases in proportion to the output voltage rise. Thus, the
VCC pin voltage is set by the balance between dropping due to
the increase of ICC and rising due to the increase of the
auxiliary winding voltage, VD.
VCC pin voltage
IC startup
VCC(ON)
VCC(BIAS)
Startup success
Target
operating
voltage
Increasing by output
voltage rising
Bias Assist period
VCC(OFF)
Just at the turning-off of the power MOSFET, a surge voltage
occurs at the output winding. If the feedback control is
Startup failure
activated by the surge voltage on light load condition at startup,
the output power is restricted and the output voltage decreases.
Time
When the VCC pin voltage decreases to VCC(OFF) = 8.1 V, the
IC stops switching operation and a startup failure occurs.
Figure 8-3 VCC pin voltage during startup period
In order to prevent this, the Bias Assist function is activated
when the VCC pin voltage decreases to the Startup Current
Threshold Biasing Voltage, VCC(BIAS) = 9.5 V, during a state of
operating feedback control.
While the Bias Assist function is activated, any decrease of the VCC pin voltage is counteracted by providing the Startup
Current, ISTARTUP, from the startup circuit. Thus, the VCC pin voltage is kept almost constant.
By the Bias Assist function, the value of C2 is allowed to be small and the startup time becomes shorter. Furthermore,
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Page.9
STR-V600 APPLICATION NOTE
Rev.1.1
because the increase of VCC pin voltage becomes faster when the output runs with excess voltage, the response time of the
OVP function becomes shorter.
It is necessary to check and adjust the startup process based on actual operation in the application, so that the startup failure
does not occur.
8.4 Constant Voltage Control Operation
The constant output voltage control function uses current mode
control (peak current mode), which enhances response speed and
provides stable operation.
The FB/OLP pin voltage is internally added the slope
compensation at the feedback control (refer to Section 3
Functional Block Diagram), and the target voltage, VSC, is
generated. The IC compares the voltage, VROCP, of a current
detection resistor with the target voltage, V SC, by the internal FB
comparator, and controls the peak value of VROCP so that it gets
close to VSC, as shown in Figure 8-4 and Figure 8-5.
 Light load conditions
When load conditions become lighter, the output voltage, V OUT,
increases. Thus, the feedback current from the error amplifier
on the secondary-side also increases. The feedback current is
sunk at the FB/OLP pin, transferred through a photocoupler,
PC1, and the FB/OLP pin voltage decreases. Thus, VSC
decreases, and the peak value of VROCP is controlled to be low,
and the peak drain current of I D decreases.
This control prevents the output voltage from increasing.
 Heavy load conditions
When load conditions become greater, the IC performs the
inverse operation to that described above. Thus, V SC increases
and the peak drain current of I D increases.
This control prevents the output voltage from decreasing.
In the current mode control method, when the drain current
waveform becomes trapezoidal in continuous operating mode,
even if the peak current level set by the target voltage is constant,
the on-time fluctuates based on the initial value of the drain
current.
This results in the on-time fluctuating in multiples of the
fundamental operating frequency as shown in Figure 8-6. This is
called the subharmonics phenomenon.
In order to avoid this, the IC incorporates the Slope
Compensation function. Because the target voltage is added a
down-slope compensation signal, which reduces the peak drain
current as the on-duty gets wider relative to the FB/OLP pin
signal to compensate VSC, the subharmonics phenomenon is
suppressed.
Even if subharmonic oscillations occur when the IC has some
excess supply being out of feedback control, such as during
startup and load shorted, this does not affect performance of
normal operation.
In the current mode control method, the FB comparator and/or
the OCP comparator may respond to the surge voltage resulting
from the drain surge current in turning-on the power MOSFET.
As a result, the power MOSFET may turn off irregularly. In order
to prevent this response to the surge voltage in turning-on the
power MOSFET, Leading Edge Blanking, tBW = 330 ns, is
built-in.
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Page.10
U1
S/OCP
3
GND
5
FB/OLP
6
PC1
ROCP
VROCP
C3
IFB
Figure 8-4 FB/OLP pin peripheral circuit
Target voltage including
Slope Compensation
−
VSC
+
VROCP
ROCP voltage
FB comparator
Drain current,
ID
Figure 8-5 Drain current, ID, and FB comparator
operation in steady operation
Target voltage
without Slope Compensation
tON1
t
tON2
t
t
Figure 8-6 Drain current, ID, waveform in subharmonic oscillation
STR-V600 APPLICATION NOTE
Rev.1.1
8.5 Auto Standby Mode Function
Auto standby mode is activated automatically when the drain current, ID, reduces under light load conditions, at which ID is
less than 15% to 20% of the maximum drain current (it is in the Overcurrent Protection state).
The operation mode becomes burst oscillation, as shown in Figure 8-7. Burst mode reduces switching losses and improves
power supply efficiency because of periodic non-switching intervals.
Generally, in order to improve efficiency under light load conditions, the frequency of the burst mode becomes just a few
kilohertz. Because the IC suppresses the peak drain current well during burst mode, audible noises can be reduced.
Output current,
IOUT
Burst oscillation
Below several kHz
Drain current,
ID
Normal operation
Standby operation
Normal operation
Figure 8-7 Auto Standby mode timing
If the VCC pin voltage decreases to VCC(BIAS) = 9.5 V during the transition to the burst mode, the Bias Assist function is
activated and stabilizes the standby mode operation, because ISTARTUP is provided to the VCC pin so that the VCC pin
voltage does not decrease to VCC(OFF).
However, if the Bias Assist function is always activated during steady-state operation including standby mode, the power
loss increases. Therefore, the VCC pin voltage should be more than VCC(BIAS), for example, by adjusting the turns ratio of
the auxiliary winding and secondary-side winding and/or reducing the value of R2 in Figure 9-2 (refer to Section 9.1
Peripheral Components for a detail of R2).
8.6 Random Switching Function
The IC modulates its switching frequency randomly within Δf = ± 5 kHz superposed on the average operation frequency,
fOSC(AVG) = 67 kHz. The conduction noise with this function is smaller than that without this function, and this function can
simplify noise filtering of the input lines of power supply.
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Page.11
STR-V600 APPLICATION NOTE
Rev.1.1
8.7 Brown-In and Brown-Out Function
This function stops switching operation when it detects low input line voltage, and thus prevents excessive input current
and overheating. During Auto Standby mode, this function is disabled.
8.7.1 Disabled Brown-In and Brown-Out Function
When the Brown-In and Brown-Out function is unnecessary,
connect the BR pin trace to the GND pin trace so that the BR pin
voltage is VBR(DIS) = 0.48 V or less, as shown in Figure 8-8.
C1
8
1
D/ST
8.7.2 Brown-In and Brown-Out Function by DC
Line Detection
The BR pin detects a voltage proportional to the DC input voltage
(C1 voltage), with the resistive voltage divider R A, RB, and RC
connected between the DC input and GND, plus C10 connected
to the BR pin, as shown in Figure 8-9.
This method detects peaks of the ripple voltage of the rectified
AC input voltage, and thus it minimizes the influence of load
conditions on the detecting voltage.
During the input voltage rising from the stopped state of power
supply, when the BR pin voltage increases to VBR(DIS) = 0.48 V or
more, this function is enabled. After that, when the BR pin
voltage increases to VBR(IN) = 5.6 V or more and the VCC pin
voltage increases to VCC(ON) or more, the IC starts switching
operation.
During the input voltage falling from the operated state of power
supply, when the BR pin voltage decreases to VBR(OUT) = 4.8 V or
less for about 68 ms, the IC stops switching operation.
NC
VCC
U1
S/OCP BR GND FB/OLP
3
4
5
6
C3
PC1
ROCP
BR pin is connected to GND
Figure 8-8 The circuit used to disable Brown-In and
Brown-Out function
 Component values of the BR pin peripheral circuit:
▫ RA, RB : A few megohms. Because of high DC voltage applied and high resistance, it is recommended to select a resistor
designed against electromigration or use a combination of resistors in series for that to reduce each applied voltage,
according to the requirement of the application.
▫ RC : A few hundred kilohms
▫ C10: 100 p to 1000 pF for high frequency noise rejection
EIN
ID
RA
C1
EIN
RB
VCC pin voltage
VCC(ON)
VCC(OFF)
8
1
D/ST
NC
VCC
U1
BR pin voltage
VBR(IN)= 5.6V
S/OCP BR GND FB/OLP
3
4
5
6
VBR(OUT)= 4.8V
VBR(DIS)= 0.48V
RC
C10
C3
PC1
Drain current,
ID
ROCP
68ms
Figure 8-9 Brown-In and Brown-Out function controlled by DC line detection
Copy Right: SANKEN ELECTRIC CO., LTD.
Page.12
STR-V600 APPLICATION NOTE
Rev.1.1
8.7.3 Brown-In and Brown-Out Function by AC Line Detection
The BR pin detects a voltage proportional to the AC input voltage, with the resistive voltage divider R A, RB, and RC
connected between one side of the AC line and GND, plus C10 connected to the BR pin and R9 connected between the BR
pin and the VCC pin, as shonw in Figure 8-10. This method detects the AC input voltage, and thus it minimizes the
influence from C1 charging and discharging time, or load conditions, on the detecting voltage.
This method is set together with the High-Speed Latch Release function.
During the input voltage rising from the stopped state of power supply, when the BR pin voltage increases to
VBR(DIS) = 0.48 V or more, this function is enabled. After that, when the BR pin voltage increases to VBR(IN) = 5.6 V or more
and the VCC pin voltage increases to VCC(ON) or more, the IC starts switching operation.
During the input voltage falling from the operated state of power supply, when the BR pin voltage decreases to
VBR(OUT) = 4.8 V or less for about 68 ms, the IC stops switching operation.
 Component values of the BR pin peripheral circuit:
▫ RA, RB : A few megohms. Because of high DC voltage applied and high resistance, it is recommended to select a
resistor designed against electromigration or use a combination of resistors in series for that to reduce each applied
voltage, according to the requirement of the application.
▫ RC : A few hundred kilohms
▫ C10: 0.047 μ to 0.47 μF for AC ripple rejection. This should be adjusted according to values of RA, RB, and RC.
▫ R9: In order to enable the Brown-In and Brown-Out function, this value must be adjusted so that the BR pin voltage is
more than VBR(DIS) = 0.48 V when the VCC pin voltage decreases to VCC(OFF) = 8.1 V.
 High-Speed Latch Release
The Brown-In and Brown-Out function by AC line detection shown in Figure 8-10 can quickly release the latch mode
when the AC input, VAC, is turned off.
When the Overvoltage Protection function (OVP) or Thermal Shutdown function (TSD) are activated, the IC stops
switching operation in latch mode.
Releasing the latch mode is done by decreasing the VCC pin voltage below VCC(OFF) = 8.1 V after unplugging the AC
input, or by decreasing the BR pin voltage below VBR(OUT) = 4.8 V.
The method of unplugging the AC input will spend much time until the VCC pin voltage decreases below
VCC(OFF) = 8.1 V, because the release time is determined by the discharge time of C1.
In contrast, the configuration of the BR pin peripheral circuit of Figure 8-10 makes the releasing process faster. Because
the BR pin voltage immediately decreases to VBR(OUT) = 4.8 V or less when the AC input, VAC, is turned off, and thus
the latch mode is quickly released.
BR1
VAC
VAC
ID
C1
RA
R9
1
VCC pin voltage
VCC(ON)
VCC(OFF)
8
D/ST
NC
VCC
U1
RB
BR pin voltage
VBR(IN)= 5.6V
S/OCP BR GND FB/OLP
3
4
5
6
VBR(OUT)= 4.8V
VBR(DIS)= 0.48V
RC
C10
C3
PC1
Drain current,
ID
ROCP
68ms
Figure 8-10 Brown-In and Brown-Out function controlled by AC line detection
Copy Right: SANKEN ELECTRIC CO., LTD.
Page.13
STR-V600 APPLICATION NOTE
Rev.1.1
8.8 Overcurrent Protection Function (OCP)
Variance resulting
from propagation delay
Output voltage, VOUT (V)
The OCP function detects each peak drain current level of the
power MOSFT by the current detection resistor, ROCP. When
the OCP pin voltage increases to the internal OCP threshold
voltage, the IC turns off the power MOSFET on pulse-by-pulse
basis, and limits the output power.
ICs with PWM control usually have some detection delay time
on OCP detection. The steeper the slope of the actual drain
current at a high AC input voltage is, the later the actual
detection point is, compared to the internal OCP threshold
voltage. Thus, the actual OCP point limiting the output current
usually has some variation depending on the AC input voltage,
as shown in Figure 8-11.
w
Lo
AC
p
in
ut
gh
Hi
A
np
Ci
ut
Output current, IOUT (A)
The IC incorporates a built-in Input Compensation function
that superposes a signal with a defined slope into the detection
signal on the OCP pin as shown in Figure 8-12. When AC
input voltage is lower and the duty cycle is longer, the OCP
compensation level increases more than that in high AC input
voltage. Thus, the OCP point in low AC input voltage
increases to minimize the difference of OCP points between
low AC input voltage and high AC input voltage, without any
additional components.
Figure 8-11 Output current at OCP without input
compensation
AC265V (as an example)
AC85V (as an example)
1.0V
VOCP(H)
About 0.83V
VOCP(L)
VOCP(ONTime)
Because the compensation signal level is designed to depend
upon the on-time of the duty cycle, the OCP threshold voltage
after compensation, VOCP(ONTime), is given as below.
However, when the duty cycle becomes 36 % or more, the
OCP threshold voltage after compensation remains at
VOCP(H) = 0.9 V, constantly.
VOCP(ONTime) (V)
(3)
 VOCP(L) (V)  DPC(mV / s)  ONTime(s)
where:
VOCP(L) is the OCP threshold voltage at zero duty
cycle (V), 0.78 V
DPC is the OCP compensation coefficient (mV/μs),
20 mV/µs, and
ONTime is the on-time of the duty cycle (μs):
ONDuty
ONTime 
f OSC( AVG )
0.5V
0
0
15
36
50
80
ON Duty (%)
Figure 8-12 Relationship of duty cycle and OCP
threshold voltage after compensation
8.9 Overvoltage Protection Function (OVP)
When the voltage between the VCC pin and the GND pin is applied to the OVP threshold voltage, VCC(OVP) = 29 V or more,
the Overvoltage Protection function (OVP) is activated and the IC stops switching operation.
When the VCC pin voltage decreases to VCC(BIAS) = 9.5 V, the startup circuit provides the Startup Current, ISTARTUP, to the
VCC pin, in order to prevent the VCC pin voltage from decreasing to V CC(OFF) = 8.1 V or less. Thus, the IC maintains latch
mode.
Releasing the latch mode is done by decreasing the VCC pin voltage below VCC(OFF) = 8.1 V after unplugging the AC input.
In the Brown-In and Brown-Out function by AC line detection of Section 8.7.3, releasing the latch mode is done by the
High-Speed Latch Release decreasing the BR pin voltage below VBR(OUT) = 4.8 V.
When the auxiliary winding supplies the VCC pin voltage, the OVP function is able to detect an excessive output voltage,
such as when the detection circuit for output control is open on the secondary-side, because the VCC pin voltage is
proportional to the output voltage.
The output voltage of the secondary-side at OVP operation, VOUT(OVP), is approximately given as below:
VOUT (OVP ) 
VOUT (normal operation )
 29V
VCC (normal operation )
Copy Right: SANKEN ELECTRIC CO., LTD.
(4)
Page.14
STR-V600 APPLICATION NOTE
Rev.1.1
8.10 Overload Protection Function (OLP)
Figure 8-13 shows the FB/OLP pin peripheral circuit, and
Figure 8-14 shows each waveform for OLP operation.
When the peak drain current of ID is limited by OCP
operation, the output voltage, VOUT, decreases and the
feedback current flowing to the photocoupler becomes zero.
Thus, the feedback current, IFB, charges C3 connected to the
FB/OLP pin, and the FB/OLP pin voltage increases.
U1
GND
5
VCC
8
FB/OLP
6
IFB
PC1
When the FB/OLP pin voltage increases to VFB(OLP) = 8.1 V
or more for the OLP Delay Time, tOLP = 68 ms or more, the
OLP function is activated and the IC stops switching
operation.
When the OLP function is activated, the Bias Assist function
is disabled and the VCC pin voltage decreases to
VCC(OFF) = 8.1 V. Thus, the IC stops switching operation by
the UVLO (Undervoltage Lockout) circuit and reverts to the
state before startup. After that, the startup circuit is activated,
the VCC pin voltage increases to VCC(ON) = 15.3 V, and the
IC starts switching operation again.
In this way, the intermittent operation by UVLO is repeated
during OLP state.
This operation reduces power stress on the power MOSFET
and secondary-side rectifier diode. Furthermore, this reduces
power consumption, because the switching period in this
intermittent operation is shorter than non-switching interval.
When the fault condition is removed, the IC returns to
normal operation automatically.
C2
D
Figure 8-13 FB/OLP pin peripheral circuit
VCC pin
voltage
VCC(ON)
VCC(OFF)
FB/OLP pin
voltage
VFB(OLP)
Non-switching interval
tOLP
Drain current,
ID
8.11 Thermal Shutdown Function (TSD)
If the temperature of the control part in the IC increases to
more than Tj(TSD) = 135 °C (min), the Thermal Shutdown
function (TSD) is activated and the IC stops switching
operation in latch mode, in the same way as Section 8.9
Overvoltage Protection Function (OVP).
Releasing the latch mode is done by decreasing the VCC pin
voltage below VCC(OFF) = 8.1 V after unplugging the AC
input. In the Brown-In and Brown-Out function by AC line
detection of Section 8.7.3, releasing the latch mode is done
by High-Speed Latch Release decreasing the BR pin voltage
below VBR(OUT) = 4.8 V.
Copy Right: SANKEN ELECTRIC CO., LTD.
C3
D2 R2
Page.15
Figure 8-14 OLP operation waveforms
tOLP
STR-V600 APPLICATION NOTE
Rev.1.1
9. Design Notes
9.1 Peripheral Components
Take care to use the proper rating and proper type of components.
 Input and output electrolytic capacitors
Apply proper design margin to accommodate ripple current,
voltage, and temperature rise.
A low ESR type for output smoothing capacitor, designed for
switch-mode power supplies, is recommended to reduce output
ripple voltage.
T1
C1
P
1
D/ST
D
C2
U1
FB/
S/
OCP BR GND OLP
3
4
5
6
 BR pin peripheral circuit
The Brown-In and Brown-Out function has two types of
detection method: AC line or DC line.
Refer to Section 8.7 Brown-In and Brown-Out Function.
RC
ROCP
C10
PC1
C3
Figure 9-1 IC peripheral circuit
 FB/OLP pin peripheral circuit
C3, located between the FB/OLP pin and the GND pin in Figure
9-1, performs high frequency noise rejection and phase
compensation. C3 should be connected close to these pins. The
reference value of C3 is about 2200p to 0.01µF, and should be
adjusted based on actual operation in the application.
 Phase Compensation
A typical phase compensation circuit with a secondary-side shunt
regulator (U51) is shown in Figure 9-4. The reference value of
C52 for phase compensation is about 0.047µ to 0.47μF, and
should be adjusted based on actual operation in the application.
8
NC VCC
RB
 Current detection resistor, ROCP
Choose a low inductance and high surge-tolerant type. Because a
high frequency switching current flows to ROCP in Figure 9-1, a
high inductance resistor may cause poor operation.
 VCC pin peripheral circuit
Figure 9-2 shows the VCC pin peripheral circuit.
The reference value of C2 is generally 10µ to 47μF (refer to
Section 8.1 Startup Operation, because the startup time is
determined by the value of C2).
In actual power supply circuits, there are cases in which the VCC
pin voltage fluctuates in proportion to the output current, IOUT
(see Figure 9-3), and the Overvoltage Protection function (OVP)
on the VCC pin may be activated. This happens because C2 is
charged to a peak voltage on the auxiliary winding D, which is
caused by the transient surge voltage coupled from the
primary-side winding when the power MOSFET turns off.
For alleviating C2 peak charging, it is effective to add some value
R2, of several tenths of ohms to several ohms, in series with D2
(see Figure 9-2). The optimal value of R2 should be determined
using a transformer matching what will be used in the actual
application, because the variation of the auxiliary winding
voltage is affected by the transformer structural design.
D2 R2
RA
D2
8
VCC
R2
Added
D
C2
U1
GND
5
Figure 9-2 VCC pin peripheral circuit
VCC pin voltage
Without R2
With R2
Output
current,
IOUT
Figure 9-3 VCC versus IOUT with and without resistor
R2
L51
D51
T1
VOUT
R54
PC1
R55
C51
S
R51
R52
C53
C52 R53
U51
R56
GND
Figure 9-4 Peripheral circuit around secondary-side
shunt regulator (U51)
Copy Right: SANKEN ELECTRIC CO., LTD.
Page.16
STR-V600 APPLICATION NOTE
Rev.1.1
 Transformer
Apply proper design margin to core temperature rise due to core loss and copper loss.
Because the switching currents contain high frequency currents, the skin effect may become a consideration. Choose a suitable
wire gauge in consideration of the RMS current and a current density of about 3 to 4 A/mm2. If measures to further reduce
temperature are still necessary, the following should be considered to increase the total surface area of the wiring:
▫ Increase the number of wires in parallel.
▫ Use litz wire.
▫ Thicken the wire gauge
Fluctuation of the VCC pin voltage by IOUT worsens in the following cases, requiring a transformer designer to pay close
attention to the placement of the auxiliary winding D:
▪ Poor coupling between the primary-side and secondary-side windings (this causes high surge voltage and is seen in a
design with low output voltage and high output current)
▪ Poor coupling between the auxiliary winding D and the secondary-side stabilized output winding where the output line
voltage is controlled constant by the output voltage feedback (this is susceptible to surge voltage)
In order to reduce the influence of surge voltage on the VCC pin, Figure 9-5 shows winding structural examples which
take into consideration the placement of the auxiliary winding D:
▫ Winding structural example (a): Separating the auxiliary winding D from the primary-side windings P1 and P2.
P1 and P2 are windings divided the primary-side winding into two.
▫ Winding structural example (b): Placing the auxiliary winding D within the secondary-side stabilized output winding, S1,
in order to improve the coupling of those windings.
S1 is a stabilized output winding of secondary-side windings, controlled to constant voltage.
P1 S1 P2
Margin tape
Bobbin
Bobbin
Margin tape
S2 D
P1
Margin tape
S1 D
S2
S1
P2
Margin tape
Winding structural example (a)
P1、P2 :Primary main winding
D
:Primary auxiliary winding
S1
:Secondary stabilized
output winding
S2
:Secondary output winding
Winding structural example (b)
Figure 9-5 Winding structural examples
9.2 PCB trace layout and Component placement
PCB circuit trace design and component layout significantly
affects operation, EMI noise, and power dissipation.
Therefore, pay extra attention to these designs. In general,
trace loops shown in Figure 9-6 where high frequency
currents flow should be wide, short, and small to reduce line
impedance.
In addition, earth ground traces affect radiated EMI noise,
and wide, short traces should be taken into account.
Switch-mode power supplies consist of current traces with
high frequency and high voltage, and thus trace design and
component layouts should be done to comply with all safety
guidelines. Furthermore, because the power MOSFET has a
positive thermal coefficient of RDS(ON), consider it when
preparing a thermal design.
Copy Right: SANKEN ELECTRIC CO., LTD.
Page.17
Figure 9-6 High frequency current loops (hatched areas)
STR-V600 APPLICATION NOTE
Rev.1.1
Figure 9-7 shows a circuit layout design example for the IC peripheral circuit and secondary-side rectifier-smoothing circuit.
 IC Peripheral Circuit
(1) S/OCP pin Trace Layout: S/OCP pin to ROCP to C1 to T1 (winding P) to D/ST pin
This is the main trace containing switching currents, and thus it should be as wide and short as possible. If the IC and C1
are distant from each other, placing a capacitor such as film or ceramic capacitor (about 0.1 μF and with proper voltage
rating) close to the transformer or the IC is recommended to reduce impedance of the high frequency current loop.
(2) GND Trace Layout: GND pin to C2 (negative pin) to T1 (winding D) to R2 to D2 to C2 (positive pin) to VCC pin
This is the trace for supplying power to the IC, and thus it should be as wide and short as possible. If the IC and C2
are distant from each other, placing a capacitor such as film or ceramic capacitor (about 0.1 μ to 1.0 μF) close to the
VCC pin and the GND pin is recommended.
(3) ROCP Trace Layout
ROCP should be placed as close as possible to the S/OCP pin. The connection between the power ground of the main
trace and the IC ground should be at a single point ground (point A in Figure 9-7) which is close to the base of ROCP,
in order to reduce common impedance, and to avoid interference from switching currents to the control part in the IC.
 Secondary-side Rectifier-Smoothing Circuit Trace Layout: T1 (winding S) to D51 to C51
This is the trace of the rectifier-smoothing loop, carrying the switching current, and thus it should be as wide and short
as possible.
If this trace is thin and long, inductance resulting from the loop may increase surge voltage at turning off the power
MOSFET. Proper rectifier-smoothing trace layout helps to increase margin against the power MOSFET breakdown
voltage, and reduces stress on the clamp snubber circuit and losses in it.
D51
T1
R1
C5
C1
P
C51
D1
S
D2
R2
8
1
D/ST
NC
VCC
C2
D
C4
U1
Main power circuit trace
S/OCP BR GND FB/OLP
3
4
5
6
GND trace for the IC
C3
PC1
ROCP
A
C9
Figure 9-7 Peripheral circuit example around the IC
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Page.18
STR-V600 APPLICATION NOTE
Rev.1.1
IMPORTANT NOTES
 The contents in this document are subject to changes, for improvement and other purposes, without notice.
Make sure that this is the latest revision of the document before use.
 Application and operation examples described in this document are quoted for the sole purpose of reference
for the use of the products herein and Sanken can assume no responsibility for any infringement of
industrial property rights, intellectual property rights or any other rights of Sanken or any third party which
may result from its use. Unless otherwise agreed in writing by Sanken, Sanken makes no warranties of any
kind, whether express or implied, as to the products, including product merchantability, and fitness for a
particular purpose and special environment, and the information, including its accuracy, usefulness, and
reliability, included in this document.
 Although Sanken undertakes to enhance the quality and reliability of its products, the occurrence of failure
and defect of semiconductor products at a certain rate is inevitable. Users of Sanken products are requested
to take, at their own risk, preventative measures including safety design of the equipment or systems against
any possible injury, death, fires or damages to the society due to device failure or malfunction.
 Sanken products listed in this document are designed and intended for the use as components in general
purpose electronic equipment or apparatus (home appliances, office equipment, telecommunication
equipment, measuring equipment, etc.).
When considering the use of Sanken products in the applications where higher reliability is required
(transportation equipment and its control systems, traffic signal control systems or equipment, fire/crime
alarm systems, various safety devices, etc.), and whenever long life expectancy is required even in general
purpose electronic equipment or apparatus, please contact your nearest Sanken sales representative to
discuss, prior to the use of the products herein.
The use of Sanken products without the written consent of Sanken in the applications where extremely high
reliability is required (aerospace equipment, nuclear power control systems, life support systems, etc.) is
strictly prohibited.
 When using the products specified herein by either (i) combining other products or materials therewith or
(ii) physically, chemically or otherwise processing or treating the products, please duly consider all possible
risks that may result from all such uses in advance and proceed therewith at your own responsibility.
 Anti radioactive ray design is not considered for the products listed herein.
 Sanken assumes no responsibility for any troubles, such as dropping products caused during transportation
out of Sanken’s distribution network.
 The contents in this document must not be transcribed or copied without Sanken’s written consent.
Copy Right: SANKEN ELECTRIC CO., LTD.
Page.19