MachXO Control Development Kit User's Guide


MachXO Control Development Kit
User’s Guide
June 2010
Revision: EB46_01.4

Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Introduction
Thank you for choosing the Lattice Semiconductor MachXO™ Control Development Kit!
This guide describes how to start using the MachXO Control Development Kit, an easy-to-use platform for rapidly
prototyping system control designs using MachXO PLDs. Along with the evaluation board and accessories, this kit
includes a pre-loaded control system-on-chip (Control SoC) design that demonstrates board diagnostic functions
including fan speed control based on temperature monitoring, LCD control, complete power supply monitoring and
reset distribution in conjunction with the Power Manager II ispPAC®-POWR1014A and 8-bit LatticeMico8™ microcontroller.
Note: Static electricity can severely shorten the lifespan of electronic components. See the MachXO Control Development Kit QuickSTART Guide for handling and storage tips.
Features
The MachXO Control Development Kit includes:
• MachXO Control Evaluation Board – The MachXO Control Evaluation Board features the following on-board
components and circuits:
– MachXO LCMXO2280C-4FT256C PLD (www.latticesemi.com/products/cpldspld/machxo)
– Power Manager II ispPAC-POWR1014A mixed-signal PLD (www.latticesemi.com/products/powermanager)
– 2 Mbit SPI Flash memory
– 1 Mbit SRAM
• Interface to 16 x 2 LCD Panel*
– Secure Digital (SD) and CompactFlash memory card sockets*
– I2C temperature sensor
– Current and voltage sensor circuits
– Voltage ramp circuits
– Fan and controller circuitry
– USB connector (JTAG, RS-232)
– GPIO expansion header landings
– 3” x 1”, 140-hole prototyping area
– Push-buttons for sleep mode and global set/reset
– 8-bit DIP switch
– PWM analog output circuit
– 8 status LEDs
• Pre-loaded Reference Designs and Demo – The kit includes a pre-loaded demo design (Control SoC) that
integrates several Lattice reference designs including: the LatticeMico8 microcontroller, PWM fan controller, LCD
controller, SRAM controller, I2C controller, SPI Flash memory controller, and a UART peripheral. Firmware supports a temperature, current, and voltage monitoring demo and when connected to a host PC allows you to use
a terminal program to interact with the MachXO Control Evaluation Board.
• USB connector Cable – A mini B USB port provides a communication and debug port via a USB-to-RS-232
physical channel and programming interface to the MachXO JTAG port.
• AC Adapter (international plugs)
• Quick Start Guide – Provides information on connecting the MachXO Control Evaluation Board, installing Windows hardware drivers, and running the Control SoC demo.
• MachXO Control Development Kit Web Page – www.latticesemi.com/machxo-control-kit provides access to
the latest documentation, demo designs, and drivers for the kit.
* Note: LCD panel, SD and Compact Flash memory not included in the MachXO Control Development Kit.
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MachXO Control Development Kit User’s Guide
The contents of this user’s guide include demo operation, top-level functional descriptions of the various portions of
the evaluation board, descriptions of the on-board connectors, switches and a complete set of schematics of the
MachXO Control Evaluation Board.
Figure 1. MachXO Control Evaluation Board, Top Side
Lattice Semiconductor Devices
MachXO Device
This board features a MachXO PLD with a 3.3V core supply. It can accommodate all pin-compatible MachXO
devices in the 256-ball ftBGA (17x17 mm) package. A complete description of this device can be found in the
MachXO Family Handbook.
Note: The connections referenced in this document refer to the LCMXO2280C-4F256C device. Available I/Os and
associated sysI/O™ banks may differ for other densities within this device family. However, only the LCMXO2280C4F256C device offers full functional use of the entire evaluation board.
Power Manager II Device
This board features a Power Manager II mixed-signal PLD. It serves as general-purpose power-supply monitor,
reset generator, sequence controller, and high-voltage FET drivers. More information about Lattice Power Management devices can be found on the Lattice website.
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MachXO Control Development Kit User’s Guide
Software Requirements
You should install the following software before you begin developing designs for the evaluation board:
• ispLEVER Starter or ispLEVER/Pro 7.2
• ispVM System 17.5
Demonstration Designs
Lattice provides four demos to illustrate key applications of the MachXO (XO2280) and Power Manager II
(POWR1014A) devices in the context of control applications.
• Control SoC – The Control System-on-Chip (SoC) demo illustrates the use of the LatticeMico8 (LM8) microcontroller, peripherals, and firmware integrated to provide system control features such as power supply sequencing,
temperature monitoring, and fan control. The Control SoC design is the default, pre-programmed demo of the
MachXO Control Evaluation Board.
• Voltage Monitoring Using Delta-Sigma ADC – Monitor sensors and power rails for free by replacing discrete
ADCs in your system. This demo implemements a Delta-Sigma Analog-to-Digital Conversion (ADC) technique to
monitor an analog voltage and convert it into a digital value with the XO2280.
• Memory-Audio – CompactFlash memory is commonly found in system control designs to provide simple plug
memory. This demo showcases the LatticeMico8 microcontroller, CompactFlash memory controller, and a PWMbased digital-to-analog conversion to drive the audio jack of the MachXO Control Evaluation Board. A Hyperterminal interface allows you to load a wave format file onto the board and play it back using the audio jack output.
• Power Supply Fault Logging – Maximize system reliability by monitoring devices for marginal power supply failures. This demo continuously monitors the supply rails of the MachXO Control Evaluation Board. If a power supply failure occurs, the POWR1014A and XO2280 systems will issue a diagnostic log to the on-board SPI memory
that includes supply identity and level.
Note: You may obtain your MachXO Control Evaluation Board after it has been reprogrammed. To restore the factory default demo or program it with other Lattice-supplied examples see the Download Demo Designs and Programming Demo Designs with ispVM sections of this document.
Control SoC Demo
This demo illustrates how the MachXO and Power Manager II devices can be used to address a variety of system
control design issues including:
• Power supply sequencing
• Reset distribution
• Power supply monitoring
• Temperature monitoring and fan control
Power management is handled in two phases by the MachXO Control Evaluation Board system:
1. Power On – After power is supplied to the board and the 3.3V rail is stable, the Power Manager II POWR1014A
sequences four supply rails. Two circuits demonstrate the voltage ramp of 2N7002E power MOSFETs using
the high-voltage (HVOUT) outputs and two demonstrate power rail enable of Vcccore and Vccaux of the
MachXO2280 using digital outputs. Next the POWR1014A asserts the MachXO reset. Finally the POWR1014A
enters a supply monitoring state.
2. Post Power On – During the second phase of power management the board’s “condition” is monitored. Power
supply rail voltage, current, and board temperature is monitored by the MachXO2280 and POWR1014A. If any
supply rail fails, the POWR1014A asserts a reset for the LCMXO2280.
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MachXO Control Development Kit User’s Guide
Figure 2. PC Board Control and Power Management
MachXO Control Evaluation Board
Current
Sensor
2-Bit
DIP Switch
POWR1014A
LED Bank
Power
Manager II
Lattice MachXO PLD
Supply
Sequencing
SPI Memory
Controller
Reset
Distribution
I2C Controller
Voltage
Sensor
SRAM Memory
Controller
LatticeMico8 Platform
Optional
LCD Panel
Interface
XO2280
LED Bank
Fan
Circuit
PWM Controller
LCD Controller
I2C
Temperature
Sensor
SPI Flash
Memory
(2Mbit)
SRAM
Memory
(1Mbit)
PC Host
JTAG/USB
RS-232/USB
The MachXO LCMXO2280C is a general purpose 2280-LUT PLD programmed with a small System-on-Chip
design based on the LatticeMico8 8-bit microcontroller. The LatticeMico8 platform provides board management
functions for temperature sensing, fan and LCD control, and monitoring of the Power Manager II POWR1014A I2C
interface. The system is designed to continuously monitor the condition of the board. You can interact with the platform through a menu-driven terminal program running on a PC host. Switches and jumpers can be adjusted to
emulate reset, Sleep, and supply interruptions.
The LatticeMico8 platform integrates Lattice reference designs for SRAM and SPI Flash memory control, pulsewidth modulation (PWM) fan control, LCD control, and a Power Manager II POWR1014A communication interface.
All peripherals communicate across a WISHBONE-compatible bus. LatticeMico8 firmware written in Assembly language manages communication between peripherals and provides a menu-driven user interface layer for a terminal program running on a host PC.
The Power Manager II POWR1014A is a 10-input, 14-output, mixed-signal PLD with integrated analog voltage
comparators, timer/counter circuits, and a PLD core. The POWR1014A is programmed to cover supply sequencing, reset distribution, and voltage supervision functions. The POWR1014A will trap supply faults and assert
MachXO2280 reset when appropriate. It disables MachXO2280 supplies input supplies are not stable. An I2C slave
interface to the POWR1014A allows the MachXO2280 to extract status and read/write control registers for the
board status.
Board Monitoring and Fan Control
The MachXO2280 design performs monitoring functions for the on-board temperature sensor and supply status
issued by the POWR1014A device. A rolling board status log is maintained in the on-board SRAM. The on-board
DC fan motor is activated whenever the programmed temperature threshold is exceeded.
The MachXO2280 design provides the following features:
• Menu-driven user interface for Windows or Linux PC-based terminal program via USB-to-Serial channel.
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MachXO Control Development Kit User’s Guide
• Board “uptime” clock
• Programmable temperature threshold via the PC terminal program.
• Programmable LCD (not included) backlight and contrast via the PC terminal program.
• Programmable 0-5V ADC input voltage via the PC terminal program.
• Issues a periodic log of time, temperature, voltage level, and fan speed readings to on-board SRAM memory.
• Enables on-board fan during over-temperature conditions.
Power Supply Sequencing and Reset Distribution
The POWR1014A design shows the Power Manager II in the PC board management role to sequence multiple
power supplies, distribute reset signals, and monitor power supply voltage/current levels. The POWR1014A’s
embedded I2C slave interface provides a variety of status registers for basic status polling while the board is operational.
The state diagram in Figure 3 illustrates the control logic embedded in the POWR1014A. The following states
define the control logic:
• RESET – After the MachXO Control Evaluation Board is powered and power-on reset occurs the POWR1014A
waits until its own supply rail is stable (Power OK).
• SEQUENCE SUPPLIES – After power is applied to the board and the 3.3V and Vccio supply rails are stable the
POWR1014A will sequence the MachXO2280 supply rails: Vcccore and Vccaux using two transistor switches. In
addition two voltage ramp circuits are provided on-board to demonstrate safe operating area (SOA) operation of
two 2N7002E PNP-type power MOSFETs. LEDs D5-D6 of the POWER1014A LED bank are binary encoded to
represent the four supply sequence. The minimum value for each VMON input can be set independently by modifying the PAC-Designer® software project.
• DISTRIBUTE RESETS – After all supplies are powered the POWR1014A will release three reset signals. Reset
control of multiple microprocessor/DSP reset circuits is emulated by displaying the Reset state on the
POWR1014A LED bank. When lit, LEDs D7-D8 represent the reset release state.
• MONITOR SUPPLIES – After the power-on phase (supply sequencing and reset distribution) the MachXO Control Evaluation Board is operational and a LatticeMico8 8-bit microcontroller based design runs its firmware the
MachXO2280. The POWR1014A then continuously monitors all input supplies. In this state the MachXO2280
polls the POWR1014A I2C registers for the evaluation board’s status and makes voltage and current measurements available to the PC terminal interface.
Figure 3. Power Manager II POWR1014A Embedded Logic
Fault OR
Threshold
Violation
RESET
Power OK
MONITOR
SUPPLIES
SEQUENCE
SUPPLIES
DISTRIBUTE
REQUESTS
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MachXO Control Development Kit User’s Guide
Download Windows Hardware Drivers
Before you begin, you will need to obtain the necessary hardware drivers for Windows from the Lattice web site.
1. Browse to the www.latticesemi.com/machxo-control-kit and locate the hardware device drivers for the USB
interface.
2. Download the ZIP file to your system and unzip it to a location on your PC.
Linux Support:
The USB interface drivers for the evaluation board are included in Linux kernel 2.4.20 or greater including distributions compatible with ispLEVER® 7.2 (Red Hat Enterprise v3, v4 or Novell SUSE Enterprise V10).
Download and Program the Demo Designs
The Control SoC Demo is preprogrammed into the MachXO Control Evaluation Board, however over time it is likely
that your board will be modified.
To download the demo source files and reprogram the MachXO Control Evaluation Board:
1. See the Download Demo Designs and Programming Demo Designs with ispVM sections of this document.
2. Use .\Demo_MachXO_Control_SoC\project\control_soc_demo.jed to restore the MachXO2280 Control
SoC demo design.
3. Use .\Demo_PM_Control_BM\project\bm_demo.jed to restore the POWR1014A Board Management demo
design.
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Connect to the MachXO Control Evaluation Board
In this step, power the board, and connect the evaluation board to your PC using the USB cable provided.
TMS
TDIO
XO
J15
J5
PM
J18
J9
XX
J19
J14
Install to
Install to
Include Device Exclude Device
Notes:
1. Install exactly one device per row to include or exclude each device.
2. Shown with MachXO and POWR1014A enabled.
1. Adjust the following jumpers to include the MachXO2280 and POWR1014A devices in the JTAG programming
chain and exclude the “Other JTAG” option.
Install Jumpers
J14 – Excludes Other JTAG TDI-TDO
J15 – Includes MachXO2280 JTAG TMS
J18 – Includes POWR1014A JTAG TMS
Remove Jumpers
J19 – Excludes Other JTAG TMS
J5 – Includes MachXO2280 JTAG TDI-TDO
J9 – Includes POWR1014A JTAG TDI-TDO
See Schematic 1 of 10 for details on the MachXO Control Evaluation Board jumper settings.
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2. Adjust the following jumpers to connect the on-board supply monitor circuits.
Install Jumper
J17 – Enable MachXO2280 Vccio monitor circuit
Remove Jumper
J22 – Enable MachXO2280 Vccaux monitor circuit
See Schematic 8 of 10 for details of the voltage monitor input circuits.
3. Ensure SW 4, position 2, of the POWR1014A DIP Switch is in the raised position. When in the lowered position
it will assert manual reset to the system.
4. Plug in the power supply to an outlet and the Power Socket. After a connection is made, a red Power LED
(D18) will light up indicating the board is powered on.
5. Connect the USB cable provided from a USB port on your PC to the board’s USB interface socket (J8) on the
side of the board as shown in the layout diagram below.
6. If you are prompted, Windows may connect to Windows Update select No, not this time from available
options and click Next to proceed with the installation. Choose the Install from specific location (Advanced)
option and click Next.
7. Select Search for the best driver in these locations and click the Browse button to browse to the Windows
driver folder created earlier. Select the CDM 2.04.06 WHQL Certified folder and click OK.
8. Click Next. A screen will display as Windows copies the required driver files. Windows will display a message
indicating that the installation was successful.
9. Click Finish to install the USB driver.
10. Right-click the ispPAC-POWR1014A entry and choose Edit Device… The Device Information dialog appears.
11. From the Operation list, select Bypass.
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MachXO Control Development Kit User’s Guide
Set Up Windows HyperTerminal
You will use a terminal program to communicate with the evaluation board. The following instructions describe the
Windows HyperTerminal program which is found on most Windows PCs. You may use another terminal program if
you wish although setup will be somewhat different. For Linux, Minicom is a good alternative.
Note: This step uses the procedure for Windows XP users. Steps may vary slightly if using another Windows version.
1. From the Start menu, select Control Panel > System. The “System Properties” dialog appears.
2. Select the Hardware tab and click Device Manager. The “Device Manager” dialog appears.
3. Expand the Ports (COM & LPT) entry and note the COM port number for the USB Serial Port.
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MachXO Control Development Kit User’s Guide
4. From the Start menu, select Programs > Accessories > Communications > HyperTerminal. The HyperTerminal application and a “Connection Description” dialog appear.
5. Specify a Name and Icon for the new connection. Click OK. The “Connect To” dialog appears.
6. Select the COM port identified in Step 3 from the Connect using: list. Click OK.
7. The “COMn Properties” dialog appears where n is the COM port selected from the list.
8. Select the following Port Settings and click OK.
Bits per second: 115200
Data bits: 8
Parity: None
Stop bits: 1
Flow control: None
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MachXO Control Development Kit User’s Guide
The HyperTerminal window appears.
9. From the MachXO Control Evaluation Board, press the MachXO2280 GSR Input push-button. The Control
SoC demo Main Menu appears.
The user interface will provide the menu-driven interface shown in Table 1.
Table 1. Main Menu
===============================================================
Welcome to the MachXO Control Evaluation Board
Control SoC Demo Rev 1.0, June 2009
0: Re-display Main Menu
1: Read Board Uptime
2: Read Current Board Status
--------------------------------------------------------------n : Normalize Temp Output
H/h: +/- Fan Temp Threshold (0.25C)
b : Backlight Intensity (H/L)
C/c: +/- LCD Contrast
f : Change Fan Speed
s : Read SPI Flash IDCode
t : Read I2C Temp Sensor
d : Read XO2280 DIP Switches
u : Read POWR1014A UES
===============================================================
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Set Up Linux Minicom
Minicom is a terminal program found with most Linux distributions. It can be used to communicate with the
MachXO Control Evaluation Board.
To setup Minicom:
1. Check active serial ports:
#dmesg | grep tty
Note the tty label assigned to the USB port.
2. From a command prompt, start Minicom:
#minicom -s
The configuration menu appears.
3. Highlight Serial port setup and press Enter.
Serial port settings appear.
4. Press A (Serial Device).
Specify the active serial device noted in Step 1 and press Enter.
5. Press E (Bps/Par/Bits).
Specify 115200, None, 8 and press Enter.
6. Press F (Hardware Flow Control).
Specify None and press Enter.
7. Press Esc.
The configuration menu appears.
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8. Select Save setup as dfl.
Minicom saves the port setup as the new default.
9. Select Exit.
The Minicom interface appears.
10. From the evaluation board, press the G2 push-button (GSR).
The Control SoC demo Main Menu appears.
Power Supply Sequencing
Supply sequencing by the POWR1014A can be visualized on the MachXO Control Evaluation Board with the
POWR1014A LED bank.
To cycle the manual reset and observe power-on management:
1. Press toggle switch position 2 of SW4.
An evaluation board manual reset is continuously cycled.
Upon each reset event, the POWR1014A sequences five supply rail circuits of the MachXO Control Evaluation
Board: Vccio, Vcccore, Vccaux, and two high-voltage ramp circuits (see Schematic Sheet 7 of 10). LEDs D5D6 of the POWER1014A LED bank are binary encoded to represent the three Vcc supply sequence, in order:
Vccio, Vcccore, and Vccaux.
LEDs D7-D8 of the POWER1014A LED bank light when the voltage ramp circuits monitored by VMON7 and
VMON8 are enabled by the high-voltage outputs (HVOUT1 and HVOUT2) of the POWR1014A.
Supplies Enabled
D5
D6
D7
D8
None
Vccio
X
Vccio AND Vcccore
X
Vccio AND Vcccore AND Vccaux
X
X
HVOUT1/VMON7
X
HVOUT1/VMON7 AND HVOUT2/VMON8
X
X
2. Raise toggle switch position 2 of SW4.
A MachXO Control Evaluation Board manual reset is released.
Read Current Board Status
Board status is monitored continuously by the MachXO2280 and POWR1014A after the power-on stage of the
evaluation board logic.
To read board status:
In the terminal window press 2. Status of the board appears including uptime since last reset, board temperature,
fan speed (a relative speed number), and voltage/current measurements of three supply rails.
Example:
Uptime:
000h54m50s
Temp:29.50oC
Fan Speed:000
Core: 3.103V / 55.2mA
Aux : 3.187V / 13.2mA
I/O : 3.247V / 24.6mA
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To measure supply rail variations:
1. To disconnect the Vccio rail connection to the MachXO2280, remove jumper J17 from the MachXO Control
Evaluation Board. The Vccio supply rail is disconnected.
2. From the terminal window, press 2. Status of the board appears.
Example:
Uptime:
000h55m05s
Temp:29.50oC
Fan Speed:000
Core: 3.103V / 55.2mA
Aux : 3.187V / 13.2mA
I/O : 0.007V / 24.6mA
The Vccio supply rail measurement indicates ~0V.
Note: Vccio current (ICCIO_Sense) is not affected by removing the jumper at J17. See Schematic Sheet 8 of
10 for details.
3. Install a jumper at J22. The Vccaux voltage divider circuit is connected. From the terminal window, press 2.
Status of the board appears.
Example:
Uptime:
000h56m30s
Temp:29.25oC
Fan Speed:000
Core: 3.103V / 55.2mA
Aux : 1.597V / 14.9mA
I/O : 0.007V / 24.6mA
The Vccaux supply rail measurement indicates ~1.5V.
Note: Vccaux current (ICCAUX_Sense) is not affected by installing the J22 jumper. See Schematic Sheet 8 of
10 for details.
To read PCB temperature:
1. Place your finger on the on-board Temperature Sensor (U15) for 2-5 seconds. Depending on your skin temperature, the level should influence the temperature monitor (1 LED=0.25C).
2. From the terminal window, press 2. Status of the board appears.
Example:
Uptime:
000h56m30s
Temp:29.75oC
Fan Speed:000
Core: 3.103V / 164.4mA
Aux : 1.597V / 14.9mA
I/O : 0.007V / 24.6mA
The temperature monitor varies over time depending on the I2C temperature sensor reading.
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Normalize PCB Temperature Output
You can calibrate the Control SoC temperature sense logic to account for the ambient conditions of the PCB. The
MachXO2280 LED bank displays relative temperature of the PCB as a level meter. The normalize feature will reset
the median temperature level and light 4 of 8 LEDs.
To normalize the temperature output:
From the terminal window, press n. The Control SoC normalizes the meter output for the ambient temperature and
lights 4 (D1-D4) of the MachXO2280 LED bank.
Adjust Fan Temperature Threshold
The Control Evaluation Board includes a small fan controlled by a pulse width modulated (PWM) output module of
the Control SoC design. The fan enable is a function of a temperature threshold setting. By default, the threshold is
set at the median of the normalized ambient temperature. You may increase or decrease the threshold in steps of
~0.25C.
To adjust fan temperature threshold:
1. Note the fan operation.
2. If the fan is on, from the terminal window, press H. The control design raises the temperature threshold by
+0.25C. If the fan does not turn off, continue pressing H until the threshold is higher than the PCB temperature.
If the fan is off, from the terminal window, press h. The control design drops the temperature threshold by 0.25C. If the fan does not turn on, continue pressing h until the threshold is lower than the PCB temperature.
Change Fan Speed
When the evaluation board fan is operational as determined by the fan temperature threshold, the Fan speed can
be set to one of the following fan speeds:
None:
Low:
Medium:
High:
000
~175
~222
~234
To adjust fan speed:
1. Note the fan operation.
If the fan is off, from the terminal window, press h. The control design drops the temperature threshold by 0.25C. If the fan does not turn on, continue pressing h until the threshold is lower than the PCB temperature
and the fan turns on.
2. From the terminal window, press f. The Fan speed setting appears.
Example:
Fan: Off
The fan is turned off.
3. Press f. The Fan speed setting appears.
Example:
Fan: Low
The fan is turned on with the low (175) speed.
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4. Press f. The Fan speed setting appears.
Example:
Fan: Med
The fan is turned on with the medium (222) speed.
Adjust LCD Backlight Intensity
If an LCD panel (not included in the Control Development Kit) with a backlight feature is installed to header J13,
you may adjust the backlight intensity.
To adjust LCD panel backlight intensity:
From the terminal window, press b. The backlight intensity increases.
Adjust LCD Contrast
If an LCD panel (not included) is installed to header J13, you may adjust the LCD contrast between the display segments and the background.
To adjust LCD panel contrast:
From the terminal window, press C to increase or c to decrease.
Read the SPI Flash Memory IDCode
This demo uses SPI Flash Memory Controller and UART modules of the Control SoC to scan the memory device
identification code of the on-board SPI Flash Memory and display it on the terminal output. The transaction is
logged to the on-board SRAM through the SRAM controller module.
To scan the SPI Flash Memory IDCode:
From the terminal Main Menu, press s. The IDCode is returned as a hex value.
Example:
ID:0x12
Note: The IDCode for your board may differ.
Read the I2C Temperature Sensor
This demo uses the I2C Controller and UART modules of the Control SoC to read the on-board I2C temperature
sensor, convert the raw data to Celsius units and display it on the terminal output.
To monitor temperature:
From the terminal window press t. The current temperature in degrees Celsius appears.
Example:
Temp:30.50°C
Read MachXO2280 DIP Switch Inputs
This demo uses the UART module of the Control SoC to read the user-input switch inputs 8-1 (MSB-LSB) of the
DIP Switch Bank (SW2) and output it to the terminal as a hex value. Switch numbers are marked on the DIP switch
body. A raised switch indicates a logical True (1).
To read the DIP Switch:
From the terminal window press d. The switch setting is returned as a hex value.
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Example:
SW:0xFF
Read POWR1014A UES
This demo uses the I2C module of the Control SoC to read the UES (User Electronic Signature) of the
POWR1014A. The UES consists of 32 bits that can be configured to store unique data such as inventory control
data.
To read the POWR1014A UES:
From the terminal window press u.
The UES is returned as a hex value.
Example:
UES:CB1014A1
Note: The POWR1014A UES for your board may differ.
Read Board Uptime
Board uptime is the period in hours, minutes, and seconds elapsed since the last MachXO2280 power-on or global
reset event. Board uptime can be a useful metric for system reliability.
To read board uptime:
In the terminal window press 1. Uptime status of the board appears.
Example:
Uptime:
000h40m18s
Re-Display the Main Menu
During the demo session the main menu will scroll off screen. To redisplay the menu, press 0.
Voltage Monitoring Demo
This demo showcases RD1066, Simple Sigma Delta ADC Reference Design, to monitor an analog voltage and
convert it to a digital value using only two passive external components. The demo board must be modified to demonstrate this unique ability (please refer to the section “Modifying the MachXO Control Evaluation Board” for
detailed instructions). Alternatively, the design may be evaluated using the control board without modification
(please refer to the section “Alternate ‘No-Rework’ Voltage Monitoring Demo” below).
Figure 4. SSD ADC Functional Block Diagram
Analog IN
Comparator
RC
Network
+
-
Sampling
Element
Accum &
Decimate
Digital LPF
& Decim.
Digital
OUT
PWM Feedback Signal
Referencing the functional block diagram in Figure 4, the following logic blocks are implemented in the PLD:
• Comparator (External implementation option)
• Sampling Element
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MachXO Control Development Kit User’s Guide
• Accumulator with decimation
• Digital Low-Pass Filter with decimation
An 8-bit ADC with sampling frequency of 7.63KHz has been implemented for this demo. For detailed technical
information on the ADC converter, reference RD1066, Simple Sigma Delta ADC Reference Design.
The demo asks the user to download the configuration pattern of the MachXO device from the following directory:
…\Demo_MachXO_Control_ADC_Voltage_Monitor\Project
The configuration pattern is in JEDEC file XO_Voltage_Monitoring_Demo_Int.jed
Connect a voltage source to pin ‘ProtoP9’ of the new header. Make sure the ground of the voltage source is connected to the GND pin of the new header (or a ground pad on the board). The voltage source must be between 0V
and 3.2V.
Press reset switch SW1. The LEDs will display the digital value of the analog voltage provided by the voltage
source. The LED field will read out a value 0-255 in proportion to the input voltage.
Vary the analog voltage source and observe the digital output on the LEDs, which will track the analog voltage
source.
Alternate ‘No-Rework’ Voltage Monitoring Demo
RD1066 may be implemented utilizing the existing on-board external comparator, U16. This allows the characterization of the digital filters without board modification, if desired.
For this version of the demo, the configuration pattern is in JEDEC file XO_Voltage_Monitoring_Demo_Ext.jed
Connect a voltage source to pin 2 of header J23. Make sure the ground of the voltage source is connected to a
ground pad on the board.
Memory-Audio Demo
The Memory-Audio Demo showcases the LatticeMico8 and two new peripherals that Lattice has developed. These
peripherals are a CompactFlash memory controller and the Audio Player PWM DAC.
This exciting demo asks users to connect the MachXO Control Evaluation Board to the USB port of a personal
computer and download wave files (filename.wav) to CompactFlash memory through the USB port. During this
transaction, LatticeMico8 plays a crucial role in receiving the stream of data and writing it to the CompactFlash
memory.
With a computer, users are able to send commands to the LatticeMico8 and select the wave file they would like to
be played by the Audio Player PWM DAC. During this transaction, the LatticeMico8 interprets user keystroke commands, reads data from the CompactFlash memory and sends the data to Audio Player PWM DAC.
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Figure 5. Functional Block Diagram
PC
Host
LatticeMico8
Microcontroller
WISHBONE Bus
UART
CompactFlash
Controller
Audio Player
PWM DAC
CompactFlash
Memory Card
Audio Jack
The darker blocks of the diagram highlight the embedded resources in the MachXO device.
PC Host
Users employ a HyperTerminal program to communicate with the MachXO Control Evaluation Board. From the
HyperTerminal, they are able to:
• Transfer a wave file to the CompactFlash memory card
• Select the wave file, which the LatticeMico8 will read from the CompactFlash memory card and send ito the
Audio Player PWM DAC
LatticeMico8 Microcontroller
The LatticeMico8 is an 8-bit microcontroller optimized for Field Programmable Gate Arrays (FPGAs) and Programmable Logic Device architectures from Lattice. In this demo, it performs the following tasks:
• Receives wave files and writes them to the CompactFlash memory card. (User transfers the wave files through
the HyperTerminal program).
• Receives commands from the user, indicating the wave file to be played. (User provides commands through the
HyperTerminal program).
• Reads a specific wave file from the CompactFlash memory card and sends it to the Audio Player PWM DAC.
UART
The Lattice WISHBONE UART provides an interface between the WISHBONE UART system bus and an RS232
serial communication channel. Reference Design RD1042, WISHBONE UART has been implemented in this
demo.
CompactFlash Memory Controller
This embedded controller has wishbone interface and it is a peripheral component to the LatticeMico8 microcontroller. Reference Design RD1040, CompactFlash Controller has been implemented in this demo.
Audio Player PWM DAC
This is an embedded digital-to-analog converter with WISHBONE interface and it is a peripheral component to the
LatticeMico8 microcontroller.
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MachXO Control Development Kit User’s Guide
Memory-Audio Demo
Before you start, ensure that you have:
• A MachXO Control Evaluation Board connected to your computer through a USB connection and programmed
with JED file control_soc_demo.jed.
• A CompactFlash card plugged into the MachXO Control Evaluation Board CF connector J16
• Headphones or speakers plugged into the MachXO Control Evaluation Board Audio connector Q3
• Wave file mono <5 MB, 8 bit, mono
To run the demo:
1. Using a HyperTerminal program, connect to the MachXO Control Evaluation Board.
Figure 6. Startup Screen
2. Press u to begin uploading a song.
3. You will be prompted that existing data on the CompactFlash card will be overwritten. Press y to continue.
Figure 7. Uploading a Song/Wave File
4. Select a number to be associated with the song (1-9).
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MachXO Control Development Kit User’s Guide
5. Ensure the protocol to transfer the file is Xmodem then select the file to upload. Toggle any switch on SW2 to
begin uploading the file. The File progress window will update and the LEDs on the MachXO Control Evaluation Board will toggle.
Figure 8. Upload a File
Figure 9. Select File to Upload with Xmodem Protocol
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MachXO Control Development Kit User’s Guide
Figure 10. File Upload Status
6. The file is uploaded and ready to be played. Press p then a number to select the song to play. At any time,
press x to stop the playing of the song.
Figure 11. Select a Song to Play
Power Supply Fault Logging Demo
This demo showcases a solution for detecting and logging power supply fault conditions in non-volatile memory.
The demo is based on the reference design Power Supply Fault Logging (RD1062). Additional reference designs to
build the system include:
• RD1042, WISHBONE UART
• RD1043, LatticeMico8 to WISHBONE Interface Adapter
• RD1044, SPI WISHBONE Controller
• RD1026, LatticeMico8 Microcontroller
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MachXO Control Development Kit User’s Guide
Figure 12. Power Supply Fault Logging Demo Block Diagram
MachXO2280
ispPAC-POWR1014A
OUT3 - Fault
Elapsed Time
OUT10 - Stat0
SS
OUT11 - Stat1
VMON
1-10
A&B
VMON
Status Dump
State
Machine
OUT12 - Stat2
VMON
Status Capture
State
Machine
250kHz - PCLK
SCLK
SPI
Write
Status
State
Machine
MOSI
MISO
SPI Memory
SS
M
U
X
8MHz - MCLK
Fault Logging
RD1062
Sequencer &
Supervisory Logic
SCLK
MOSI
MISO
SS
SCLK
MOSI
MISO
Arbitration Logic
and Handshaking
SPI
RD1044
Busy Full Ready Mem
Clear
4 bit Port
Wishbone
Bus
RD1043
LM8
UART
RD1026
RD1042
Hyperterminal
Interface
Arbitration logic and handshaking between the LatticeMico8 microcontroller and the Power Supply Fault Logging
reference design (RD1062) is implemented to prevent contention with the interface signals of the SPI memory.
During this demo, the user will trigger faults in voltage rails monitored by Power Manager II ispPAC-POWR1014A,
which will detect the faults and enable a dump of VMON status to the MachXO. The dump of VMON status is implemented using supervisory logic equations and happens automatically using outputs and clock pins of the Power
Manager II. The MachXO will log the VMON status to SPI memory. The user is able to read the logged VMON status from SPI memory using the HyperTerminal interface of a personal computer.
Demo Environment Setup
The user will first set up the MachXO Control Evaluation Board by populating jumpers in headers J17 and J22.
These jumpers will later be used to trigger a fault condition during the demonstration. Next, program the Power
Manager II and MachXO devices with the configuration patterns of this demo. The JEDEC files with the configuration patterns are located in the following directories:
…\MachXO_Control_PowerSupplyFaultLogging_Demo\project\MachXO
…\MachXO_Control_PowerSupplyFaultLogging_Demo\project\POWR1014A
Establish a HyperTerminal communication between the personal computer and the MachXO Control Evaluation
Board as previously described in this document. Press on the pushbutton S1 to reset the board. Upon release of
the reset line, the LatticeMico8 will transmit a menu of options through the UART to the HyperTerminal as shown in
Figure 13.
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MachXO Control Development Kit User’s Guide
Figure 13. HyperTerminal Window
• Option 1 of the menu will display the total number of faults logged in SPI memory.
• Option 2 of the menu will display the latest fault that was logged in SPI memory.
• Option 3 of the menu will step one-by-one through all the faults that were logged in SPI memory.
• Option 4 of the menu will clear all the faults that were logged in SPI memory.
The demo design is configured to capture and log up to 251 faults in SPI memory. A message indicating that the
SPI memory is full will be displayed in the HyperTerminal window in case the maximum number of faults is reached.
Trigger Fault Conditions
Below is a list of fault conditions that users can cause on the board. After a fault condition is caused, the user can
use menu options 1-3 to read the faults logged in SPI memory.
Fault conditions:
1. VMON2: Under volt if test point I/O 25 is shorted to test point I/O 26.
2. VMON2: Over volt if a 1KOhm resistor is shorted from test point I/O 26 to GND.
3. VMON3: Under volt if test point I/O 17 is shorted to test point I/O 19
4. VMON3: Over volt if a 1KOhm resistor shorts test point I/O 19 to GND
5. VMON4: Under volt if jumper J17 is removed. Remove jumper for less than two seconds.
6. VMON5: Over volt if jumper J22 is removed. Remove jumper for less than two seconds.
7. VMON7: Under voltage if 1KOhm resistor shorts HVO1 to GND.
8. VMON8: Under voltage if 1KOhm resistor shorts HV02 to GND.
When any of the above faults happen VMON9 and VMON 10 will have faults based on the settings of SW4: SW4.1
emulates comparator A status and SW4.2 emulates comparator B status.
There is a 2-second delay after a fault to prevent double faults before the sequence restarts.
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MachXO Control Development Kit User’s Guide
The image below shows the HyperTerminal window after an over volt fault was caused on VMON5 and the user
selected options 1 and 2 of the menu.
If desired, users can modify the assembly program for this demo by using the updated LatticeMico8_V3.01 assembler from the following directory:
…\MachXO_Control_PowerSupplyFaultLogging_Demo\LatticeMico8_V3_01_Util\
Download Demo Designs
Lattice distributes source and programming files for a variety of demonstration designs compatible with the
MachXO Control Evaluation Board.
To download demo designs:
1. Browse to the MachXO Control Development Kit web page at www.latticesemi.com/machxo-control-kit. Select
the Demo Applications download and save the file.
2. Extract the contents of MachXO_Control_Dev_Kit.zip to an accessible location on your hard drive.
Five demo design directories are unpacked.
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MachXO Control Development Kit User’s Guide
Demo
Directories
Revision
MachXO2280 Control SoC Demo
Demo_MachXO_Control_SoC
.\LatticeMico8_V3_0_Verilog
.\project
.\RD1042
.\RD1043
.\RD1044
.\RD1046
.\RD1053
.\RD1060
.\source
1.0
POWR1014A Board Management (BM) Demo
Demo_PM_Control_BM
1.0
Voltage Monitoring Demo
Demo_MachXO_Control_ADC_Voltage_Monitor
.\project
.\RD1066
.\source
.\testbench
1.1
Memory-Audio Demo
Demo_MachXO_Control_Mem_Audio
.\project
.\RD1040
.\RD1042
.\RD1043
.\RD1044
.\RD1048
.\RD1053
.\Wave_Files
1.0
Power Supply Fault Logging Demo
Demo_MachXO_Control_FaultLogging
.\LatticeMico8_V3_0_Verilog
.\LatticeMico8_V3_01_Util
.\project
.\RD1042
.\RD1043
.\RD1044
.\source
1.0
Where:
• .\project – ispLEVER project (.syn) or PAC-Designer project (.pac), preferences (.lpf), and programming file
(.jed). This directory may contain intermediate results of the ispLEVER/PAC-Designer build process.
• .\source – HDL source for the ispLEVER project.
• .\LatticeMico8_V3_0_Verilog – RD1026, LatticeMico8 Microcontroller User’s Guide
• .\rdxxxx – Reference designs integrated by a demo.
Programming Demo Designs with ispVM
The Control SoC demo design is pre-programmed into the MachXO Control Evaluation Board by Lattice. To restore
a board to factory settings or load an alternative demo design, use the procedure in this section.
To program a demo programming file:
1. Connect the MachXO Control Evaluation Board USB connector (J8) to a host PC.
2. Connect the included 5V adapter to the MachXO Control Evaluation Board power connector (J10).
3. Ensure the JTAG chain jumpers are set properly to include the MachXO and POWR1014A devices (See Figure
X).
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MachXO Control Development Kit User’s Guide
4. From the Start menu run ispVM System. ispVM appears.
5. Choose Options > Cable and IO Port Setup… The Cable and I/O Port Setup dialog appears.
6. Click Auto Detect. ispVM will detect Cable Type USB and Port Setting USB2.
7. Click OK.
8. Choose ispTools > Scan Chain. The New Scan Configuration Setup window appears. Bot the LCMXO2280
and POWR1014A appear in the device list.
9. Right-click the LCMXO2280C entry and choose Edit Device… The Device Information dialog appears.
10. From the Data File section, click the Browse button. The Open Data File dialog appears.
11. Browse to the <Demo Dir>\project folder, select <Demo>.jed, and click Open.
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MachXO Control Development Kit User’s Guide
From the Operation list choose FLASH Erase, Program, Verify and click OK.
12. Choose Project > Download. ispVM reprograms the MachXO Control Evaluation Board.
Programming requires about 20-40 seconds. A small timer window will appear to show elapsed programming
time. At the end of programming, the configuration setup window should show a PASS in the Status column.
Rebuilding a MachXO Demo Project with ispLEVER
Use this general procedure here to rebuild any of the MachXO2280 demo projects for the MachXO Control Evaluation Board.
1. Install and license ispLEVER software
2. Install and license ispVM System software.
3. Download the demo source files from the MachXO Control Development Kit Webpage at www.latticesemi.com/machxo-control-kit.
4. Run the ispLEVER Project Navigator.
5. Create a new project and add the HDL files from the <demo>\source directory. Note that some demos provide
a <demo>.syn project file.
6. Import the logical preference file (<demo>.lpf) with I/O plan and timing requirements.
7. Run the Generate Data File (JEDEC) process.
8. See the Programming Demo Designs with ispVM section of this document for details on downloading a programming file to the board.
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Reassembling the Demo LatticeMico8 Firmware
Use this general procedure to reassemble and download changes to the LatticeMico8 microcontroller firmware.
1. Install the LatticeMico8 Tool Code Revision 3.0 from
www.latticesemi.com/products/intellectualproperty/referencedesigns/8bitmicrocontrollermico8.cfm
Note: The LatticeMico8 tool executables are also provided in the
.\Demo_MachXO_Control_SoC\LatticeMico8_V3_0_Verilog\utils directory.
2. Compile the LatticeMico8 Assembler and Simulator (optional)
3. Modify the Assembly source (.s) file and recompile to a memory image (.hex). Source for the Control SoC
demo is provided as control_soc_demo.s.
4. Use the Memory Initialization tool of the ispLEVER Project Navigator to update the physical database NCD.
5. Rerun Generate Data File (JEDEC) process.
6. See the Programming Demo Designs with ispVM section of this document for details on downloading a programming file to the MachXO Control Evaluation Board.
Recompiling a Power Manager II Demo Project with PAC-Designer
Use the general procedure here to rebuild any of the POWR1014A demo projects for the MachXO Control Evaluation Board.
1. Install and license PAC-Designer software
2. Install and License ispVM System software.
3. Download the demo source files from the MachXO Control Development Kit Webpage at www.latticesemi.com/machxo-control-kit.
4. Run PAC-Designer.
5. Open the PAC-Designer project file (<demo>.pac) from the <demo>\source directory.
6. Double-click the Sequence Controller block.
7. Choose Tools > Compile LogiBuilder Design.
Note: To program the POWR1014A device, the MachXO device must be removed from the JTAG chain by setting
the JTAG jumpers (see Figure X). Because the power to the MachXO device is controlled by the POWR1014A, it
cannot be in the JTAG chain during POWR1014A updates.
MachXO Control Evaluation Board
This section describes the features of the MachXO Control Evaluation Board in detail.
Overview
The MachXO Control Evaluation Board is an AC-powered development platform for the MachXO PLD. The board
includes on-board SRAM and SPI Flash memory, I2C and SPI microcontroller communication interfaces, a USB
program/debug port, and an expansion header to support test connections.
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Figure 14. MachXO Control Evaluation Board Block Diagram
2x40
Header Landing
2x40
Header Landing
Optional
expansion
boards
46 GPIO
4
XO2280
LED Bank
9
SD Card
Socket
36
CompactFlash
Socket
I2C 2
I2C Temp.
Sensor
28
1 Mbit
SRAM
Wallwart
Current
Sensor
PWM
Fan Circuit
SPI 3
SPI 2 Mbit
Flash
Power
Supply
8
3
2C
6
GPIO
A
Delta-Sig
ADC Circuit
MachXO
LCMXO2280C-4F256C
Power Manager II
POWR1014A
3
4
Optional
SD
Memory Card
Optional
CompactFlash
Memory Card
Audio Jack
Circuit
2I
3
Optional
LCD
Fan Circuit
POWR1014A
LED Bank
Fan
2-Bit
DIP Switch
JTAG Program /
Serial Debug
62.5 MHz
Crystal
A/Mini-B
USB Cable
USB
Controller
USB Mini B
Socket
GSRN/
2 SLEEPN
2 User
Pushbuttons
8
8-bit
DIP SW
Table 2 describes the components on the board and the interfaces it supports.
Table 2. MachXO Control Evaluation Board Components and Interfaces
Component/Interface
Type
Schematic Reference
Description
Circuits
USB Controller
Circuit
U3:CY7C68013A-QFN56
USB-to-JTAG interface
USB to Serial (RS-232)
Circuit
U1:FT232R / 32-QFN
USB-to-Serial interface
62.5 MHz Oscillator
Clock
U38
MachXO clock source
1Mbit SRAM
Memory
U8:CY128X8TSOP
1Mb of SRAM
MachXO PLD
PLD
U60:MachXO_2280_FN256
LCMXO2280FN256
POWR1014A
PLD
U17:ispPAC-POWR1014A
ispPAC-POWR1014A
I C Temperature Sensor
I/O
U15:TMP101
Measures board temperature
2Mbit SPI Flash Memory
Memory
U4
2Mb FLASH memory
8 LEDs
Output
D7-D0
User-definable LEDs
2X16 Header
I/O
J6
User-definable I/O
USB Control B Sockets
I/O
J1, J8
Programming and debug interface
Push-button switches
I/O
S1, S2
GSR and Sleep push buttons
Jumper
I/O
J2
MachXO Core current
Jumper
I/O
J3
MachXO AUX current
Jumper
I/O
J4
MachXO I/O current
Jumper
I/O
J6
MachXO TSALL input
Components
2
Interfaces
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Table 2. MachXO Control Evaluation Board Components and Interfaces (Continued)
Jumper
I/O
J17
Connects Vccio
Jumper
I/O
J22
Grounds Vccaux
Subsystems
This section describes the principle subsystems for the MachXO Control Evaluation Board in alphabetical order.
CompactFlash Card Socket
A CompactFlash card socket (J16 - Schematic Sheet 2 of 10) will accept both Type I and Type II cards.
Table 3. CompactFlash Socket Reference
Item
Description
Reference Designators
J16
Part Number
CF_Socket
Manufacturer
AVX
Part Number
AVX-31-5620-050-116-871
Tested CF Flash Memory Card: SanDisk 64MB
Current Sensor Circuits
The MachXO Control Evaluation Board provides three resistive current sensing circuits (Schematic Sheet 7 of 10)
using the technique described in AN6049, High-side Current Sensing Techniques for Power Manager Devices. You
may measure current consumption of the MachXO2280 Vcccore, Vccaux, or Vccio through the POWR1014A voltage supervisor function.
Digital Potentiometer Circuit
An I2C addressable digital potentiometer (U44 – Schematic Sheet 4 of 10) is programmable to adjust the LCD
backlight and contrast and optionally provide a variable input voltage for the Delta-Sigma ADC circuit.
Fan Circuit
A 3-pin fan motor header and circuit supports a DC fan motor (Schematic Sheet 3 of 10).
GPIO Expansion Header Land Patterns
The MachXO Control Evaluation Board provides land patterns for two 40-pin general purpose I/O (GPIO) expansion headers (J4 and J7 – Schematic Sheet 2 of 10), a 38-pin header for MachXO2280 GPIO access, and one 14pin header for debug access. All land patterns are organized for 100mil centered pin headers.
J4 and J7 Land Patterns: J4 and J7 patterns are for two 40-pin expansion headers. The combination provides 46
user I/Os connected to the MachXO2280. The remaining pins serve as power and clock supplies for expansion
boards. I/Os are shared with the CompactFlash socket. The connector spacing, orientation, and I/O connections
match expansion board from Gleichmann Engineering. See the Gleichmann Hpe Expansion board page at
(http://www.ger-fae.com/hpe_expansion.html) for an example.
Table 4. Header J4 Pin Information
Function
J4 Pin
MachXO Pin
GPIO_RST
1
E8
GND
2
CompactFlash Socket Pin
IO0
3
E9
2
IO1
4
A10
3
IO2
5
A9
4
IO3
6
C9
5
IO4
7
C10
6
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Table 4. Header J4 Pin Information (Continued)
Function
J4 Pin
MachXO Pin
CompactFlash Socket Pin
IO5
8
D9
7
IO6
9
D10
8
IO7
10
B9
9
IO8
11
B10
10
IO9
12
A11
11
IO10
13
A12
12
IO11
14
B11
14
IO12
15
B12
15
IO13
16
C11
16
IO14
17
C12
17
IO15
18
A13
18
GND
19
+3.3V
20
A14
19
D11
20
D12
21
IO16
21
GND
22
IO17
23
GND
24
IO18
25
GND
26
IO19
27
E10
22
IO20
28
E11
23
B13
24
IO21
29
GND
30
IO22
31
C13
25
IO23
32
B14
26
C14
27
IO24
33
GND
34
IO25
35
A15
28
IO26
36
B15
29
IO27
37
B3
30
GPIO_CARDSEL#
38
B2
IO28
39
A2
31
GND
40
MachXO Pin
CompactFlash Socket Pin
Table 5. Header J7 Pin Information
Function
J7 Pin
GND
1
NC
2
3.3V
3
IO29
4
A3
32
IO30
5
D3
33
IO31
6
D4
34
IO32
7
C4
35
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MachXO Control Development Kit User’s Guide
Table 5. Header J7 Pin Information (Continued)
Function
J7 Pin
MachXO Pin
CompactFlash Socket Pin
IO33
8
C5
36
IO34
9
D6
37
IO35
10
D5
39
IO36
11
B4
40
IO37
12
B5
41
IO38
13
E7
42
IO39
14
E6
43
IO40
15
A5
44
IO41
16
A4
45
IO42
17
C6
46
IO43
18
C7
47
IO44
19
B6
48
IO45
20
B7
49
5V
21
GND
22
3.3V
23
GND
24
3.3V
25
GND
26
3.3V
27
GND
28
OSC_CLK
29
GND
30
IO46
31
GND
32
IO47
33
GND
34
3.3V
35
GND
36
3.3V
37
GND
38
3.3V
39
GND
40
A6
A7
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MachXO Control Development Kit User’s Guide
38-Hole Land Pattern: The MachXO Control Evaluation Board provides a 38-hole landing area with connections to
POWR1014A and MachXO2280 support circuits (Schematic Sheet 8 of 10).
Table 6. 38-Pin Landing Pattern Pin Information
Function
Pin
POWR1014A Pin
Other Connections
HVOUT1
IO9
15
HVOUT2
IO54
14
PM_I2C_ALERT
IO55
13
PM_OUT8
IO33
8
PM_OUT9
IO11
6
PM_OUT10
IO56
5
PM_OUT11
IO53
4
PM_OUT12
IO57
3
XO_RESET
IO59
2
XO2280 GSR push-button circuit
XO_Sleepn
IO60
1
XO2280 Sleep push-button circuit
PM_PLDCLK
IO61
42
PM_MCLK
IO85
43
VMON7
IO65
34
VMON8
IO66
35
VMON9
IO67
36
VMON10
IO68
37
ICC_Sense
IO69
25
ICCAUX_Sense
IO70
26
ICCIO_Sense
IO71
27
14-Hole Land Pattern: The MachXO Control Evaluation Board provides a 14-hole landing area with connections to
key SPI bus and DAC/ADC circuit nets (Schematic Sheet 3 of 10).
Table 7. 14-Hole Landing Pattern Pin Information
Function
Pin
XO_SPI_CS0
IO7
GND_6
XO_SPI_CLK
IO52
GND_50
XO_SPI_OUT
IO30
GND_29
XO_SPI_IN
IO8
GND_7
A2D_DS_IN
IO50
GND_51
D2A_OUT
IO28
GND_30
Fan_Trigger
IO28
GND_33
35
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
JTAG Jumpers
Two jumper circuits (Schematic Sheet 1 of 10) allow you to define the MachXO Control Evaluation Board’s JTAG
chain of installed devices. You may specify the Installed/Removed state for the MachXO2280 and POWR1014A of
the board. Additionally you can connect an external JTAG circuit by attaching to IO20, IO22, and IO24 test points.
See the Jumper Settings table of Schematic Sheet 1 for details.
LCD Panel Support Circuit
The MachXO Control Evaluation Board provides support circuitry and connector (Lumex LCM-S02002DSR. Note:
Assembly to generic 16-pin (2x8) header is required, for example, Sullins Connector Solutions PPPC082LFBNRC), Schematic Sheet 4 of 10. The LCD is connected to GPIOs of the MachXO and backlight/contrast controls.
Table 8. LCD Connector Pin Information
Function
J13 Pin
LCD_BACKLIGHT
1
GND
2
GND
3
+5V
4
LCD_CONTRAST
5
LCD_RS
6
LCD_RW
7
LCD_E
8
LCD_D0
9
LCD_D1
10
LCD_D2
11
LCD_D3
12
LCD_D4
13
LCD_D5
14
LCD_D6
15
LCD_D7
16
LCD_BACKLIGHT
17
GND
18
MachXO PLD (MachXO2280)
The MachXO PLD device (LCMXO2280C-4F256C) on the board provides 2280 LUTs, 7.5 Kbits of distributed
RAM, 27.6 Kbits of EBR SRAM, 211 user I/Os in a 17x17 mm ftBGA package.
Table 9. MachXO2280 Reference
Item
Description
Reference Designators
U60A, U60B, U60C, U60D, U60E
Part Number
LCMXO640/1200/2280-FT256/FTN256
Manufacturer
Lattice Semiconductor Corporation
Web Site
www.latticesemi.com
This following sections describe user access to the LCMXO2280FTN256 device.
MachXO2280 DIP Switch Bank Input: The MachXO Control Evaluation Board includes an eight-bit input toggle
switch tied to GPIOs of the MachXO (SW2 – Schematic Sheet 4 of 10). When in the open position, the switch is
pulled to 3.3V via a 10K resistor. When in the down position, the switch is tied to ground.
36
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Table 10. DIP Switch Pin Information
Function
SW2 Pin
MachXO Pin
SW7
1
T13
SW6
2
T12
SW5
3
R13
SW4
4
R14
SW3
5
T14
SW2
6
T15
SW1
7
R15
SW0
8
R16
GND
9
GND
10
GND
11
GND
12
GND
13
GND
14
GND
15
GND
16
MachXO2280 LED Bank: The evaluation board includes an eight LED tied to GPIOs of the MachXO (Schematic
Sheet 4 of 10). Driving logic low ‘0’ will light an LED.
Table 11. LED Bank Pin Information
Function
RN1_8_470
MachXO Pin
LED0
D1
T10
LED1
D2
T11
LED2
D3
N10
LED3
D4
N11
LED4
D14
R11
LED5
D15
R12
LED6
D16
P11
LED7
D17
P12
MachXO2280 GSR Input Push-button: A global RESET (GSR) push-button circuit (Schematic Sheet 5 or 10) connects to the dedicated pad for the MachXO2280 global RESET signal (GSRN). The push-button circuit can also be
driven from a POWR1014A output.
MachXO2280 Sleep Input Push-button: A temporary push-button switch connects to the MachXO2280 SLEEPN
input pin. When depressed the MachXO2280 enters Sleep Mode. Note that during sleep all I/Os of the device are
tri-stated. The push-button circuit can also be driven from a POWR1014A output.
MachXO2280 TSALL Input Jumper: A tri-state all (TSALL) jumper circuit (Schematic Sheet 5 or 10) connects to the
dedicated pad for the MachXO2280 global output enable signal. When TSALL is high all the outputs are tristated.
Oscillator Circuit
A 62.5MHz oscillator circuit (Schematic Sheet 5 of 10) fans out to a primary clock input of the MachXO USB controller PHY, prototype area, and GPIO Expansion Connector. You may disable the oscillator circuit by installing
jumper J24.
37
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Power Manager II Mixed Signal PLD (ispPAC-POWR1014A)
The Power Manager II (ispPAC-POWR1014A-01TN48I) (U17 – Schematic Sheet 8 of 10) provides a programmable
power supply supervisor, reset generation, and sequencing control features for the MachXO Control Evaluation
Board. By default the POWR1014A is programmed to monitor current and voltage levels of the MachXO2280
Icccore, Iccaux, Iccio, Vcccore, Vccaux, and Vccio using VMON inputs 1-6.
Table 12. POWR1014A Reference
Item
Description
Reference Designators
U17
Part Number
ispPAC-POWR1014A
Manufacturer
Lattice Semiconductor Corporation
Web Site
www.latticesemi.com
POWR1014A DIP Switch Input: The MachXO Control Evaluation Board includes a two-bit input toggle switch tied
to digital inputs of the POWR1014A (SW4 – Schematic Sheet 8 of 10). When in the open position, the switch is
pulled to 3.3V via a 10K resistor. When in the down position, the switch is tied to ground.
Table 13. POWR1014A DIP Switch Pin Information
Function
U17 Pin
Description
MachXO Pin
Other Connection
POWR1014A LED Bank: The MachXO Control Evaluation Board includes four LEDs tied to digital outputs of the
POWR1014A (Schematic Sheet 8 of 10). Driving logic low ‘0’ will light a LED.
Table 14. POWR1014A LED Bank Pin Information
Function
RN2_4_470
POWR1014A Pin
PM_LED0
D5
12
PM_LED1
D6
11
PM_LED2
D7
10
PM_LED3
D8
9
Power Supplies, Supply Control, and Fault Circuits
The MachXO Control Evaluation Board features a single coaxial input connector to apply power (Schematic Sheet
7 of 10). A 5V DC source must be applied to power the board.
A low dropout voltage regulator converts +5V to +3.3V. Two MOSFET power switch circuits controlled by the
POWR1014A enable the MachXO2280 Vcccore and Vccaux supplies. For more information on using power MOSFETs with Power Manager and Power Manager II devices see AN6048, Using Power MOSFETs with Power Manager Devices.
To emulate a supply failure on the MachXO Control Evaluation Board, you may remove either unplug the power
supply to disable the 5V input or remove Vccaux or Vccio jumpers connected to the voltage monitor inputs to the
POWR1014A (Schematic 8 of 10). When programmed with the default PC Board Control and Power Management
demo design the supply rail failure and time will be recorded to a diagnostic log of the on-board SPI Flash Memory.
Prototyping Area
The MachXO Control Evaluation Board provides 1” x 3”, 140-hole prototyping area with connections to
MachXO2280 GPIOs (Schematic Sheet 8 and 9 of 10), +3.3V, and GND. The area is organized as 7 columns of
100-mil spaced holes.
38
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Table 15. Prototype Area Column Organization
Column
1
Function
2
+3.3V
3
4
5
Proto Area (NC)
6
7
GND
Proto I/Os
Table 16. Column 7 Proto I/O Pin Information
Function
Proto I/O Pin
MachXO2280 Pin
ProtoT4
IO12
T4
ProtoR6
IO80
R6
ProtoT6
IO34
T6
ProtoT8
IO18
T8
ProtoM7
IO35
M7
ProtoM8
IO31
M8
ProtoR7
IO76
R7
ProtoR8
IO79
R8
ProtoN8
IO83
N8
ProtoN9
IO62
N9
ProtoP9
IO63
P9
ProtoP10
IO64
P10
ProtoM10
IO82
M10
ProtoR9
IO72
R9
ProtoR10
IO73
R10
ProtoP15
IO74
P15
ProtoP16
IO75
P16
OSC_CLK
IO77
XO_SDA
IO78
K5
XO_SCL
IO84
K4
PWM Analog Output Circuit
A pulse width modulated type circuit (Schematic Sheet 3 of 10) is provided to serve a digital to analog conversion
(DAC). A stereo phonejack (J26) allow you to connect external speakers or headphones to the MachXO Control
Evaluation Board.
SD Flash Memory Card Socket
A 9 pin SD card socket is provided (U23 – Schematic Sheet 3 of 10) with the ability to interface to SD card memory
cards.
SPI Flash Memory
The board is populated with an Atmel non-volatile 2 M-bit SPI Flash memory (U69 – Schematic Sheet 3 of 10).
Table 17. SPI Flash Memory Reference
Item
Description
Reference Designators
U69
Part Number
M25PE20-VMN6TP
Manufacturer
Numonyx/ST Micro
Web Site
www.numonyx.com
39
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
SRAM
The board is populated with 1 Mbit of SRAM from Cypress (U8 – Schematic Sheet 3 of 10) with a data bus width of
8 bits. The 17-bit address bus, the data bus and the control signals are connected directly to the CPLD. The 17-bit
address bus, named MEMORY_A0 through MEMORY_A16, addresses 1 byte locations.
Table 18. SRAM Reference
Item
Description
Reference Designators
U8
Part Number
CY128X8TSOP
Manufacturer
Cypress Semiconductor
Web Site
www.cypress.com
Status LEDs
One red power OK status LED is provided.
Temperature Sensor
The temperature sensor on the MachXO Control Evaluation Board is a TI TMP101NA/250 device (U15 – Schematic Sheet 3 of 10). It uses an I2C bus slave interface to provide the temperature reading on the board.
Test Points
In order to check the various voltage levels used, several test points are provided:
• VCC (1.2V, 2.5V, and 3.3V)
• VCCAUX
• VCCIO of all banks
• GND
• Clock source
• ADC GND
• ADC Vin
• DAC Vout
• DAC Fdbk
USB Programming and RS-232 Interface
The USB programming and data interface circuit (Schematic Sheet 10 of 10) provides clocking, boot memory, a
FTDI Chip dual USB UART/FIFO device.
By default, the MachXO Control Evaluation Board’s pre-programmed PC Board Control and Power Management
demo design provides a user interface layer to a PC-based terminal program.
Voltage Ramp Circuit
The evaluation board includes two voltage ramp circuits (Schematic Sheet 8 of 10) tied to the high-voltage outputs
of the POWR1014A. Vishay N-channel MOSFETs are included so test equipment can be attached to examine controlled FET ramp rate. FET source pins are attached to voltage monitor inputs of the POWR1014A.
Ramp the voltage of two simulated supplies up using the HVOUT1 and HVOUT2 outputs. Each circuit will be
ramped up at a different rate. The HVOUT outputs will each be connected to a circuit using a MOSFET controlling
a resistor and capacitor network. The voltage output of this circuit will be monitored by the VMON7 and VMON8
inputs. When the voltage on each of these inputs reaches the preset value, an LED on the POWR1014A LED bank
will be lit.
40
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Programming
Programming for the MachXO and Power Manager II devices are controlled using the ispVM® System software,
available for download from the Lattice website at www.latticesemi.com/ispvm.
Refer to the ispVM System software for help regarding operation of this software.
The MachXO Control Evaluation Board is equipped with a built-in USB-based programming circuit. This consists of
a USB PHY and a USB connector. When the board is connected to a PC with a USB cable, it is recognized by the
ispVM System software as a “USB Download Cable”. The MachXO PLD can then be scanned and programmed
using the ispVM System 17.5 or later software.
Mechanical Specifications
Dimensions: 6 ¼ in. [L] x 4 in. [W] x 5/8 in. [H]
Environmental Requirements
The evaluation board must be stored between -40° C and 100° C. The recommended operating temperature is
between 0° C and 55° C.
The evaluation board can be damaged without proper anti-static handling.
Modifying the MachXO Control Evaluation Board
The MachXO Control Evaluation Board provides a prototyping area to support extensions of its functionality.
Note: Modifying your board requires good electronics handling and PCB fabrication techniques to avoid damage.
This section describes how to modify the MachXO Control Evaluation Board to support the Voltage Monitoring
Demo using internal LVDS buffers.
1. Add a two-pin header (such as Samtech TSW-102-07-G-S, or equivalent) in the prototyping area, occupying
the ProtoP9 and the adjacent GND thru-holes. (Schematic: sheet 9 of 10)
2. Add a 3.3k resister between ProtoP10 and ProtoM10 thru-holes.
3. Add a 820p capacitor between Proto P10 and the adjacent GND thru-holes.
In this configuration, the two-pin header is used to facilitate the connection of a bench voltage supply and ground.
The input voltage must be limited between +3.2 volts and ground.
Note: Exercise good electronics handling to avoid ESD damage to the MachXO device when making bench connections.
Glossary
CPLD: Complex Programmable Logic Device
DIP: Dual in-line package.
I2C: Inter-Integrated Circuit.
LED: Light Emitting Diode.
PCB: Printed Circuit Board.
RoHS: Restriction of Hazardous Substances Directive.
PLL: Phase Locked Loop.
SPI: Serial Peripheral Interface.
41
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
SRAM: Static Random Access Memory.
TransFR: Transparent Field Reconfiguration.
UART: Universal Asynchronous Receiver/Transmitter.
USB: Universal Serial Bus.
WDT: Watchdog timer
Troubleshooting
Board Does Not Power On Completely
If jumper is not installed at J17, when power is initially applied to the board, the POWR1014A will stop the power-on
sequence of the board. Install a jumper at J17 to enable the power-on sequence.
Board Continuously Resets
If position 2 of the POWR1014A DIP Switch (SW4) is depressed the board will continuously cycle the reset input of
the system. Raise position 2 of SW4 for normal operation.
Other JTAG Devices are Ignored by ispVM Software
• See Schematic Sheet 1 of 10 to ensure the TDI-TDO and TMP jumper settings enable the Other JTAG option.
• All JTAG devices attached to the MachXO Control Evaluation Board JTAG chain, must use a 3.3V supply rail to
be recognized by ispVM System software.
Determine the Source of a Pre-Programmed Part
It’s likely you will receive your MachXO Control Evaluation Board after it has been reviewed and reprogrammed by
someone else. To restore the board to the factory default, see the Download Demo Designs section of this document for details on downloading and reprogramming the device.
You can also determine which demo design is currently programmed onto the board by comparing the JEDEC
checksums against of the programming file with what is read from the programmed part.
To compare JEDEC file checksum:
1. Connect the MachXO Control Evaluation Board to a host PC using the USB ports.
2. Start ispVM and choose ispTools > Scan. The LCMXO2280C appears in the Device List.
3. Double-click the LCMXO2280C row. The Device Information dialog appears.
4. Click the Browse button. The Save as Data File dialog appears.
5. Specify a new JEDEC Data File name and click the Save button.
6. From the Operation list choose FLASH Read and Save and click OK.
7. Choose Project > Download. ispVM reads the Flash contents from the MachXO and writes the results to the
JEDEC file specified.
Open the JEDEC file into a text editor and page to the bottom of the file.
Note the hexidecimal checksum at the line above the User Electronic Data note line. Compare this value
against the checksum of the original JEDEC demo programming files.
42
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Ordering Information
Description
Ordering Part Number
MachXO Control Development Kit
China RoHS Environment-Friendly
Use Period (EFUP)
LCMXO2280C-M-EVN
Technical Support Assistance
Hotline: 1-800-LATTICE (North America)
+1-503-268-8001 (Outside North America)
e-mail: [email protected]
Internet: www.latticesemi.com
Revision History
Date
Version
August 2009
01.0
Initial release.
Change Summary
August 2009
01.1
Added Appendix A - Schematic.
October 2009
01.2
Included support for the Power Supply Fault Logging, Voltage Monitoring and Memory-Audio demos.
April 2010
01.3
Updated Appendix A - Schematic.
June 2010
01.4
Updated “Voltage Monitoring Demo” section.
Updated Appendix B - Bill of Materials.
Added “Modifying the MachXO Control Evaluation Board” section.
© 2010 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as
listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of
their respective holders. The speci• cations and information herein are subject to change without notice.
43
44
A
B
C
5
From USB
Sheet 10
USB_TCK
USB_TDI
USB_TMS
R158
4_7k
DI
4
XO_TDI
DI
DI
J5
Jumper_1way
PM_TDI
Removed
Installed
Removed
Removed
Installed
3
Installed
TMS Jumper
Removed
Installed
PM_TCK
PM_TDO
Invalid
Device Excluded
Device Included
Invalid
Effect
Jumper Settings
DI
J9
Jumper_1way
TDI-TDO Jumper
XO_TCK
XO_TDO
DI
TDI
IO23
DI
DI
IO24
J14
Jumper_1way
IO22
J19
Jumper_1way
IO20
J18
Jumper_1way
PM_TMS
IO21
R192
10K
DI
+3.3V
Other JTAG
J15
Jumper_1way
XO_TMS
+3.3V
+3.3V
R191
10K
DI
Sheet 8
Sheet 4
R159
10K
DI
Power Manager JTAG
MachXO JTAG
3
2
1
2
1
4
2
1
2
1
D
5
2
1
2
1
2
TCK
TDO
TMS
GND_72
2
Project
MachXO Control Board
Monday, 13-Apr-09
Date:
1
Sheet
Lattice Semiconductor Applications
Email: [email protected]
Phone (503) 268-8001 -or- (800) LATTICE
To USB
Sheet 10
Size
B
Title
Config
USB_TDO
1
Schematic Rev
Board Rev
of 10
1
B
A
B
C
D
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Appendix A. Schematic
Figure 15. Configuration
45
A
B
C
D
C35
10uF
DI
IO35
IO36
IO37
IO38
IO39
IO40
IO41
IO42
IO43
IO44
IO45
IO11
IO12
IO13
IO14
IO15
IO16
IO17
IO18
IO19
IO20
IO21
IO22
IO23
IO24
IO25
IO26
IO27
IO28
IO29
IO30
IO31
IO32
IO33
IO34
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
IO8
IO9
IO10
+3.3V
5
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
CF_ Socket
DI
GND
D3
D4
D5
D6
D7
CE1N/CE1N/CS0N
A10
OEN/OEN/ATA_SELN
A9
A8
A7
VCC
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
WP/IOIS16N/IOCS16N
CD2N
CD1N
D11
D12
D13
D14
D15
CE2N/CE2N/CS1N
VS1N
IORDN
IOWRN
WEN
READY/IREQN/INTRQ
VCC
CSELN
VS2N
RESET/RESET/RESETN
WAITN/WAITN/IORDY
INPACKN/DMARQ
REGN/DMACKN
BVD2/SPKRN/DASPN
BVD1/STSCHGN/PDIAGN
D8
D9
D10
GND
J16
Compact Flash Socket
Compact
Flash/GPIO
C6
C7
B6
B7
A6
A7
IO42
IO43
IO44
IO45
IO46
IO47
4
Sheet 5
OSC_CLK
A5
A4
IO40
IO41
B8
C8
E7
E6
IO34
IO35
IO38
IO39
D6
D5
IO32
IO33
B4
B5
C4
C5
IO30
IO31
IO36
IO37
A2
A3
D3
D4
IO28
IO29
B2
B3
GPIO_CARDSEL#
IO27
4
I/Os in Bank 0
for XO1200
Pin name sequence
PT(640,1200,2280)
PT4E/PT6C/PT8C
PT4F/PT6D/PT8D
PT4C/PT6A/PT7C
PT4D/PT6B/PT7D
PT4A/PT5E/PT7A
PT4B/PT5F/PT7B
PT3C/PT5C/PT6A
PT3D/PT5D/PT6B
PT3E/PT5A/PT6C
PT3F/PT5B/PT6D
NC/PT4C/PT6E
NC/PT4D/PT6F
PT3A/PT3E/PT5C
PT3B/PT3F/PT5D
PT2C/PT3C/PT5A
PT2D/PT3D/PT5B
PT2E/PT4A/PT4A
PT2F/PT4B/PT4B
NC/PT2C/PT3C
NC/PT2D/PT3D
3
3
I/Os in Bank 1
for XO2280
NC/PT11C/PT16C
NC/PT11D/PT16D
NC/PT11A/PT16A
NC/PT11B/PT16B
PT9E/PT10E/PT15C
PT9F/PT10F/PT15D
NC/PT10C/PT15A
NC/PT10D/PT15B
PT9C/PT10A/PT14C
PT9D/PT10B/PT14D
PT7E/PT9E/PT14A
PT7F/PT9F/PT14B
PT8A/PT9C/PT13C
PT8B/PT9D/PT13D
PT7A/PT9A/PT12C
PT7B/PT9B/PT12D
PT7C/PT8E/PT12A
PT7D/PT8F/PT12B
PT5C/PT8C/PT11A
PT5D/PT8D/PT11B
PT8C/PT8A/PT10E
PT8D/PT8B/PT10F
PT6C/PT7E/PT10C
PT6D/PT7F/PT10D
PT6A/PT7C/PT10A
PT6B/PT7D/PT10B/CLK1
PT9A/PT7A/PT9C
PT9B/PT7B/PT9D
VCCIO1
LCMXO640/1200/2280-FT256/FTN256
PT2A/PT3A/PT3A
PT2B/PT3B/PT3B
NC/PT2A/PT2C
NC/PT2B/PT2D
VCCIO0
U60A
PT5A/PT6E/PT9A
PT5B/PT6F/PT9B/CLK0
D8
D7
IO21
IO22
IO23
IO24
IO25
IO26
B13
C13
A15
B15
IO19
IO20
IO17
IO18
IO15
IO16
IO13
IO14
IO11
IO12
IO9
IO10
IO7
IO8
IO5
IO6
IO3
IO4
IO1
IO2
GPIO_RST
IO0
B14
C14
E10
E11
D11
D12
A13
A14
C11
C12
B11
B12
A11
A12
B9
B10
D9
D10
C9
C10
A10
A9
E8
E9
R195
0
DI
+5V +3.3V
2
Compact
Flash/GPIO
2
IO16
IO17
IO18
IO19
IO21
IO22
IO24
IO25
IO27
IO28
GPIO_RST
IO0
IO2
IO4
IO6
IO8
IO10
IO12
IO14
IO46
IO47
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
CON40A
DNI
2x20x100mil
J7
GPIO Header
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
CON40A
DNI
2x20x100mil
J4
IO23
IO20
IO1
IO3
IO5
IO7
IO9
IO11
IO13
IO15
IO26
GPIO_CARDSEL#
+3.3V
Project
MachXO Control Board
Monday, 13-Apr-09
Size
B
Date:
1
Sheet
Lattice Semiconductor Applications
Email: [email protected]
Phone (503) 268-8001 -or- (800) LATTICE
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
GPIO Header
Title
MachXO Banks 0 and 1
Sheet 5
OSC_CLK
IO30
IO32
IO34
IO36
IO38
IO40
IO42
IO44
R196
0
DI
+3.3V
1
Board Rev
2
of 10
Schematic Rev
R197
0
DI
+3.3V
IO29
IO31
IO33
IO35
IO37
IO39
IO41
IO43
IO45
B
A
B
C
D
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Figure 16. MachXO Banks 0 and 1
A
B
C
D
DI
0_1uF
C6
1
2
DI
Fan
U35
DI
3
6
1
4
3
2
5
7
8
9
5
1
2
1
SD Socket
DI
3
6
4
Fan_PWM
VSS1
Vss2
Vdd
R82
10k
DI
DAT0/D0
DAT1/IRQ
DAT2/NC
Clock
DAT3/CS
CMD/DI
U23
SD Card Socket
GND
ADD0
ALERT
TMP101
DI
SDA
SCL
VCC
U15
+3.3V
1
2
3
SPI
SRAM
Sheet 4
DeltaSignIn
A2D_DS_IN
Fan
SD Card
Analog
4
4
XO_A2D_DS_OUT
Jumper_2way
DI
J23
Sheet 5
I 2C
XO_I2C_ALERT
+3.3V
XO_SPI_CS0
XO_SPI_CLK
XO_SPI_IN
XO_SPI_OUT
Temperature Sensor
Slave Addr 1001010
U32
5
S
C
D
Q
1
6
5
2
M25PE20-VMN6TP
Vcc
Reset
W
Vss
U69
2MBit SPI
MOSFET
DI
GND
Sense
VCC
U34
Fan 3Pin Connector
R81
10k
DI
+5V
+3.3V
8
7
3
4
3 Pin Fan
SD_DAT0-D0
SD_DAT1-IRQ
SD_DAT2-NC
SD_CLOCK
SD_DAT3-CS
SD_CMD-DI
Sheet 5
I2C
XO_SDA
XO_SCL
Fan_Tach
+3.3V
C22
0_1uF
DI
+3.3V
4
2
3
5
C44
0_1uF
DI
R27
3k
DI
F13
F12
XO_SPI_CS0
XO_SPI_CLK
G12
G13
H12
H13
G14
H14
SD_CLOCK
SD_DAT0-D0
SD_DAT1-IRQ
SD_DAT2-NC
Fan_PWM
Fan_Tach
C45
0_01uF
DI
3
1
2
LMV331
DI
4
C46
0_1uF
DI
U16 5
+5V
A2D Delta Sigma
G15
H15
F16
G16
SD_DAT3-CS
SD_CMD-DI
Fan_Trigger
E15
F15
D16
E16
XO_A2D_DS_OUT
XO_D2A_Driver
XO_A2D_DS_IN
C15
D15
B16
C16
E14
F14
E13
E12
SRAM_WEb
XO_SPI_IN
XO_SPI_OUT
D14
D13
SRAM_CSb
SRAM_OEb
R83
5_1k
DI
3
XO_A2D_DS_IN
+3.3V
Pin name sequence
PR(640,1200,2280)
PR6A/PR8C/PR10C
PR6B/PR8D/PR10D
PR5C/PR8A/PR10A/LV_T
PR5D/PR8B/PR10B/LV_C
PR6C/PR7C/PR9C
PR6D/PR7D/PR9D
PR4C/PR7A/PR9A/LV_T
PR4D/PR7B/PR9B/LV_C
PR5A/PR6C/PR7C
PR5B/PR6D/PR7D
PR4A/PR6A/PR7A/LV_T
PR4B/PR6B/PR7B/LV_C
PR3A/PR5C/PR6C
PR3B/PR5D/PR6D
PR2C/PR5A/PR6A/LV_T
PR2D/PR5B/PR6B/LV_C
PR2A/PR4C/PR5C
PR2B/PR4D/PR5D
PR3C/PR4A/PR5A/LV_T
PR3D/PR4B/PR5B/LV_C
NC/PR3C/PR4C
NC/PR3D/PR4D
NC/PR3A/PR4A/LV_T
NC/PR3B/PR4B/LV_C
L11
M11
N13
N12
M12
M13
N15
N14
L12
L13
L14
M14
M16
N16
L15
M15
K16
L16
J13
K13
J14
K14
J15
K15
J12
K12
H16
J16
XO_D2A_Driver
DI
10k
2
3
1
2
Q3
2N2369A
DI
R50
100
DI
R44
100
DI
R6
330
PHONEJACK STEREO
J26
R26
DI
+5V
2
2
SRAM
C51
0_1uF
DNI
C21
10uF
DI
D2A_OUT
Addr_16
Addr_14
Addr_15
Addr_12
Addr_13
Addr_10
Addr_11
Addr_8
Addr_9
Addr_6
Addr_7
Addr_4
Addr_5
Addr_2
Addr_3
Addr_0
Addr_1
Data_6
Data_7
Data_4
Data_5
Data_2
Data_3
Data_0
Data_1
PWM Analog Signal Output
NC/PR16A/PR20A
NC/PR16B/PR20B
NC/PR15A/PR18A/LV_T
NC/PR15B/PR18B/LV_C
NC/PR14C/PR17C
NC/PR14D/PR17D
PR11C/PR14A/PR17A/LV_T
PR11D/PR14B/PR17B/LV_C
PR11A/PR13C/PR16C
PR11B/PR13D/PR16D
PR10A/PR13A/PR16A/LV_T
PR10B/PR13B/PR16B/LV_C
PR10C/PR12C/PR15C
PR10D/PR12D/PR15D
PR9C/PR12A/PR15A/LV_T
PR9D/PR12B/PR15B/LV_C
PR9A/PR11C/PR14C
PR9B/PR11D/PR14D
PR8C/PR11A/PR14A/LV_T
PR8D/PR11B/PR14B/LV_C
PR8A/PR10C/PR13C
PR8B/PR10D/PR13D
PR7C/PR10A/PR13A/LV_T
PR7D/PR10B/PR13B/LV_C
NC/PR9C/PR11C
NC/PR9D/PR11D
PR7A/PR9A/PR11A/LV_T
PR7B/PR9B/PR11B/LV_C
VCCIO3
LCMXO640/1200/2280-FT256/FTN256
NC/PR2A/PR3A/LV_T
NC/PR2B/PR3B/LV_C
VCCIO2
U60D
3
3
1
1
2
3
4
13
14
15
16
17
18
19
20
21
29
30
31
32
8
24
VSS
VSS
CEn
OEn
WEn
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
+3.3V
25
9
5
28
12
6
7
10
11
22
23
26
27
C24
0_1uF
DI
CY128X8TSOP
DI
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
VCC
VCC
U8
C23
0_1uF
DI
SRAM
1
IO7
IO52
IO30
IO8
IO50
IO28
IO36
Project
MachXO Control Board
Monday, 13-Apr-09
Size
B
Date:
Title
MachXO Banks 2 and 3
1
Sheet
Lattice Semiconductor Applications
Email: [email protected]
Phone (503) 268-8001 -or- (800) LATTICE
IO Header
XO_SPI_CS0
XO_SPI_CLK
XO_SPI_OUT
XO_SPI_IN
A2D_DS_IN
D2A_OUT
Fan_Trigger
Addr_0
Addr_1
Addr_2
Addr_3
Addr_4
Addr_5
Addr_6
Addr_7
Addr_8
Addr_9
Addr_10
Addr_11
Addr_12
Addr_13
Addr_14
Addr_15
Addr_16
+3.3V
R69
R68
R67
R66
R73
R65
R76
10K
10K
10K
10K
10K
10K
10K
DNI
DNI
DNI
DNI
DNI
DNI
DNI
R107
R149
R105
R104
R148
R103
R124
10K
10K
10K
10K
10K
10K
10K
46
DNI
DNI
DNI
DNI
DNI
DNI
DNI
Board Rev
3
of 10
Schematic Rev
GND_6
GND_50
GND_29
GND_7
GND_51
GND_30
GND_33
SRAM_CSb
SRAM_OEb
SRAM_WEb
Data_0
Data_1
Data_2
Data_3
Data_4
Data_5
Data_6
Data_7
B
A
B
C
D
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Figure 17. MachXO Banks 2 and 3
A
B
C
D
+3.3V
LEDs
Config
Sheet 1
LCD
5
5
DI DI DI DI DI DI DI DI
LED0
LED1
LED2
LED3
LED4
LED5
LED6
LED7
P5
P6
T5
T4
LCD_D3_SW
LCD_D5_SW
LCD_D7_SW
T8
T7
M7
M8
R7
R8
ProtoR6
ProtoT6
ProtoT8
ProtoM7
ProtoM8
ProtoR7
ProtoR8
RN1_8_470
DI
RN1
N7
M6
P4
R3
R6
T6
ProtoT4
T2
T3
R4
R5
LCD_D6_SW
LCD_RS
N5
N6
LCD_D2_SW
LCD_D4_SW
LCD_E
LCD_D1_SW
P2
P3
LCD_RW
LCD_D0_SW
XO_TDI
XO_TDO
XO_TMS
XO_TCK
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
D1
D2
D3
D4
D14
D15
D16
D17
LED
LED
LED
LED
LED
LED
LED
LED
+3.3V
I/Os in Bank 5
for XO1200
Pin name sequence
PB(640,1200,2280)
TDI
TDO
TMS
TCK
PB4E/PB6C/PB8C
PB4F/PB6D/PB8D
NC/PB6A/PB7C
NC/PB6B/PB7D
PB4C/PB5C/PB6A
PB4D/PB5D/PB6B
PB4A/PB5A/PB5A
PB4B/PB5B/PB5B
PB3C/PB4C/PB4C
PB3D/PB4D/PB4D
PB3A/PB4A/PB4A
PB3B/PB4B/PB4B
PB2C/PB3C/PB3C
PB2D/PB3D/PB3D
PB2A/PB3A/PB3A
PB2B/PB3B/PB3B
NC/PB2C/PB2C
NC/PB2D/PB2D
SW7
SW6
SW5
SW4
SW3
SW2
SW1
SW0
4
1
2
3
4
5
6
7
8
SW DIP-8
CTS 208-8
DI
SW2
RN1_8_10K
DI
RN2
DIP Switch
16
15
14
13
12
11
10
9
I/Os in Bank 4
for XO2280
NC/PB11C/PB16C
NC/PB11D/PB16D
SLEEPN
PB9F/PB10F/PB15D
NC/PB11A/PB16A
NC/PB11B/PB16B
PB9C/PB10C/PB15A
PB9D/PB10D/PB15B
PB9A/PB10A/PB14C
PB9B/PB10B/PB14D
PB8C/PB9E/PB14A
PB8D/PB9F/PB14B
PB8A/PB9C/PB13C
PB8B/PB9D/PB13D
PB7E/PB9A/PB13A
PB7F/PB9B/PB13B
NC/PB8E/PB12C
NC/PB8F/PB12D
PB7C/PB8C/PB12A
PB7D/PB8D/PB12B
PB6C/PB8A/PB11C
PB6D/PB8B/PB11D
PB6A/PB7E/PB10A
PB6B/PB7F/PB10B/CLK3
PB7A/PB7C/PB10C
PB7B/PB7D/PB10D
PB5A/PB7A/PB10E
PB5B/PB7B/PB10F/CLK2
VCCIO4
LCMXO640/1200/2280-FT256/FTN256
NC/PB2A/PB2A
NC/PB2B/PB2B
VCCIO5
U60C
4
PB5C/PB6E/PB9A
PB5D/PB6F/PB9B
P7
P8
16
15
14
13
12
11
10
9
47
1
2
3
4
5
6
7
8
SW1
SW0
P15
P16
3
XOSleepn_In
ProtoP15
ProtoP16
XOSleepn_In
SW3
SW2
T14
T15
R15
R16
P13
P14
SW5
SW4
SW7
SW6
LED6
LED7
LED4
LED5
LED2
LED3
LED0
LED1
ProtoR9
ProtoR10
ProtoM10
ProtoP9
ProtoP10
ProtoN8
ProtoN9
R13
R14
T13
T12
P11
P12
R11
R12
N10
N11
T10
T11
R9
R10
M10
M9
P9
P10
N8
N9
3
DI
0_01uF
C54
+3.3V
R36
10k
DI
XO Sleep
DIP
LED
3
4
2
1
DI
XO_Sleep_SW
SW3
XO_Sleepn
Sheet 8
Sheet 5
I2C
XO_SDA
XO_SCL
+3.3V
2
C15
0_1uF
DI
LCD_D0_SW
LCD_D1_SW
LCD_D2_SW
LCD_D3_SW
LCD_D4_SW
LCD_D5_SW
LCD_D6_SW
LCD_D7_SW
HD9x2
2
4
6
8
10
12
14
16
18
U42
NC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
GND
DI
QS3861
1
2
3
4
5
6
7
8
9
10
11
12
VCC
BEn
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
24
23
22
21
20
19
18
17
16
15
14
13
LCD 5V to 3.3V
1
3
5
7
9
11
13
15
17
J13
8
4
1
2
3
U44
POT
DI
A0
GND
SDA
SCL
Vcc
7
6
5
R183
10K
DI
LCD_D0
LCD_D1
LCD_D2
LCD_D3
LCD_D4
LCD_D5
LCD_D6
LCD_D7
R188
10K
DI
+5V
LCD_BACKLIGHT
LCD_CONTRAST
R184
10K
DI
LCD_RS
LCD_E
LCD_D1
LCD_D3
LCD_D5
LCD_D7
1
Project
MachXO Control Board
Monday, 13-Apr-09
Size
B
Date:
1
Sheet
Board Rev
4
of 10
Schematic Rev
Sheet 2
DeltaSignIn
R179
10K
DI
DI
D19
D_SW
Lattice Semiconductor Applications
Email: [email protected]
Phone (503) 268-8001 -or- (800) LATTICE
Title
MachXO Banks 4 and 5
H0
H1
H2
+5V
+5V
R182
100
DI
LCD_Connector
Variable POT
Slave Addr 1010000
LCD_CONTRAST
LCD_RW
LCD_D0
LCD_D2
LCD_D4
LCD_D6
LCD_BACKLIGHT
2
B
A
B
C
D
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Figure 18. MachXO Banks 4 and 5
48
A
B
C
D
XO_RESET
Sheet X
S1
5
4
3
1
2
DI
XO Global Reset
5
C83
0_01uF
DI
DI
R56
10k
C98
0_1uF
DI
USB Data
Sheet 10
HD1X2
DI
J24
L5
Ferrite_bead
BD0603
DI
+3.3V
C64
0_1uF
DI
+3.3V
USB Data
Sheet 10
2
1
4
4
+3.3V
ACBUS2
ACBUS3
ACBUS0
ACBUS1
SI-WUB
BCBUS2
BCBUS3
BCBUS0
BCBUS1
BDBUS6
BDBUS7
BDBUS4
BDBUS5
BDBUS2
BDBUS3
BDBUS0
BDBUS1
DI
10K R163
1
4
Tristate
VCC
U38 DI
2
GND
OUTP
3
Oscillator 62.5MHz
G1
H1
H4
H5
G3
H3
G4
G5
E1
F1
F2
G2
D2
D1
B1
C1
C3
C2
E3
E2
F3
F4
F5
F6
E4
E5
PL7C/PL9C/PL11C
PL7D/PL9D/PL11D
PL11A/PL13C/PL16C
PL11B/PL13D/PL16D
PL8A/PL13A/PL16A/LV_T
PL8B/PL13B/PL16B/LV_C
PL9C/PL12C/PL15C
PL9D/PL12D/PL15D
PL10A/PL12A/PL15A/LV_T
PL10B/PL12B/PL15B/LV_C
PL10C/PL14C/PL17C
PL10D/PL14D/PL17D
OSC_CLK
3
Sheets 2, 8, 9
OSC_CLK
Pin name sequence
PL(640,1200,2280)
PL11C/PL16A/PL19A
PL11D/PL16B/PL19B
PL5C/PL8C/PL10C NC/PL15A/PL18A/LV_T/PLL0_T_IN
PL5D/PL8D/PL10D NC/PL15B/PL18B/LV_C/PLL0_C_IN
NC/PL8A/PL9A/LV_T
NC/PL8B/PL9B/LV_C
PL4C/PL7C/PL8C NC/PL14A/PL17A/LV_T/PLL0_T_FB
PL4D/PL7D/PL8D NC/PL14B/PL17B/LV_C/PLL0_C_FB
NC/PL7A/PL8A/LV_T
NC/PL7B/PL8B/LV_C
PL4A/PL6C/PL7C
PL4B/PL6D/PL7D
PL7A/PL11A/PL13A/LV_T
PL7B/PL11B/PL13B/LV_C
PL9A/PL10C/PL12C
PL9B/PL10D/PL12D
TSALL/PL8C/PL11C/PL14C
PL8D/PL11D/PL14D
PL5A/PL6A/PL7A/LV_T
PL5B/PL6B/PL7B/GSR/LV_C
PL3C/PL5C/PL6C
PL3D/PL5D/PL6D
PL2A/PL5A/PL5A/LV_T
PL2B/PL5B/PL5B/LV_C
NC/PL4C/PL4C
NC/PL4D/PL4D
PL2C/PL4A/PL4A/LV_T
PL2D/PL4B/PL4B/LV_C
PL3A/PL3C/PL3C/PLL1T_IN PL6C/PL10A/PL12A/LV_T
PL3B/PL3D/PL3D/PLL1C_IN PL6D/PL10B/PL12B/LV_C
NC/PL3A/PL3A/LV_T
NC/PL3B/PL3B/LV_C
PL6A/PL9A/PL11A/LV_T
PL6B/PL9B/PL11B/LV_C
VCCIO6
LCMXO640/1200/2280-FT256/FTN256
NC/PL2A/PL2A/PLL1T_FB
NC/PL2B/PL2B/PLL1C_FB
VCCIO7
U60B
3
N4
N3
M5
M4
L5
L4
K5
K4
R1
R2
J4
J5
M2
N2
L3
M3
N1
P1
L1
M1
K2
L2
J1
K1
J3
K3
H2
J2
R59
10k
DI
10K
DI 10K
DI
2
10k
DI
R63
+3.3V
FT_SDA
FT_SCL
R134
R135
OSC_CLK
2_2K
DI 2_2K
DI
R62
+3.3V
R123
R125
10k
DI 10k
DI
R57
TSALL
PM_IN1
PM_IN2
PM_PLDCLK
PM_MCLK
PM_OUT11
PM_OUT12
PM_OUT10
2
+3.3V
+3.3V
1
2
DI
Jumper_1way
J6
Project
MachXO Control Board
Monday, 13-Apr-09
Size
B
Date:
Title
MachXO Banks 6 and 7
1
Sheet
Lattice Semiconductor Applications
Email: [email protected]
Phone (503) 268-8001 -or- (800) LATTICE
Sheet 8 I2C Bus Alert
Sheet 8 I2C Bus
PM_I2C_ALERT
PM_SDA
PM_SCL
Sheet 3 I2C Bus Alert
Sheets 3, 4, 5, 9 I2C Bus
XO_I2C_ALERT
XO_SDA
XO_SCL
Sheet 5 I2C FT-XO Bus
R58
10k
DI
Sheet 8
Power Manager
1
Schematic Rev
Board Rev
5
of 10
B
A
B
C
D
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Figure 19. MachXO Banks 6 and 7
49
VCCAUX_0
VCCAUX_1
VCCIO7_0
VCCIO7_1
VCCIO6_0
VCCIO6_1
VCCIO5_0
VCCIO5_1
VCCIO4_0
VCCIO4_1
VCCIO3_0
VCCIO3_1
VCCIO2_0
VCCIO2_1
VCCIO1_0
VCCIO1_1
VCCIO0_0
VCCIO0_1
XO_640 common VCCIO
VCCJ on VCCIO5
XO_640 common VCCIO
XO_640 common VCCIO
XO_640 common VCCIO
4
VCC_3
VCC_2
VCC_1
VCC_0
GND_0
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
LCMXO640/1200/2280-FT256/FTN256
K7
G7
K10
G10
A16
T16
F11
H10
J10
G9
H9
J9
K9
G8
H8
J8
K8
H7
J7
L6
A1
T1
VCC_CORE
3
VCC_AUX
VCC_IO
C33
0_1uF
DI
C14
0_1uF
DI
C25
0_1uF
DI
C13
0_1uF
DI
VCC_CORE
C12
0_1uF
DI
2
C42
0_1uF
DI
C7
0_1uF
DI
Decoupling Caps
C37
0_1uF
DI
C17
0_1uF
DI
C8
0_1uF
DI
Project
MachXO Control Board
Monday, 13-Apr-09
Date:
1
Sheet
Lattice Semiconductor Applications
Email: [email protected]
Phone (503) 268-8001 -or- (800) LATTICE
C38
0_1uF
DI
C16
0_1uF
DI
Size
B
Title
MachXO Power
C41
0_1uF
DI
C18
0_1uF
DI
1
Schematic Rev
B
C
D
Board Rev
6
of 10
A
A8
T9
G6
H6
J6
K6
L7
L8
L9
L10
J11
K11
G11
H11
F9
F10
F7
F8
U60E
2
A
VCC_IO
3
B
5
VCC_AUX
4
B
C
D
5
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Figure 20. MachXO Power
A
B
C
D
5V
Input
5
R42
2k
DI
2 -
DI
100
R41
ICC_N
IO15
3 +
R40
100
DI
PWR_JACK
5V
ICC_P
J10
DI
1
2
3
+5V
+3.3V
DI
R11
470
DI
4
9
ICCIO_N
R49
3_92k
DI
ICC_Sense
Sheet 8
10
DI
100
R48
DI
IN
1
GND
-
+
+3.3V
2
4
NCP1117
OUT
TAB
R46
3_92k
DI
C67
0_01uF
DI
R31
3_92k
AD8604ARZ
DI
8
U68C
0_1uF
DI
C31
Sheet 8
ICCIO_Sense
6 DI
100
R45
ICCAUX_N
R43
100
DI
5 +
DI
C20
22uF
+3.3V
ICCAUX_P
Current Sense
C19
10uF
DI
3
U7
+5V -> +3.3V Rail
ICCIO_P
R47
100
DI
C65
0_01uF
DI
R29
AD8604ARZ 2k
DI
1
U68A
0_1uF
DI
C29
+5V
D18
LED
+3.3V
3
3
C66
0_01uF
DI
R30
AD8604ARZ
3_92k
DI
7
U68B
0_1uF
DI
C30
PM_OUT8
Sheet 8
R200
220
DI
ZDT758
Q7A
5DI
R5
1
DI
IO13
Sheet 8
ICCAUX_Sense
ICC_P
4
R201
1K
DI
+3.3V
IO14
2
2
ICC_N
VCC_CORE
Core Current
3
6
AC 110V -> 5V
4
11
4
4
ICCIO_P
IO17
R3
2
DI
R203
220
DI
IO19
ICCIO_N
VCC_IO
IO26
ICCAUX_N
VCC_AUX
Project
MachXO Control Board
Monday, 13-Apr-09
Date:
1
Sheet
Lattice Semiconductor Applications
Email: [email protected]
Phone (503) 268-8001 -or- (800) LATTICE
IO25
ZDT758
Q7B
7DI
R7
2
DI
+3.3V
R202
1K
DI
2
1
AUX Current
ICCAUX_P
Size
B
Title
Board Power
+3.3V
I/O Current
PM_OUT9
Sheet 8
MachXO Power Rails
1
8
5
4
11
50
11
Schematic Rev
Board Rev
7
of 10
B
A
B
C
D
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Figure 21. Board Power
A
B
C
J22
DI
HD1X2
C73
0_1uF
DI
R189
1K
DI
VCC_CORE
1
2
D
I2C
Sheet 5
Config
Sheet 1
Sheet 5
J17
DI
HD1X2
VCC_IO
C72
0_1uF
DI
5
C71
0_1uF
DI
PM_IN3
PM_IN4
C69
0_1uF
DI
ICC_Sense
ICCAUX_Sense
ICCIO_Sense
Sheet 7
VMON7
VMON8
VMON9
VMON10
C70
0_1uF
DI
PM_SCL
PM_SDA
PM_TDI
PM_TMS
PM_TCK
PM_TDO
PM_IN1
PM_IN2
Decoupling Caps
R190
1K
DI
VCC_AUX
1
2
+3.3V
39
38
19
17
18
16
22
21
44
46
47
48
25
26
27
28
32
33
34
35
36
37
DI
4
HVOUT2
HVOUT1
ispPAC-POWR1014A
SCL
SDA
TDISEL
ATDI
TDI
TMS
TCK
TDO
IN1
IN2
IN3
IN4
VMON1
VMON2
VMON3
VMON4
VMON5
VMON6
VMON7
VMON8
VMON9
VMON10
U17
HVOUT1
HVOUT2
30
31
7
C79
1uF
DI
1kDI
C80
1uF
DI
R205
1kDI
R204
1
1
R187
200
DI
Q6
2N7002E
DI
+3.3V
R186
200
DI
Q5
2N7002E
DI
+3.3V
VMON8
VMON7
PM_PLDCLK
PM_MCLK
3
PM_I2C_ALERT
PM_LED0
PM_LED1
PM_LED2
PM_LED3
PM_OUT8
PM_OUT9
PM_OUT10
PM_OUT11
PM_OUT12
42
43
40
HVOUT1
HVOUT2
15
14
3
13
12
11
10
9
8
6
5
4
3
2
1
Voltage Ramp Circuit
GNDA
GNDD
GNDD
PLDCLK
MCLK
RESETB
SMBA_OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
OUT11
OUT12
OUT13
OUT14
+3.3V
Power Manager
Slave Addr Programmable
4
23
41
29
45
24
20
VCCD
VCCD
VCCA
VCCINP
VCCPROG
VCCJ
PM_PLDCLK
PM_MCLK
PM_OUT8
PM_OUT9
PM_OUT10
PM_OUT11
PM_OUT12
XO_RESET
XO_Sleepn
PM_I2C_ALERT
PM_LED0
PM_LED1
PM_LED2
PM_LED3
Sheet 5
Sheet 4
Sheet 5
Sheet 7
Sheet 5
+3.3V
LEDs
D5D6D7D8
LED
LED
LED
LED
DI DI DI DI
2
RN3
RN2_4_470
DI
Sheet 7
ICC_Sense
ICCAUX_Sense
ICCIO_Sense
2
+3.3V
IO Header
Project
MachXO Control Board
Monday, 13-Apr-09
Date:
1
Sheet
Lattice Semiconductor Applications
Email: [email protected]
Phone (503) 268-8001 -or- (800) LATTICE
SW DIP-2
DI
SW4
PM DIP Switch
Size
B
Title
Power Manager II
PM_IN3
PM_IN4
HVOUT1
HVOUT2
PM_I2C_ALERT
PM_OUT8
PM_OUT9
PM_OUT10
PM_OUT11
PM_OUT12
XO_RESET
XO_Sleepn
PM_PLDCLK
PM_MCLK
VMON7
VMON8
VMON9
VMON10
+3.3V
1
R118
R116
R126
R127
R129
R130
R132
R133
R131
R128
R162
R170
R165
R167
R169
R172
R174
R176
R181
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
DNI
DNI
DI
DI
DI
DI
DI
DI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
R114
R153
R152
R111
R110
R151
R154
R155
R156
R157
R161
R178
R166
R168
R171
R173
R175
R177
R185
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
10k
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
DNI
5
3
2
3
2
8
7
6
5
1
2
3
4
51
DI 10K R194
DI 10K R193
Board Rev
8
of 10
B
GND_11
GND_54
GND_53
GND_32
GND_10
GND_56
GND_55
GND_57
GND_59
GND_60
GND_61
GND_62
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
Schematic Rev
IO9
IO54
IO55
IO33
IO11
IO56
IO53
IO57
IO59
IO60
IO61
IO85
IO65
IO66
IO67
IO68
IO69
IO70
IO71
A
B
C
D
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Figure 22. Power Manager II
52
1
M_HOLE1
DI
IW_MNT0
1
M_HOLE1
DI
IW_MNT0
AB70
AB71
AB72
AB73
AB74
AB75
AB76
AB77
AB78
AB79
AB69
AB61
AB62
AB63
AB64
AB65
AB68
AB66
AB80
AB67
+3.3V
Proto Power
AB91
AB90
AB93
AB94
AB92
AB96
AB97
AB95
AB98
AB99
AB88
AB81
AB82
AB84
AB83
AB85
AB87
AB86
AB100
AB89
ProtoT4
ProtoR6
ProtoT6
ProtoT8
ProtoM7
ProtoM8
ProtoR7
ProtoR8
ProtoN8
ProtoN9
ProtoP9
ProtoP10
ProtoM10
ProtoR9
ProtoR10
ProtoP15
ProtoP16
Proto IOs
3
XO_SDA
XO_SCL
OSC_CLK
Sheet 5
I2C
Sheet 5
Sheet 4
3
IO78
IO84
IO77
IO12
IO80
IO34
IO18
IO35
IO31
IO76
IO79
IO83
IO62
IO63
IO64
IO82
IO72
IO73
IO74
IO75
AB14
AB16
AB18
AB20
AB22
AB24
AB26
AB28
AB30
AB32
AB34
AB36
AB38
AB40
AB42
AB44
AB46
AB48
AB50
AB52
BB1
BB2
BB3
BB4
BB5
BB6
BB7
BB8
BB9
BB10
BB11
BB12
BB13
BB14
BB15
BB16
BB17
BB18
BB19
BB20
2
CB1
CB2
CB3
CB4
CB5
CB6
CB7
CB8
CB9
CB10
CB11
CB12
CB13
CB14
CB15
CB16
CB17
CB18
CB19
CB20
Proto Area
2
Title
Proto Area
DB1
DB2
DB3
DB4
DB5
DB6
DB7
DB8
DB9
DB10
DB11
DB12
DB13
DB14
DB15
DB16
DB17
DB18
DB19
DB20
Lattice Semiconductor Applications
Email: [email protected]
Phone (503) 268-8001 -or- (800) LATTICE
1
Schematic Rev
B
C
D
Project
MachXO Control Board
Monday, 13-Apr-09
Size
B
Date:
1
Sheet
Board Rev
9
of 10
A
4
4
A
G3
E-Friendly
G2
WEEE
G1
Lattice Logo
Board Logos
MH7
MH5
1
B
5
M_HOLE1
DI
IW_MNT0
1
B
C
1
M_HOLE1
DI
IW_MNT0
M_HOLE1
DI
IW_MNT0
MH8
1
MH6
1
1
MH11
M_HOLE1
DI
IW_MNT0
MH9
Fan Mounting Holes
1
M_HOLE1
DI
IW_MNT0
1
M_HOLE1
DI
IW_MNT0
MH12
Board Mounting Holes
MH10
1
D
5
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Figure 23. Prototype Area
A
B
C
D
J8
MH1
MH2
CASE
CASE
CASE
CASE
NC
GND
DD+
VCC
10
11
6
7
8
9
4
5
2
3
1
USB_MINI_B DI
5
5
C50
0_1uF
DI
R14
DI
C43
0_1uF
DI
SHLD_Debug
C40
0_1uF
DI
100k DI
0_01uF
C55
R13
DI
R12
DI
+5V
27
27
1
DI
6 MHz
X3
C58
33pF
DI
2
8
7
6
5
CS
SK
DIN
DOUT
4
DI
10k
R32
DI
M93C46-WMN6TP
VCC
NC
ORG
GND
U70
64 x 16
1
2
3
4
DI
1k
R10
2_2K
DI
EECS
EESK
EEDATA
DI
R54
C52
12pF
DI
R37
1_5k
18 pF = 12 pF + Ground Plane (6 pF)
DI
C48
12pF
C53
33pF
DI
4
R53
1M
DI
R38
10k
DI
47
2
1
48
4
44
43
5
7
8
6
3V3OUT
DI
TEST
EEDATA
EESK
EECS
RESET#
XTOUT
XTIN
RSTOUT#
USBDP
USBDM
+5V
3
C39
0_1uF
DI
R39
330
DI
3
C36
0_1uF
DI
+3.3V
46
AVCC
AGND
3
42
VCC
VCC
45
14
31
VCCIOA
VCCIOB
GND
GND
GND
GND
53
9
18
25
34
FT2232
U4
PWREN#
SI/WUB
TXDENB#
SLEEPB#
RXLEDB#
TXLEDB#
TXDB
RXDB
RTSB#
CTSB#
DTRB#
DRSB#
DCDB#
RIB#
SI/WUA
TXDENA
SLEEPA#
RXLED#
TXLED#
TXDA
RXDA
RTSA#
CTSA#
DTRA#
DSRA#
DCDA#
RIA#
C34
0_1uF
DI
2
SI-WUB
26
41
BCBUS0
BCBUS1
BCBUS2
BCBUS3
30
29
28
27
SI-WUA
ACBUS0
ACBUS1
ACBUS2
ACBUS3
BDBUS0
BDBUS1
BDBUS2
BDBUS3
BDBUS4
BDBUS5
BDBUS6
BDBUS7
DI
0
+3.3V
40
39
38
37
36
35
33
32
10
15
13
12
11
24
23
22
21
20
19
17
16
R15
C47
0_1uF
DI
2
U67
4S1
4S2
3S1
3S2
2S1
2S2
1S1
1S2
11
13
7
9
3
5
15
1
Sheet 5
USB Data
STG3690QTR
GND
1-2IN
3-4IN
D1
D2
D3
D4
VCC
USB_TMS
USB_TDO
USB_TDI
USB_TCK
Sheet 1
Config
Project
MachXO Control Board
Monday, 13-Apr-09
Date:
1
Sheet
Board Rev
10 of 10
Schematic Rev
Sheet 5 I2C FT-XO Bus
Lattice Semiconductor Applications
Email: [email protected]
Phone (503) 268-8001 -or- (800) LATTICE
Size
B
Title
USB Program Data
6
2
10
16
4
8
12
14
FT_SCL
FT_SDA
1
B
A
B
C
D
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Figure 24. USB Program Data
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Appendix B. Bill of Materials
Table 19. Bill of Materials
Item Quantity
Populate
Vendor
2
C48, C52
12pF
SM/C_0603
DI
Murata Electronics
ERB1885C2E120JDX5D
12pF surface mount cap
2
38
C6, C7, C8, C12, C13, C14,
C15, C16, C17, C18, C22,
C23, C24, C25, C29, C30,
C31, C33, C34, C36, C37,
C38, C39, C40, C41, C42,
C43, C44, C46, C47, C50,
C64, C69, C70, C71, C72,
C73, C98
0_1uF
SM/C_0603
DI
Panasonic
ECJ-1VB1C104K
0.1uF surface mount cap
3
1
C51
0_1uF
SM/C_0603
DNI
Panasonic
ECJ-1VB1C104K
0.1uF surface mount cap
4
3
C19, C21, C35
10uF
SM/C_0603
DI
TDK Corp.
C1608Y5V0J106Z
10uF surface mount cap
5
1
C20
22uF
SM/C_0805
DI
Taiyo Yuden
LMK212BJ226MG-T
22uF surface mount cap
6
7
C45, C54, C55, C65, C66,
C67, C83
0_01uF
SM/C_0603
DI
Murata Electronics
GRM188R71H103KA01D
0_01 SMC
7
2
C53, C58
33pF
SM/C_0603
DI
Panasonic
ECJ-1VC2A330J
33pF SMC
8
13
D1, D2, D3, D4, D5, D6, D7, LED
D8, D14, D15, D16, D17, D18
SM/D_0603
DI
Lite-On
LTST-C190CKT
LEDRED
1
Reference
Part
Footprint
Part Number
Description
9
1
D19
D_SW
SM/SOD_323
DI
Diodes
1N4148WS
SM-SOD-323
10
1
J8
USB_MINI_B
TYPE_B
DI
Hirose
UX60-MB-5ST
USBType-BMiniConnector
11
7
J5, J6, J9, J14, J15, J18, J19 Jumper_1way
BLKCON.100/VH/
TM1SQ/W.100/2
DI
Samtec Inc.
TSW-102-07-G-S
Jumper with Shunt
(929957-08)
12
1
J23
Jumper_2way
JP_2WY
DI
Samtec Inc.
TSW-103-07-G-S
Jumper with Shunt
(929957-08)
13
1
J10
PWR_JACK
PWR_CON
DI
Switchcraft
RAPC712
CoaxialDCconnector
DI
Samtec Inc.
TSW-102-07-G-S
Jumper with Shunt
(929957-08)
14
3
J17, J22, J24
HD1X2
BLKCON.100/VH/
TM1SQ/W.100/2
15
1
J13
HD9x2
HD9x2
DI
Samtec Inc.
TSW-109-07-G-D
Jumper with Shunt
(929957-08)
16
1
J16
CF_ Socket
CF_2X30
DI
AVX
AVX-31-5620-050-116-871
AVXCFconnector
17
1
L5
Ferrite_bead
BD0603
DI
Steward
MI0603J600R-00
SMD0603 Ferrite Bead
18
1
Q3
2N2369A
SM/SOT23
DI
Fairchild
Semiconductor
MMBT2369A
Transistor NPN SOT-23
19
1
RN1
RN1_8_470
SMD_0603
DI
Rohm
Semiconductor
MNR18E0APJ471
SMD_0602
20
1
RN2
RN1_8_10K
SMD_0603
DI
Rohm
Semiconductor
MNR18E0APJ103
SMD_0602
21
2
R6, R39
330
SM/R_0603
DI
Panasonic ECG
ERJ-3EKF3300V
RES 330 OHM 1/10W
1% 0603 SMD
22
4
R15, R195, R196, R197
0
SM/R_0603
DI
Panasonic ECG
ERJ-3GEY0R00V
Resistor 0.0 SMD 0603
23
9
R40, R41, R43, R44, R45,
R47, R48, R50, R182
100
SM/R_0603
DI
Vishay/Dale
CRCW0603100RFKEA
SMT resistor
24
7
R54, R189, R190, R201,
R202, R204, R205
1k
SM/R_0603
DI
Vishay/Dale
CRCW06031K00FKEA
Resistor 1k SMD 0603
25
3
R10, R123, R125
2_2K
SM/R_0603
DI
Panasonic ECG
ERJ-3GEYJ222V
Resistor 2.2k SMD 0603
30
R26, R32, R36, R38, R56,
R57, R58, R59, R62, R63,
R81, R82, R126, R127,
R129, R130, R132, R133,
R134, R135, R159, R163,
R179, R183, R184, R188,
R191, R192, R193, R194
10K
SM/R_0603
DI
Vishay/Dale
CRCW060310K0FKEA
10K 0603 SMT resistor
27
46
R65, R66, R67, R68, R69,
R73, R76, R103, R104,
R105, R107, R110, R111,
R114, R116, R118, R124,
R128, R131, R148, R149,
R151, R152, R153, R154,
R155, R156, R157, R161,
R162, R165, R166, R167,
R168, R169, R170, R171,
R172, R173, R174, R175,
R176, R177, R178, R181,
R185
10k
SM/R_0603
DNI
Vishay/Dale
CRCW060310K0FKEA
10K 0603 SMT resistor
28
1
R27
3k
SM/R_0603
DI
Panasonic ECG
ERJ-3EKF3001V
RES 3.00K OHM 1/10W
1% 0603 SMD
29
1
R83
5_1k
SM/R_0603
DI
Panasonic ECG
ERJ-3EKF5101V
SMD 0603
30
1
R158
4_7k
SM/R_0603
DI
Panasonic ECG
ERJ-3EKF4701V
RES 4.7K OHM 1/10W
1% 0603 SMD
31
1
SW2
SW DIP-8
CTS 208-8
DI
CTS Corporation
Electrocomponents 194-8MST
x8 DIP Switch Piano
32
1
S1
XO Global Reset
SMT_SW
DI
Panasonic ECG
SPST_Switch
26
54
EVQ-Q2K03W
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Table 19. Bill of Materials (Continued)
Item Quantity
Reference
Part
Footprint
Populate
Vendor
Part Number
Description
1
U8
CY128X8TSOP
32-TSOP
DI
Cypress
34
1
U70
M93C46-WMN6TP
SOIC-8
DI
STMicroelectronics M93C46-WMN6TP
IC 1K EEPROM 8-SOIC
35
1
U15
TMP101
SM/SOT23_6
DI
TI
TMP101NA/250
IC TEMP SENSOR
DIG SOT-23-6
36
1
U23
SD Socket
SM/SD
DI
3M
SD-RSMT-2-MQ-WF
SD socket
37
1
U32
MOSFET
SOT-223-4
DI
Fair Child
NDT3055LCT-ND
MOSFET N-CH
DI
Molex/Waldom
Electronics
WM4201-ND
Molex Connector Corp.
38
1
U34
Fan 3 Pin Connector
SP-10
CY7C1019DV33-10ZSXI
IC SRAM 128KX8
ASYNC 32-TSOP
33
39
1
U35
Fan
Fan
DI
Fantronic
EC2510M05CA,NY PMS 440 Evercool 25x10mm Fan
0063 PH,NUT HEX 4-40
& two mouting nylon
NYLON
nuts/bolts
40
1
U42
QS3861
TSSOP_24
DI
IDT
IDTQS3861PAG8
TSSOP-24
41
1
J26
PHONEJACK STEREO SM
DI
CUI
SJ1-3513-SMT
3.5mm_AudioJack
42
1
R11
470
SM/R_0603
DI
Panasonic ECG
ERJ-3EKF4700V
RES470OHM1/10W1%
43
2
R12, R13
27
SM/R_0603
DI
Panasonic ECG
ERJ-3GEYJ270V
Resistor 27 SMD 0603
44
1
R14
100k
SM/R_0603
DI
Panasonic ECG
ERJ-3GEYJ104V
Resistor 100k SMD 0603
45
1
R53
1M
SM/R_0603
DI
Panasonic ECG
ERJ-3GEYJ105V
RES 1.0M1/10W5%
46
1
SW3
XO_Sleep_SW
SMT_SW
DI
Panasonic ECG
EVQ-Q2K03W
SPST_Switch
47
1
U7
NCP1117
SOT-223
DI
ON Semiconductor NCP1117ST33T3G
Voltage Regulators Linear
48
1
U16
LMV331
SOT-23-5
DI
TI
LMV331IDBVR
Comparators
49
1
X3
6 MHz
SMD
DI
Citizen
America Corp.
HCM49 6.000MABJ-UT
CRYSTAL 6.000 MHz
SMT 18PF
50
1
R37
1_5k
SM/R_0603
DI
Panasonic ECG
ERJ-3GEYJ152V
Resistor 1.5k SMD 0603
51
1
U4
FT2232
TQFP_48
DI
Future
FT2232D R
USB UART/FIFO
52
1
U44
POT
8-µSOP
DI
Dallas
Semiconductor
DS3904U-020+
Variable POT
53
2
C79, C80
1uF
SM/C_0805
DI
Panasonic ECG
ECJ-2YB1A105K
1uF SMC
54
2
J4, J7
CON40A
2x20x100mil
DNI
Samtec Inc.
TSW-120-07-G-D
Header
55
2
Q5, Q6
2N7002E
SM/SOT23
DI
ON Semiconductor 2N7002ET1G
MOSFET N-CH SGL
60V 310A SOT-23
56
1
Q7
ZDT758
SM-8 DUAL PNP
DI
zetex
ZDT758
SM-8 DUAL PNP
57
1
RN3
RN2_4_470
SMD_0603
DI
Yageo
TC164-JR-07470RL
RES ARRAY 470 OHM
58
2
R186, R187
200
SM/R_0603
DI
Panasonic ECG
ERJ-3GEYJ201V
RES 200 OHM 1/10W
5% 0603 SMD
59
2
R200, R203
220
SM/R_0603
DI
Panasonic ECG
ERJ-3EKF2200V
RES 220 OHM 1/10W
1% 0603 SMD
60
1
SW4
SW DIP-2
SP-75
DI
CTS
195-2MST
SWITCH SIDE
ACTUATED 2 SEC
61
1
U38
Oscillator_62_5
SMD
DI
Fox Electronics
FXO-HC735-62.5 MHz
OSC 62.5 MHZ
3.3V SMD
62
1
U17
ispPAC-POWR1014A
48 TQFP
DI
Lattice
POW1014A
Power Manager
256 ftBGA
DI
Lattice
MachXO_2280
MachXO
63
1
U60
LCMXO640/1200/
2280-FT256/FTN256
64
1
U67
STG3690QTR
QFN
DI
STMicroelectronics STG3690QTR
Dual Switch
65
1
U68
AD8604ARZ
14 SOIC
DI
Analog Devices
Inc.
AD8604ARZ
Quad OP AMP SOIC
66
1
U69
M25PE20-VMN6TP
8 SOIC
DI
Numonyx/
ST Micro
M25PE20-VMN6TP
IC SPI Flash
2MBit 8-SOIC
67
1
R5
1
SM/R_0805
DI
Vishay Dale
CRCW08051R00FKEA
Resistor 1 1%
SM/R_0805
DI
Rohm
Semiconductor
MCR10EZHFL2R00
Resistor 2 1%
1/4W
68
2
R3, R7
2
69
8
MH5, MH6, MH7, MH8, MH9, M_HOLE1
MH10, MH11, MH12
IW_MNT0
DI
3M
SJ-5003 (BLACK)
BUMPON HEMISPHERE
.44X.20 BLACK
70
4
R30, R31, R46, R49
3_92k
SM/R_0603
DI
Susumu Co. Ltd.
RG1608P-3921-B-T5
RES 3.92K OHM 1/10W
.1% 0603 SMD
71
2
R29, R42
2k
SM/R_0603
DI
Susumu Co. Ltd.
RG1608P-202-B-T5
RES 2.0K OHM 1/10W
.1% 0603 SMD
55
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Table 19. Bill of Materials (Continued)
Item Quantity
72
205
Reference
Part
Footprint
DB1, CB1, BB1, DB2, CB2,
BB2, DB3, CB3, BB3, DB4,
CB4, BB4, DB5, CB5, BB5,
GND_6, DB6, CB6, BB6,
IO7, GND_7, DB7, CB7,
BB7, IO8, DB8, CB8, BB8,
IO9, DB9, CB9, BB9,
GND_10, DB10, CB10,
BB10, IO11, GND_11, DB11,
CB11, BB11, IO12, DB12,
CB12, BB12, IO13, DB13,
CB13, BB13, IO14, DB14,
CB14, BB14, AB14, IO15,
DB15, CB15, BB15, DB16,
CB16, BB16, AB16, IO17,
DB17, CB17, BB17, IO18,
DB18, CB18, BB18, AB18,
IO19, DB19, CB19, BB19,
IO20, DB20, CB20, BB20,
AB20, IO21, IO22, AB22,
IO23, IO24, AB24, IO25,
IO26, AB26, IO28, AB28,
GND_29, IO30, GND_30,
AB30, IO31, GND_32, AB32,
IO33, GND_33, IO34, AB34,
IO35, IO36, AB36, AB38,
AB40, AB42, AB44, AB46,
AB48, IO50, GND_50, AB50, T POINT R
GND_51, IO52, AB52, IO53,
GND_53, IO54, GND_54,
IO55, GND_55, IO56,
GND_56, IO57, GND_57,
IO59, GND_59, IO60,
GND_60, IO61, GND_61,
AB61, IO62, GND_62, AB62,
IO63, AB63, IO64, AB64,
IO65, GND_65, AB65, IO66,
GND_66, AB66, IO67,
GND_67, AB67, IO68,
GND_68, AB68, IO69,
GND_69, AB69, IO70,
GND_70, AB70, IO71,
GND_71, AB71, IO72,
GND_72, AB72, IO73, AB73,
IO74, AB74, IO75, AB75,
IO76, AB76, IO77, AB77,
IO78, AB78, IO79, AB79,
IO80, AB80, AB81, IO82,
AB82, IO83, AB83, IO84,
AB84, IO85, AB85, AB86,
AB87, AB88, AB89, AB90,
AB91, AB92, AB93, AB94,
AB95, AB96, AB97, AB98,
AB99, AB100
TP
Populate
73
1
G1
Lattice Logo
LOGO300_1000
74
1
G2
WEEE
WEEE_SM
75
1
G3
E-Friendly
EFRIENDLY_400_SM
56
Vendor
Part Number
Description
Lattice Semiconductor
MachXO Control Development Kit User’s Guide
Appendix C. Control SoC Demo I/O Plan
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
"led_0" SITE "T10" ;
"led_1" SITE "T11" ;
"led_2" SITE "N10" ;
"led_3" SITE "N11" ;
"led_4" SITE "R11" ;
"led_5" SITE "R12" ;
"led_6" SITE "P11" ;
"led_7" SITE "P12" ;
"rst_n" SITE "G2" ;
"scl" SITE "K4" ;
"sda" SITE "K5" ;
"spi_csn" SITE "F13" ;
"spi_miso" SITE "F14" ;
"spi_mosi" SITE "E14" ;
"spi_sclk" SITE "F12" ;
"sram_addr_0" SITE "J13" ;
"sram_addr_1" SITE "K13" ;
"sram_addr_2" SITE "K16" ;
"sram_addr_3" SITE "L16" ;
"sram_addr_4" SITE "L15" ;
"sram_addr_5" SITE "M15" ;
"sram_addr_6" SITE "M16" ;
"sram_addr_7" SITE "N16" ;
"sram_addr_8" SITE "L14" ;
"sram_addr_9" SITE "M14" ;
"sram_addr_10" SITE "L12" ;
"sram_addr_11" SITE "L13" ;
"sram_addr_12" SITE "N15" ;
"sram_addr_13" SITE "N14" ;
"sram_addr_14" SITE "M12" ;
"sram_addr_15" SITE "M13" ;
"sram_addr_16" SITE "N13" ;
"sram_data_0" SITE "H16" ;
"sram_data_1" SITE "J16" ;
"sram_data_2" SITE "J12" ;
"sram_data_3" SITE "K12" ;
"sram_data_4" SITE "J15" ;
"sram_data_5" SITE "K15" ;
"sram_data_6" SITE "J14" ;
"sram_data_7" SITE "K14" ;
"sram_cen" SITE "D14" ;
"sram_oen" SITE "D13" ;
"sram_wen" SITE "E13" ;
"sw_7" SITE "R16" ;
"sw_6" SITE "R15" ;
"sw_5" SITE "T15" ;
"sw_4" SITE "T14" ;
"sw_3" SITE "R14" ;
57
Lattice Semiconductor
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
LOCATE
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
COMP
MachXO Control Development Kit User’s Guide
"sw_2" SITE "R13" ;
"sw_1" SITE "T12" ;
"sw_0" SITE "T13" ;
"uart_rx" SITE "F5" ;
"uart_tx" SITE "F6" ;
"clk" SITE "D7" ;
"fan_en" SITE "G14" ;
"fan_sense" SITE "H14" ;
"lcd_e" SITE "R4" ;
"lcd_rs" SITE "T3" ;
"lcd_rw" SITE "P2" ;
"lcd_db_0" SITE "P3" ;
"lcd_db_1" SITE "R5" ;
"lcd_db_2" SITE "N5" ;
"lcd_db_3" SITE "P5" ;
"lcd_db_4" SITE "N6" ;
"lcd_db_5" SITE "P6" ;
"lcd_db_6" SITE "T2" ;
"lcd_db_7" SITE "T5" ;
"scl_pm" SITE "N4" ;
"sda_pm" SITE "M4" ;
58