PIC16(L)F1768/1769 Silicon Errata and Data Sheet Clarification

PIC16(L)F1768/1769
PIC16(L)F1768/1769 Family
Silicon Errata and Data Sheet Clarification
The PIC16(L)F1768/1769 family devices that you have
received conform functionally to the current Device
Data Sheet (DS40001775B), except for the anomalies
described in this document.
For example, to identify the silicon revision level
using MPLAB IDE in conjunction with a hardware
debugger:
1.
The silicon issues discussed in the following pages are
for silicon revisions with the Device and Revision IDs
listed in Table 1. The silicon issues are summarized in
Table 2.
2.
3.
The errata described in this document will be addressed
in future revisions of the PIC16(L)F1768/1769 silicon.
4.
Note:
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated in the last column of
Table 2 apply to the current silicon
revision (A2).
Data Sheet clarifications and corrections start on page
4, following the discussion of silicon issues.
The silicon revision level can be identified using the
current version of MPLAB® IDE and Microchip’s
programmers, debuggers, and emulation tools, which
are available at the Microchip corporate web site
(www.microchip.com).
TABLE 1:
5.
Using the appropriate interface, connect the
device to the hardware debugger.
Open an MPLAB IDE project.
Configure the MPLAB IDE project for the
appropriate device and hardware debugger.
Based on the version of MPLAB IDE you are
using, do one of the following:
a) For MPLAB IDE 8, select Programmer >
Reconnect.
b) For MPLAB X IDE, select Window >
Dashboard and click the Refresh Debug
Tool Status icon (
).
Depending on the development tool used, the
part number and Device Revision ID value
appear in the Output window.
Note:
If you are unable to extract the silicon
revision level, please contact your local
Microchip sales office for assistance.
The Revision ID values for the various PIC16(L)F1768/
1769 silicon revisions are shown in Table 1.
SILICON DEVREV VALUES
Part Number
Device ID(1)
Revision ID for Silicon Revision(2)
A2
PIC16F1768
3084h
2002h
PIC16LF1768
3086h
2002h
PIC16F1769
3085h
2002h
PIC16LF1769
3087h
2002h
Note 1:
2:
The Device and Revision IDs are located at the respective addresses 8006h and 8005h of configuration
memory space.
Refer to the “PIC16(L)F176X Memory Programming Specification” (DS40001754) for detailed information
on Device and Revision IDs for your specific device.
 2015-2016 Microchip Technology Inc.
DS80000664B-page 1
PIC16(L)F1768/1769
TABLE 2:
SILICON ISSUE SUMMARY
Module
Feature
Item
Number
Issue Summary
Affected
Revisions(1)
A2
16-Bit Pulse-Width
Modulation (PWM)
Continuous
Slave mode
1.1
Anomalous behavior.
X
Programmable Ramp
Generator (PRG)
Ramp Capacitor
2.1
Shorting switch fails to stay closed.
X
ECCP
Compare mode
3.1
Compare Toggle mode yields unexpected
results.
X
Note 1:
Only those issues indicated in the last column apply to the current silicon revision.
DS80000664B-page 2
 2015-2016 Microchip Technology Inc.
PIC16(L)F1768/1769
Silicon Errata Issues
Note:
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A2).
3. Module: ECCP
3.1 Compare Mode
The
ECCP
Compare
Toggle
modes
(CCPxCON<3:0> bits = 0010 or 0001) work
properly as long as the Timer1 prescaler value is
configured to 1:1. When the Timer1 prescaler
value is configured to any other value, the ECCP
Compare output yields unexpected results.
1. Module: 16-Bit Pulse-Width Modulation
(PWM)
Work around
1.1 Continuous Slave Mode Anomaly
Only use the Compare Toggle mode when the
Timer1 prescaler value is set to 1:1.
The 16-bit PWM in continuous Slave mode
(PWMxOFCON<6:5> = 11) may get stuck in
anomalous behavior. The behavior is that the
slave PWM output will toggle when the master
PWM matches the master PWM offset value,
then toggle again on the next master offset
match event. The slave PWM output will then
remain steady for the number of master periods
equal to the slave PWM period value after which
the sequence repeats. The slave PWM may
occasionally start to operate as described by
either writing the slave PWMxOFCON register
or enabling the slave PWM from an Idle state.
Method 1:
Method 2:
Use CCP Compare mode with pulse output
(CCPxCON<3:0> bits = 1011) to clock a CLC
configured as a J-K flip-flop in Toggle mode.
Affected Silicon Revisions
A2
X
Work around
None.
Affected Silicon Revisions
A2
X
2. Module: Programmable Ramp Generator
(PRG)
2.1 Ramp Capacitor Shorting Switch Fails to Stay
Closed
When the PRG GO bit is zero or when the rising
or falling ramp is in the Reset state for an
extended period of time, then the ramp capacitor
shorting switch will improperly open, causing the
PRG output to drift from the reference voltage
input level.
Work around
None.
Affected Silicon Revisions
A2
X
 2015-2016 Microchip Technology Inc.
DS80000664B-page 3
PIC16(L)F1768/1769
Data Sheet Clarifications
The following typographic corrections and clarifications
are to be noted for the latest version of the device data
sheet (DS40001775B):
Note:
Corrections are shown in bold. Where
possible, the original bold text formatting
has been removed for clarity.
None.
DS80000664B-page 4
 2015-2016 Microchip Technology Inc.
PIC16(L)F1768/1769
APPENDIX A:
DOCUMENT
REVISION HISTORY
Rev A Document (10/2015)
Initial release of this document; issued for revision A2.
Includes silicon issues 1.1 (EUSART), 2.1 to 2.3 (MSSP)
and 3.1 (16-Bit PWM).
Rev B Document (01/2016)
Removed Modules 1 and 2; Added new Module 2,
Programmable Ramp Generator and Module 3, ECCP;
Other minor corrections.
 2015-2016 Microchip Technology Inc.
DS80000664B-page 5
PIC16(L)F1768/1769
NOTES:
DS80000664B-page 6
 2015-2016 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer,
LANCheck, MediaLB, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC,
SST, SST Logo, SuperFlash and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
The Embedded Control Solutions Company and mTouch are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo,
CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit
Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet,
KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, RightTouch logo, REAL ICE, SQI, Serial Quad I/O,
Total Endurance, TSHARC, USBCheck, VariSense,
ViewSpan, WiperLock, Wireless DNA, and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2015-2016, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
ISBN: 978-1-5224-0217-6
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are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
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DS80000664B-page 7
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