Si21662-B22 Data Short

Si21662-B22
Dual DVB-S/S2 Digital TV Demodulator
Description
The Si21662-B integrates two separate high performance
DVB-S, DVB-S2 and DSS digital demodulators into a single
compact package for satellite TV standards. Leveraging
Silicon Labs' proven digital demodulation architecture, each
embedded demodulator achieves excellent reception
performance for each standard while significantly minimizing
front-end design complexity and cost. Connecting the
Si21662-B to a dual satellite tuner, results in a
high-performance and cost optimized TV front-end solution.
The satellite demodulation functionality allows demodulating
widely deployed DVB-S, DIRECTV™ (DSS) legacy
standards, and DVB-S2 (AMC compliant) satellite broadcasts.
A zero-IF interface allows for a seamless connection to
market proven satellite silicon tuners.
Constant
Coding
Modulation
(CCM),
QPSK/8PSK
demodulation schemes and broadcast profile are the main
specifications of the DVB-S2 demodulator. Silicon Labs'
innovative LDPC and BCH decoding architecture delivers
best-in-class reception while exhibiting low power dissipation.
The Si21662-B offers an on-chip blind scanning algorithm for
DVB-S/S2 standards. It also integrates two DiSEqC™ 2.0
LNB interfaces for satellite dish control and, for each satellite
demodulator, an equalizer to compensate for echoes in long
cable feeds from the LNB to the satellite tuner RF input.
The Si21662-B embeds two independent programmable
transport stream interfaces which provide a flexible range of
output modes and are fully compatible with all MPEG
decoders or conditional access modules to support any
customer application.
Features
- DVB-S2 (ETSI EN 302 307 and TR102-376)
- QPSK/8PSK demodulator and FEC decoder
- Broadcast profile CCM, 64800 bits frame, single TS
- 1 to 45 MSymbol/s
- DIRECTVTM AMC compatible
- DVB-S (ETSI EN 300 421) and DSS supported
- QPSK demodulator and enhanced FEC decoder
- 1 to 45 MSymbol/s
- Dual DiSEqC™ 2.x interface, Unicable support
- I2C serial bus interfaces (master and host)
- Dual independent differential ZIF I/Q inputs
- GPIOs and multi-purpose ports (two per demodulator)
- Firmware control for upgradeability
- Separate flexible TS interfaces with serial or parallel 
outputs
Fast lock times for all standards
Only two power supplies: 1.2 and 3.3 V
8x8 mm, QFN-68 pin package, Pb-free/RoHS compliant
Pin-to-pin compatible with all dual demodulator family:
Si216x2
- API compatible with all single and dual demodulator 
families
-
Applications
-
Multi-receiver iDTV: on-board or in a NIM
Advanced multimedia PVR STBs
PC-TV accessories
PVR, DVD, and Blu-Ray disc recorders
1.2, 3.3V
MP_A_A
MP_C_A
RESETB
Si21662B
GPIO1/TS_ERR_A
Dual Satellite
Tuner
DiSEqC_OUT_A
DiSEqC_CMD
ADC_A
ADC_A
DiSEqC_A
DEMODULATOR_A CORE
I2C Block_A
DiSEqC_IN_A_B
SDA_MAST
SCL_MAST
XO
XTAL_I/CLK_IN
CLK_IN/OUT
DiSEqC_OUT_B
S_ADC_IP_B
S_ADC_IN_B
S_ADC_QP_B
S_ADC_QN_B
8
ADDR_A
SDA_HOST
SCL_HOST
DiSEqC_B
I2C Block_B
ADDR_B
GPIO0/TS_ERR_B
ADC_B
ADC_B
DEMODULATOR_B CORE
MP_B_B
MP_D_B
Dual Digital Demodulators
TS_VAL_A
TS_SYNC_A
TS_CLK_A
TS_DATA_A
HDTV MPEG S.o.C.
S_ADC_IP_A
S_ADC_IN_A
S_ADC_QP_A
S_ADC_QN_A
Copyright © 2015 by Silicon Laboratories
TS_VAL_B
TS_SYNC_B
TS_CLK_B
TS_DATA_B
8
10.29.2015
Si21662-B22
Dual DVB-S/S2 Digital TV Demodulator
Selected Electrical Specifications
(TA = –10 to 70 °C).
Parameter
General
Input clock reference
Supported XTAL frequency
Total power consumption for
each demodulator
Test Condition
Min
Typ
Max
Unit
DVB-S1
4
16
—
—
—
240
30
30
—
MHz
MHz
mW
—
465
—
mW
—
42
—
°C/W
1.14
3.00
3.00
1.20
3.30
3.30
1.30
3.60
3.60
V
V
V
DVB-S22
4 layer PCB
Thermal resistance (JA)
Power Supplies
VDD_VCORE
VDD_VANA
VDD_VIO
Notes:
1. Test conditions: 30 MBaud, CR=7/8, parallel TS (at QEF: BER = 2. 10–4).
2. Test conditions: 32 MBaud, 3/5 Code Rate, 8PSK, pilots On, parallel TS, C/N at picture failure.
TS_DATA[5]_B
TS_DATA[6]_A
TS_DATA[6]_B
TS_DATA[7]_A
TS_DATA[7]_B
GPIO_1/TS_ERR_A
VDD_CORE
VDD_CORE
MP_C_A
MP_D_B
RESETB
XO
XTAL_I/CLK_IN
ADDR_A
ADDR_B
VDD_ANA
S_ADC_IP_A
Pin Assignments
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35
S_ADC_IN_A 52
34 TS_DATA[5]_A
S_ADC_QP_A 53
33 VDD_VIO
S_ADC_QN_A 54
32 GND
S_ADC_IP_B 55
31 VDD_CORE
S_ADC_IN_B 56
30 VDD_CORE
S_ADC_QP_B 57
S_ADC_QN_B 58
NC 59
NC 60
Si21662B
29 TS_DATA[4]_B
(GND_PAD)
27 TS_DATA[3]_B
QFN-68
8x8mm
25 TS_DATA[2]_B
NC 61
NC 62
CLK_IN_OUT 63
SDA_MAST 64
28 TS_DATA[4]_A
26 TS_DATA[3]_A
24 TS_DATA[2]_A
23 TS_DATA[1]_B
22 TS_DATA[1]_A
SCL_MAST 65
21 TS_DATA[0]_B/TS_SER_B
20 TS_DATA[0]_A/TS_SER_A
GND 66
VDD_CORE 67
19 TS_CLK_B
18 TS_CLK_A
TS_SYNC_B
TS_SYNC_A
TS_VAL_B
TS_VAL_A
SDA_HOST
9 10 11 12 13 14 15 16 17
SCL_HOST
8
VDD_VIO
DISEQC_CMD_A
7
GND
GPIO_0/TS_ERR_B
6
VDD_CORE
MP_A_A
5
VDD_CORE
4
DISEQC_OUT_B
3
DISEQC_OUT_A
2
DISEQC_IN_A_B
1
MP_B_B
VDD_CORE 68
Selection Guide
Part #
Description
Si21662-B22-GM/R
Dual Digital TV Demodulator for DVB-S/S2, 8x8 mm QFN-68
Dual Digital Demodulators
Copyright © 2015 by Silicon Laboratories
10.29.2015
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