Si21662-D60 Data Short

Si21662-D60
Dual DVB-S/S2/S2X Digital TV Demodulator
Description
Features
The Si21662D integrates two separate high-performance digital
demodulators for the DVB-S2/S and DVB-S2X standards into a
single compact package. Leveraging Silicon Labs' proven digital
demodulation architecture, the Si21662D achieves excellent
reception performance while significantly minimizing front-end
design complexity, cost, and power dissipation. Connecting the
Si21662D to a dual satellite tuner, results in a high-performance
and cost optimized TV or STB front-end solution.
The satellite reception allows demodulating widespread DVB-S,
DIRECTV™ (DSS), DVB-S2, DIRECTV™ (AMC) legacy
standards, and new Part II of DVB-S2 (S2X) satellite broadcast
standard. A zero-IF interface (differential) allows for a seamless
connection to market proven satellite silicon tuners. It also
integrates two DiSEqC™ 2.0 LNB interfaces for satellite dish
control and, for each satellite demodulator, an equalizer to
compensate for echoes in long cable feeds from the LNB to the
satellite tuner RF input.
Variable Coding and Modulation (VCM), QPSK/8PSK, 8/16/
32APSK demodulation schemes and broadcast services profile
are the main specifications of the DVB-S2/S2X demodulator.
Silicon Labs' innovative LDPC and BCH decoding architecture
delivers best-in-class reception while exhibiting low power
dissipation.
The Si21662D offers an on-chip blind scanning algorithm, as well
as blind lock function.
The Si21662D embeds two independent programmable transport
stream interfaces which provide a flexible range of output modes,
including a cross-bar functionality, and are fully compatible with all
MPEG decoders or conditional access modules to support any
customer application.
- Pin-to-pin compatible with all dual demodulator family: Si216x2
and Si218x2
- API compatible with all single and all dual demodulators
- DVB-S2 (ETSI EN 302 307-1 V1.4.1)
- QPSK/8PSK demodulator
- DVB-S2X (ETSI EN302 307-2 V1.1.1)
- Broadcast profile supported
- QPSK/8PSK, 8/16/32APSK demodulator
- Roll-off factors from 0.05 to 0.35
- VCM supported
- ISSY and NPD supported
- MIS supported
- Output modes: TS, GPCS, and GSE-HEM supported
- Channel bonding for TS transmission supported
- DVB-S (ETSI EN 300 421) and DSS supported
- QPSK demodulator and enhanced FEC decoder
- Dual DiSEqC™ 2.x interface, Unicable support
- 1 to 45 MSps for all satellite standards 
(<40 MSps in 32APSK)
- I2C serial bus interfaces (master and host)
- Upgradeable with firmware patch download via fast SPI or I2C
(broadcast mode supported)
- Dual independent differential ZIF I/Q inputs
- GPIOs and multi-purpose ports (two per demodulator)
- Separate flexible TS interfaces with serial or parallel 
outputs and cross-bar feature
- Fast lock times
- Only two power supplies: 1.2 and 3.3 V
- 8x8 mm, QFN-68 pin package, Pb-free/RoHS compliant
Applications
-
1.2, 3.3V
MP_A_A
MP_C_A
RESETB
Si21662D
ADC_A
DEMODULATOR_A CORE
ADC_A
DiSEqC_OUT_A
DiSEqC_CMD
DiSEqC_A
TS_A
GPIO1/
TS_ERR_A
I2C Block_A
DiSEqC_IN_A_B
SDA_MAST
SCL_MAST
XO
XTAL_I/CLK_IN
CLK_IN/OUT
DiSEqC_OUT_B
S_ADC_IP_B
S_ADC_IN_B
S_ADC_QP_B
S_ADC_QN_B
TS1_SYNC
TS1_DATA
TS1_VAL 8
TS1_CLK
ADDR_A
SDA_HOST
SCL_HOST
ADDR_B
DiSEqC_B
GPIO0/
TS_ERR_B
I2C Block_B
TS_B
ADC_B
ADC_B
HDTV MPEG S.o.C.
S_ADC_IP_A
S_ADC_IN_A
S_ADC_QP_A
S_ADC_QN_A
Dual Satellite
Tuner
Multi-receiver iDTV: on-board or in a NIM
Advanced multimedia PVR STBs
PC-TV accessories
PVR, DVD, and Blu-Ray disc recorders
DEMODULATOR_B CORE
TS2_SYNC
TS2_DATA
TS2_VAL 8
TS2_CLK
MP_B_B
MP_D_B
Dual Digital Demodulators
Copyright © 2015 by Silicon Laboratories
10.14.15
Si21662-D60
Dual DVB-S/S2/S2X Digital TV Demodulator
Selected Electrical Specifications
(TA = –10 to 70 °C).
Parameter
General
Input clock reference
Supported XTAL frequency
Total power consumption for
each demodulator
Test Condition
Min
Typ
Max
Unit
DVB-S21
4
16
—
—
—
421
30
30
—
MHz
MHz
mW
—
230
—
mW
—
42
—
°C/W
1.14
3.00
3.00
1.20
3.30
3.30
1.30
3.60
3.60
V
V
V
DVB-S2
4 layer PCB
Thermal resistance (JA)
Power Supplies
VDD_VCORE
VDD_VANA
VDD_VIO
Notes:
1. Test conditions: 32 Mbaud, CR = 3/5, 8PSK, pilots On, parallel TS, C/N at picture failure.
2. Test conditions: 30 Mbaud, CR = 7/8, parallel TS, at QEF: BER = 2 x 10–4.
TS2_DATA[5]
TS1_DATA[6]
TS2_DATA[6]
TS1_DATA[7]
TS2_DATA[7]
GPIO_1/TS_ERR_A
VDD_CORE
VDD_CORE
MP_C_A
MP_D_B
RESETB
XO
XTAL_I/CLK_IN
ADDR_A
ADDR_B
VDD_ANA
S_ADC_IP_A
Pin Assignments
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35
S_ADC_IN_A 52
34 TS1_DATA[5]
S_ADC_QP_A 53
33 VDD_VIO
S_ADC_QN_A 54
32 GND
S_ADC_IP_B 55
31 VDD_CORE
S_ADC_IN_B 56
30 VDD_CORE
S_ADC_QP_B 57
S_ADC_QN_B 58
NC 59
NC 60
Si21662D
29 TS2_DATA[4]
(GND_PAD)
27 TS2_DATA[3]
QFN-68
8x8mm
25 TS2_DATA[2]
NC 61
NC 62
CLK_IN_OUT 63
28 TS1_DATA[4]
26 TS1_DATA[3]
24 TS1_DATA[2]
23 TS2_DATA[1]
SDA_MAST 64
22 TS1_DATA[1]
SCL_MAST 65
21 TS2_DATA[0]/TS2_SER
GND 66
20 TS1_DATA[0]/TS1_SER
VDD_CORE 67
19 TS2_CLK
18 TS1_CLK
GPIO_0/TS_ERR_B
DISEQC_CMD_A
DISEQC_IN_A_B
DISEQC_OUT_A
DISEQC_OUT_B
VDD_CORE
TS2_SYNC
MP_B_B
9 10 11 12 13 14 15 16 17
TS1_SYNC
8
TS2_VAL
7
TS1_VAL
6
SDA_HOST
5
SCL_HOST
4
VDD_VIO
3
GND
2
VDD_CORE
1
MP_A_A
VDD_CORE 68
Selection Guide
Part #
Description
Si21662-D60-GM/R
Dual Digital TV Demodulator for DVB-S/S2/S2X, 8x8 mm QFN-68
Dual Digital Demodulators
Copyright © 2015 by Silicon Laboratories
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders
10.14.15