Si21682-D60 Dual DVB-T2/T/C Digital TV Demodulator Description The Si21682D integrates two separate high-performance digital demodulators for the DVB-T2/T and DVB-C standards into a single compact package. Leveraging Silicon Labs' proven digital demodulation architecture, the Si21682D achieves excellent reception performance for each media while significantly minimizing front-end design complexity, cost, and power dissipation. Connecting the Si21682D to a dual terrestrial/cable TV tuner results in a high-performance and cost optimized TV front-end solution. Silicon Labs’ internally-developed DVB-T2 (including T2-Lite) demodulators support all modes specified by the DVB-T2 standard (V1.4.1). Main features of the DVB-T2 mode are, SISO and MISO support, FEF management, fully autonomous signal acquisition including automatic L1 signaling parsing support for all pilot patterns, and DVB-T2/T auto-detection. The DVB-T and DVB-C, including ITU-T J.83 annex B, demodulators are enhanced versions of proven and broadly used Si2164/67/68/69 Silicon Labs devices. The Si21682D offers an on-chip blind scanning algorithm for the DVB-C standard, as well as blind lock function. The Si21682D embeds two independent programmable transport stream interfaces which provide a flexible range of output modes, including a cross-bar functionality, and are fully compatible with all MPEG decoders or conditional access modules to support any customer application. Features - Pin-to-pin compatible with all dual demodulator family: Si216x2 and Si218x2 - API compatible with all single and all dual demodulators - DVB-T2 and T2-Lite (ETSI EN 302 755-V1.4.1) - Bandwidth: 1.7, 5, 6, 7 or 8 MHz - NorDig Unified 2.5 and D-Book 8 compliant - DVB-T (ETSI EN 300 744) - NorDig Unified 2.5, D-Book 8 compliant - DVB-C (ETSI EN 300 429) / ITU-T J.83 Annex A/B/C - 1 to 7.2 MSymbol/s, C-Book compliant - I2C serial bus interfaces (master and host) - Upgradeable with firmware patch download via fast SPI or I2C (broadcast mode supported) - Dual independent differential IF input for T/C tuners - GPIOs and multi-purpose ports (two per demodulator) - Separate flexible TS interfaces with serial or parallel outputs and cross-bar feature - Fast lock times for all standards - Only two power supplies: 1.2 and 3.3 V - 8x8 mm, QFN-68 pin package, Pb-free/RoHS compliant Applications - 1.2, 3.3V MP_A_A MP_C_A ADC_A DEMODULATOR_A CORE TS_A TS1_SYNC TS1_DATA TS1_VAL 8 TS1_CLK GPIO1/ TS_ERR_A I2C Block_A ADDR_A SDA_MAST SCL_MAST XO XTAL_I/CLK_IN CLK_IN/OUT SDA_HOST SCL_HOST ADDR_B GPIO0/ TS_ERR_B I2C Block_B TS_B TC_ADC_P_B TV Tuner TC_ADC_N_B ADC_B HDTV MPEG S.o.C. TC_ADC_N_A RESETB Si21682D TC_ADC_P_A TV Tuner Multi-receiver iDTV: on-board or in a NIM Advanced multimedia PVR STBs PC-TV accessories PVR, DVD, and Blu-Ray disc recorders DEMODULATOR_B CORE TS2_SYNC TS2_DATA TS2_VAL 8 TS2_CLK MP_B_B MP_D_B Dual Digital Demodulators Copyright © 2015 by Silicon Laboratories 11.20.2015 Si21682-D60 Dual DVB-T2/T/C Digital TV Demodulator Selected Electrical Specifications (TA = –10 to 70 °C). Parameter Test Condition General Input clock reference Supported XTAL frequency Total power consumption for each demodulator DVB-T21 DVB-T2 Min Typ Max Unit 4 16 — — — — 356 182 30 30 — — MHz MHz mW mW — 142 — mW — 42 — °C/W 1.14 3.00 3.00 1.20 3.30 3.30 1.30 3.60 3.60 V V V DVB-C3 4 layer PCB Thermal resistance (JA) Power Supplies VDD_VCORE VDD_VANA VDD_VIO Notes: 1. Test conditions: 8 MHz, 256-QAM, 32K FFT, CR = 3/5, GI = 1/128, PP7, parallel TS, C/N at picture failure. 2. Test conditions: 8 MHz, 8K FFT, 64-QAM, parallel TS. 3. Test conditions: 6.9 Mbaud, 256-QAM, parallel TS. TS2_DATA[5] TS1_DATA[6] TS2_DATA[6] TS1_DATA[7] TS2_DATA[7] GPIO_1/TS_ERR_A VDD_CORE VDD_CORE MP_C_A MP_D_B RESETB XO XTAL_I/CLK_IN ADDR_A ADDR_B VDD_ANA NC Pin Assignments 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 NC 52 34 TS1_DATA[5] NC 53 33 VDD_VIO NC 54 32 GND NC 55 31 VDD_CORE NC 56 30 VDD_CORE NC 57 NC 58 TC_ADC_P_A 59 TC_ADC_N_A 60 Si21682D 29 TS2_DATA[4] (GND_PAD) 27 TS2_DATA[3] QFN-68 8x8mm 25 TS2_DATA[2] TC_ADC_P_B 61 TC_ADC_N_B 62 CLK_IN_OUT 63 28 TS1_DATA[4] 26 TS1_DATA[3] 24 TS1_DATA[2] 23 TS2_DATA[1] SDA_MAST 64 22 TS1_DATA[1] SCL_MAST 65 21 TS2_DATA[0]/TS2_SER 20 TS1_DATA[0]/TS1_SER GND 66 VDD_CORE 67 19 TS2_CLK 18 TS1_CLK GPIO_0/TS_ERR_B NC NC NC NC VDD_CORE TS2_SYNC MP_B_B 9 10 11 12 13 14 15 16 17 TS1_SYNC 8 TS2_VAL 7 TS1_VAL 6 SDA_HOST 5 SCL_HOST 4 VDD_VIO 3 GND 2 VDD_CORE 1 MP_A_A VDD_CORE 68 Selection Guide Part # Description Si21682-D60-GM/R Dual Digital TV Demodulator for DVB-T2/T/C, 8x8 mm QFN-68 Dual Digital Demodulators Copyright © 2015 by Silicon Laboratories 11.20.2015 Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders