Si2181-B60 ISDB-T and DVB-T/C/S/S2/S2X Demodulator Description Features - Pin-to-pin compatible with all Si216x/8x single demods family - API compatible with all single and dual demods families - ISDB-T (ABNT NBR 16.601 and 15.604) - 6, 7, and 8 MHz bandwidth - Partial reception supported - AC1 and AC2 decoding - DVB-S2 (ETSI EN 302 307-1 V1.4.1) - QPSK/8PSK demodulator - DVB-S2X (ETSI EN302 307-2 V1.1.1) - QPSK/8PSK, 8/16/32APSKdemodulator - Roll-off factors from 0.05 to 0.35 - DVB-T (ETSI EN 300 744) - OFDM demodulator and enhanced FEC decoder - NorDig Unified 2.5 and D-Book 8 compliant - DVB-C (ETSI EN 300 429) and ITU-T J.83 Annex A/B/C - QAM demodulator and FEC decoder - 1 to 7.2 MSymbol/s - DVB-S and DSS supported - QPSK demodulator and enhanced FEC decoder - 1 to 45 MSymbol/s for all satellite standards (<40 MSps in The Si2181 integrates digital demodulators for the Japanese and South American terrestrial ISDB-T standard and for all first and second generation DVB standards (DVB-T/C/S/S2 and S2X) in a single advanced CMOS die. Leveraging Silicon Labs' proven digital demodulation architecture, the Si2181 achieves excellent reception performance for each media while significantly minimizing front-end design complexity, cost, and power dissipation. Connecting the Si2181 to a hybrid TV tuner or digital only tuner, such as Silicon Labs' Si217x/5x/4x devices, results in a high-performance and cost optimized TV or STB front-end solution. Leveraging significant field experience in DVB terrestrial demodulation (DVB-T), Silicon Labs’ internally-developed ISDB-T demodulator can accept standard or low-IF inputs (differential) and complies with the Brazilian SBTVD-T terrestrial specifications (ABNT NBR 16.601 and 15.604). Main features include fast channel scan, very short lock times, state of the art CCI performance, partial reception, and auxiliary channels decoding. DVB-T, DVB-C, and DVB-S2/S demodulators are next-generation enhanced versions of proven and broadly-used Silicon Labs’ Si2169/68/67/66/64/62/60 devices. The satellite reception allows demodulating widespread DVB-S, DIRECTV™ (DSS), DVB-S2, DIRECTV™ (AMC) legacy standards, and new Part II of DVB-S2 (S2X) satellite broadcast standard. A zero-IF interface (differential) allows for a seamless connection to market proven satellite silicon tuners. Si2181 embeds DiSEqCTM 2.0 LNB interface for satellite dish control and an equalizer to compensate for echoes in long cable feeds from the antenna to the satellite tuner input. - The cable reception allows demodulating widely deployed DVB-C legacy standard (ITU-T J.83 Annex A/C) and the Americas' cable standard (ITU-T J.83 Annex B). ADC (I) ADC (Q) MP_C/_D (Sat.) MP_A/_B (T & C) Silicon Labs (Si217x/5x/4x) TV Tuner TC_ADC_P TC_ADC_N FRONT END AGCs DSP & SYNCHRO CTRL GPIO_0 RESETB GPIO TS_ERR/ GPIO_1 x(A)PSK QAM DEMOD EQUALIZER VITERBI RS OFDM DEMOD EQUALIZER LDPC BCH TS_SYNC TS_VAL TS_CLK TS_DATA 8 DVB-T/C/S2/S and ISDB-T FEC MODULE ADC Ext. Clk or Xtal OSC & PLL Si2181 HDTV MPEG S.o.C. Satellite ZIF Tuner 1.2, 3.3V MPEG TS 2.0 S_ADC_IP S_ADC_IN S_ADC_QP S_ADC_QN - iDTV: on-board design or in a NIM - Advanced multimedia STB, PVR, and Blu-ray recorders - PC-TV accessories INTERFACE DiSEqCTM QPSK/8PSK/xAPSK Applications DISEQC_OUT DISEQC_IN The Si2181 offers an on-chip blind scan algorithm for DVB-S/S2/ S2X and DVB-C standards, as well as a blind lock function. The Si2181 programmable transport stream output interface provides a flexible range of output modes and is fully compatible with all MPEG decoders or conditional access modules to support any customer application. 32APSK) LDPC and BCH FEC decoding for S2 standard I2C serial bus interfaces (master and host) Firmware control (embedded ROM/NVM) Upgradeable with patch download via I2C or fast SPI Flexible TS output interface (serial, parallel, and slave) DiSEqCTM 2.0 interface and UnicableTM support for satellite Fast lock times for all media Low power consumption Two power supplies: 1.2 and 3.3 V 7x7 mm, QFN-48 pin package, Pb-free/RoHS compliant CLK_IN_OUT TUN_SDA TUN_SCL Digital Demodulator I2C SWITCH Copyright © 2015 by Silicon Laboratories I2C I/F HOST_SDA HOST_SCL 11.5.15 Si2181-B60 ISDB-T and DVB-T/C/S/S2/S2X Demodulator Selected Electrical Specifications (TA = –10 to 75 °C) Parameter Test Condition Min Typ Max Unit General Input clock reference 4 — 30 MHz Supported XTAL frequency 16 — 30 MHz ISDB-T1 mW — 182 — mW DVB-C3 — 142 — mW DVB-S24 — 421 — mW DVB-S5 — 230 — mW 2 layer PCB — 35 — °C/W 4 layer PCB — 23 — °C/W Total power consumption Thermal resistance 168 DVB-T2 Power Supplies VDD_VCORE 1.14 1.20 1.30 V VDD_VANA 3.00 3.30 3.60 V VDD_VIO 3.00 3.30 3.60 V Notes: 1. Test conditions: 8K, 64-QAM, CR = 7/8, GI = 1/32, 13 segments 2. Test conditions: 8 MHz, 8K FFT, 64-QAM, parallel TS. 3. Test conditions: 6.9 Mbaud, 256-QAM, parallel TS. 4. Test conditions: 32 Mbaud, CR = 3/5, 8PSK, pilots On, parallel TS, C/N at picture failure. 5. Test conditions: 30 Mbaud, CR = 7/8, parallel TS, at QEF: BER = 2 x 10–4. 30 29 28 TS_DATA[7] 31 GND 32 TS_ERR/GPIO_1 XTAL_O 33 VDD_VCORE XTAL_I/CLK_IN 34 MP_C ADDR 35 RESETB GND 36 MP_D VDD_VANA Pin Assignments 27 26 25 S_ADC_IP 37 24 TS_DATA[6] S_ADC_IN 38 23 TS_DATA[5] S_ADC_QP 39 22 VDD_VIO Si2181 S_ADC_QN 40 TC_ADC_P 41 21 GND 20 VDD_VCORE (GND_PAD) TC_ADC_N 42 NC 43 19 TS_DATA[4] 18 TS_DATA[3] QFN-48 7x7mm CLK_IN_OUT 44 SDA_MAST 45 17 TS_DATA[2] 16 TS_DATA[1] SCL_MAST 46 15 TS_DATA[0]/TS_SER GND 47 14 TS_CLK VDD_VCORE 48 7 MP_A GPIO_0 DISEQC_CMD DISEQC_IN DISEQC_OUT VDD_VCORE 8 9 10 11 12 TS_VAL 6 SDA_HOST 5 SCL_HOST 4 GND 3 VDD_VIO 2 MP_B 13 TS_SYNC 1 Selection Guide Part Number Description Si2181-B60-GM ISDB-T and DVB-T/C/S/S2/S2X Demodulator, 7x7 mm QFN-48 Digital Demodulator Copyright © 2015 by Silicon Laboratories Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. 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