Si2166-D60 Data Short

Si2166-D60
DVB-S/S2/S2X Digital TV Demodulator
Description
Features
The Si2166D integrates digital demodulators for first and second
generation satellite DVB standards (DVB-S/S2 and S2X) in a
single advanced CMOS die. Leveraging Silicon Labs' proven
digital demodulation architecture, the Si2166D achieves excellent
satellite reception performance while significantly minimizing
front-end design complexity, cost, and power dissipation.
Connecting the Si2166D to a satellite silicon tuner results in a
high-performance and cost optimized TV or STB front-end
solution.
- Pin-to-pin compatible with all Si216x/8x single demods family
- API compatible with all single and dual demods families
- DVB-S2 (ETSI EN 302 307-1 V1.4.1)
- QPSK/8PSK demodulator
- DVB-S2X (ETSI EN302 307-2 V1.1.1)
- Support the normative broadcast services
- QPSK/8PSK, 8/16/32APSKdemodulator
- Roll-off factors from 0.05 to 0.35
- VCM supported
- ISSY and NPD supported
- MIS supported
- Output modes: TS, GPCS, and GSE-HEM supported
- DVB-S and DSS supported
- QPSK demodulator and enhanced FEC decoder
- 1 to 45 MSymbol/s for all satellite standards (<40 MSps in
The satellite reception allows demodulating widespread DVB-S,
DIRECTV™ (DSS), DVB-S2, DIRECTV™ (AMC) legacy
standards, and new Part II of DVB-S2 (S2X) satellite broadcast
standard. A zero-IF interface (differential) allows for a seamless
connection to market proven satellite silicon tuners. Si2166D
embeds DiSEqCTM 2.0 LNB interface for satellite dish control and
an equalizer to compensate for echoes in long cable feeds from
the antenna to the satellite tuner input.
The Si2166D offers an on-chip blind scan algorithm for DVB-S/S2/
S2X standards, as well as a blind lock function. The Si2166D
programmable transport stream output interface provides a flexible
range of output modes and is fully compatible with all MPEG
decoders or conditional access modules to support any customer
application.
-
32APSK)
LDPC and BCH FEC decoding for DVB-S2/S2X standards
I2C serial bus interfaces (master and host)
Firmware control (embedded ROM/NVM)
Upgradeable with patch download via I2C or fast SPI
Flexible TS output interface (serial, parallel, and slave)
DiSEqCTM 2.0 interface and UnicableTM support
Fast lock times
Low power consumption
Two power supplies: 1.2 and 3.3 V
7x7 mm, QFN-48 pin package, Pb-free/RoHS compliant
Applications
DiSEqCTM
2.0
CTRL
GPIO_0
GPIO
TS_ERR/
GPIO_1
ADC (I)
ADC (Q)
FRONT
END
AGCs
x(A)PSK
DEMOD
VITERBI
RS
LDPC
BCH
EQUALIZER
TS_SYNC
TS_VAL
TS_CLK
TS_DATA
8
DVB-S/S2/S2X
FEC MODULE
Ext. Clk or Xtal
OSC
& PLL
Si2166D
HDTV MPEG S.o.C.
MP_x
DSP &
SYNCHRO
RESETB
MPEG TS
Satellite
ZIF Tuner
S_ADC_IP
S_ADC_IN
S_ADC_QP
S_ADC_QN
1.2, 3.3V
INTERFACE
QPSK/8PSK/xAPSK
Full-NIM
iDTV (integrated Digital TV)
Digital satellite STB
PC-TV accessories
PVR, DVD, and Blue Ray disc recorders
DISEQC_OUT
DISEQC_IN
-
CLK_IN_OUT
TUN_SDA
TUN_SCL
Digital Demodulator
I2C
SWITCH
Copyright © 2015 by Silicon Laboratories
I2C
I/F
HOST_SDA
HOST_SCL
10.14.15
Si2166-D60
DVB-S/S2/S2X Digital TV Demodulator
Selected Electrical Specifications
(TA = –10 to 75 °C)
Parameter
Test Condition
Min
Typ
Max
Unit
Input clock reference
4
—
30
MHz
Supported XTAL frequency
16
—
30
MHz
General
Total power consumption
—
421
—
mW
DVB-S2
—
230
—
mW
2 layer PCB
—
35
—
°C/W
4 layer PCB
—
23
—
°C/W
VDD_VCORE
1.14
1.20
1.30
V
VDD_VANA
3.00
3.30
3.60
V
VDD_VIO
3.00
3.30
3.60
V
Thermal resistance
DVB-S2
1
Power Supplies
Notes:
1. Test conditions: 32 Mbaud, CR = 3/5, 8PSK, pilots On, parallel TS, C/N at picture failure.
2. Test conditions: 30 Mbaud, CR = 7/8, parallel TS, at QEF: BER = 2 x 10–4.
30
29
28
TS_DATA[7]
31
GND/JTAG_TDO
32
TS_ERR/GPIO_1
XTAL_O
33
VDD_VCORE
XTAL_I/CLK_IN
34
MP_C
ADDR
35
RESETB
GND
36
MP_D
VDD_VANA
Pin Assignments
27
26
25
S_ADC_IP 37
24 TS_DATA[6]
S_ADC_IN 38
23 TS_DATA[5]
S_ADC_QP 39
22 VDD_VIO
S_ADC_QN 40
NC 41
NC 42
Si2166D
21 GND/JTAG_TDI
(GND_PAD)
19 TS_DATA[4]
NC 43
20 VDD_VCORE
18 TS_DATA[3]
QFN-48
7x7mm
CLK_IN_OUT 44
SDA_MAST 45
17 TS_DATA[2]
16 TS_DATA[1]
SCL_MAST 46
15 TS_DATA[0]/TS_SER
GND/JTAG_TRSTB 47
14 TS_CLK
VDD_VCORE 48
2
3
4
5
6
7
8
9
10
11
12
MP_A
MP_B
GPIO_0/JTAG_TMS
DISEQC_CMD
DISEQC_IN
DISEQC_OUT
VDD_VCORE
GND/JTAG_TCLK
VDD_VIO
SCL_HOST
SDA_HOST
TS_VAL
13 TS_SYNC
1
Selection Guide
Part Number
Description
Si2166-D60-GM
DVB-S/S2/S2X Digital TV Demodulator, 7x7 mm QFN-48
Digital Demodulator
Copyright © 2015 by Silicon Laboratories
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders
10.14.15