LT1567 1.4nV/√Hz 180MHz Filter Building Block U FEATURES DESCRIPTIO ■ The LT®1567 is an analog building block optimized for very low noise high frequency filter applications. It contains two wideband rail-to-rail operational amplifiers, one of them internally configured as a unity-gain inverter. With the addition of a few passive components, the LT1567 becomes a flexible second order filter section with cutoff frequency (fC) up to 5MHz, ideal for antialiasing or for channel filtering in high speed data communications systems. A spreadsheet-based design tool is available at www.linear.com for designing lowpass and bandpass filters using the LT1567. ■ ■ ■ ■ ■ ■ ■ ■ ■ Single-Ended to Differential Conversion Low Noise: 1.4nV/√Hz 20µVRMS Total Wideband Noise in Filter with 2MHz fC Dynamic Range: 104dB SNR at ±5V Total Supply Voltage: 2.7V to 12V Rail-to-Rail Outputs DC Accurate: Op Amp VOS 0.5mV (Typ) Trimmed Bandwidth for Accurate Filters No External Clock Required MSOP-8 Surface Mount Package U APPLICATIO S ■ ■ ■ ■ ■ ■ In addition to low noise and high speed, the LT1567 features single-ended to differential conversion for direct driving of high speed differential input A/D converters. The LT1567 operates from a total power supply voltage of 2.7V to 12V and supports signal-to-noise ratios above 100dB. Low Noise, High Speed Filters to 5MHz Low Noise Differential Circuits Communication Channel or Roofing Filters Antialias or Reconstruction Filtering Video Signal Processing Single-Ended to Differential Conversion The LT1567 is available in an 8-lead MSOP package. , LTC, LT and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. U TYPICAL APPLICATIO 2MHz 3-Pole Antialias Filter with Single-Ended to Differential Conversion Frequency Response V+ R2 536Ω 12 0.1µF 6 C2 270pF R3 147Ω VIN C1 270pF 1 8 2 7 0.1µF 3 4 LT1567 0 R4 147Ω +AIN C3 270pF 6 ADC –AIN 5 R5 147Ω 0.1µF 1567 TA01 V– 96dB DIFFERENTIAL SNR WITH 3V TOTAL SUPPLY GAIN = R2 ≤ 2.5MHz R1 f–3dB R3 = R4 = R5, C1 = C2 = C3 1 ; f ≤ 2.5MHz f–3dB = 1.82 = 2πR2C2 4πR3C3 –3dB LTC1420 GAIN (dB) R1 536Ω –6 –12 –18 –24 NOTE: 6dB GAIN RESULTS FROM –30 SINGLE-ENDED TO DIFFERENTIAL CONVERSION –36 100 1M FREQUENCY (Hz) 10M 1567 TA01a 1567fa 1 LT1567 U W W W ABSOLUTE AXI U RATI GS U W U PACKAGE/ORDER I FOR ATIO (Note 1) Total Supply Voltage (V+ to V –) ............................ 12.6V Input Current (Note 2) ........................................ ±25mA Operating Temperature Range (Note 3) LT1567C ..............................................–40°C to 85°C LT1567I ...............................................–40°C to 85°C Specified Temperature Range (Note 4) LT1567C ..............................................–40°C to 85°C LT1567I ...............................................–40°C to 85°C Storage Temperature Range ................. – 65°C to 150°C Lead Temperature (Soldering, 10 sec).................. 300°C ORDER PART NUMBER TOP VIEW OAOUT OAIN BYPASS V– 1 2 3 4 8 7 6 5 V+ INVOUT INVIN DC BIAS LT1567CMS8 LT1567IMS8 MS8 PACKAGE 8-LEAD PLASTIC MSOP MS8 PART MARKING TJMAX = 150°C, θJA = 200°C/W LTWH LTWJ Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications that apply over the full operating temperature range (Note 4), otherwise specifications and typical values are at TA = 25°C. VS = ±2.5V, RL = 1K, VOUT = 0 on both amplifiers unless otherwise noted. PARAMETER CONDITIONS MIN Total Supply Voltage TYP MAX 12 V 8.5 9 11 15 16 19 mA mA mA 2.7 UNITS Supply Current VS = ±1.5V VS = ±2.5V VS = ±5V ● ● ● OA Output Positive Voltage Swing VS = ±1.5V, RL = 1k VS = ±2.5V, RL = 1k VS = ±2.5V, RL=100 VS = ±5V, RL = 1k ● ● ● ● 1.30 2.20 1.90 4.70 1.45 2.45 2.25 4.90 V V V V OA Output Negative Voltage Swing VS = ±1.5V, RL = 1k VS = ±2.5V, RL = 1k VS = ±2.5V, RL=100 VS = ±5V, RL = 1k ● ● ● ● –1.30 –2.20 –2.00 –4.70 –1.45 –2.45 –2.30 –4.90 V V V V INV Output Positive Voltage Swing VS = ±1.5V, RL = 1k VS = ±2.5V, RL = 1k VS = ±2.5V, RL = 100 (LT1567I Only, Note 5) VS = ±5V, RL = 1k ● ● ● ● 1.30 2.20 1.80 4.60 1.40 2.50 2.00 4.80 V V V V INV Output Negative Voltage Swing VS = ±1.5V, RL = 1k VS = ±2.5V, RL = 1k VS = ±2.5V, RL = 100 (LT1567I Only, Note 5) VS = ±5V, RL = 1k ● ● ● ● –1.30 –2.20 –1.80 –4.50 –1.40 –2.40 –2.00 –4.80 V V V V Common Mode Input Voltage Range (DC BIAS, Pin 5) (See Pin Functions) VS = ±1.5V, CMRR ≥ 40dB (Note 6) VS = ±5V, CMRR ≥ 40dB (Note 6) ● ● –0.5 –3.8 DC Common Mode Rejection Ratio (CMRR) VS = ±1.5V, DC BIAS = –0.25V to 0.25V VS = ±5V, DC BIAS = –2.5V to 2.5V ● ● 80 65 90 dB dB VS = ±1.5V to ±5V, DC BIAS = 0V ● 80 100 dB DC Power Supply Rejection Ratio (PSRR) 0.5 3.5 V V OA Input Offset Voltage ● 0.5 3 mV INV Output Offset Voltage ● 5 9 mV 1567fa 2 LT1567 ELECTRICAL CHARACTERISTICS The ● denotes the specifications that apply over the full operating temperature range (Note 4), otherwise specifications and typical values are at TA = 25°C. VS = ±2.5V, RL = 1K, VOUT = 0 on both amplifiers unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS OA Input Bias Current ● 3 10 µA DC BIAS Input Bias Current ● 6 15 µA OA DC Open-Loop Gain VS = ±1.5V, RL = 1k, VO = –1V to 1V VS = ±2.5V, RL = 1k, VO= –2V to 2V VS = ±2.5V, RL = 100, VO = –1.5V to 1.5V VS = ±5V, RL = 1k, VO = –4V to 4V ● ● ● ● 7.5 10 1.2 10 INV DC Gain VS = ±1.5V, RL = 1k, VIN = –1V to 1V VS = ±2.5V, RL = 1k, VIN = –2V to 2V VS = ±2.5V, RL = 100, VIN = –1.5V to 1.5V VS = ±5V, RL = 1k, VIN = –4V to 4V ● ● ● ● 0.97 0.97 0.97 0.97 INV DC Input Resistance VS = ±2.5V, RL = 1k, VIN = –2V to 2V ● 450 600 OA Gain Bandwidth Product Measured at 2MHz, VS = ±1.5V Measured at 2MHz, VS = ±2.5V Measured at 2MHz, VS = ±5V ● ● ● 100 110 120 180 185 190 INV Bandwidth –3dB INV AC Gain Measured at 2MHz ● 0.96 1.0 OA Slew Rate VS = ±5V INV Slew Rate VS = ±5V 90 V/µs OA Input Voltage Noise Density (Note 7) f = 100kHz 1.4 nV/√Hz OA Input Current Noise Density f = 100kHz 1.0 pA/√Hz Wideband Output Noise for a Second Order Filter (Figure 1) fC = 2MHz, BW = 4MHz (Note 8) fC = 5MHz, BW = 10MHz (Note 8) 20 30 µVRMS µVRMS Total Harmonic Distortion (THD) for a Second Order Filter (Figure 1) f = 1MHz, fC = 2MHz, VOUT = 1VRMS f = 2.5MHz, fC = 5MHz, VOUT = 1VRMS –88 –70 dB dB 55 60 7.0 80 V/mV V/mV V/mV V/mV 1.04 1.04 1.04 1.04 V/V V/V V/V V/V 750 Ω MHz MHz MHz 85 55 ● Output Short-Circuit Current (Note 9) V/V V/µs 50 mA OA Output Impedance f = 100kHz, OA Connected as Unity-Gain Inverter 0.03 Ω INV Output Impedance f = 100kHz 0.7 Ω Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs of each op amp are protected by back-to-back diodes and diodes to each supply. If either input exceeds the supply or the differential input voltage exceeds 1.4V, the input current should be limited to less than 25mA. Note 3: The LT1567C and LT1567I are guaranteed functional over the operating temperature range –40°C to 85°C. Note 4: The LT1567C is guaranteed to meet specified performance from 0°C to 70°C. The LT1567C is designed, characterized and expected to meet specified performance from –40°C to 85°C but not tested or QA sampled at these temperatures. The LT1567I is guaranteed to meet specified performance from – 40°C to 85°C. 8 MHz 1.05 Note 5: With INVIN pin driven to ±2V. Note 6: This parameter is not 100% tested. Note 7: The input referred voltage noise density of the unity gain inverter is 5.6nV/√Hz which includes the noise of the gain setting resistors. Note 8: For fC = 2MHz, C1 = C2 = 180pF, R1 = R2 = 604Ω, R3 = 316Ω and for fC = 5MHz, C1 = C2 = 180pF, R1 = R2 = 232Ω, R1 = 130Ω. BW is the bandwidth of the noise measurement (Figure 1 circuit). Note 9: Under direct short circuit conditions, with TA < 25°C the output current is reduced. 1567fa 3 LT1567 U W TYPICAL PERFOR A CE CHARACTERISTICS OA Open-Loop Gain and Phase vs Frequency 70 OA Open-Loop Gain and Phase vs Frequency PHASE 50 60 40 30 GAIN 20 0 10 –30 0 –60 90 PHASE 60 30 30 GAIN 20 0 10 –30 0 –60 –10 –90 –10 –90 –20 –120 –20 –120 –30 0.1 –150 –30 0.1 10 1 FREQUENCY (MHz) 100 –150 1 10 FREQUENCY (MHz) 100 1567 G02 1567 G01 Closed-Loop Gain and Phase of OA and INV vs Frequency (AV = –1) Closed-Loop Gain and Phase of OA and INV vs Frequency (AV = –1) 8 GAIN OA OUT 6 4 176 4 176 2 174 174 0 172 PHASE INV OUT PHASE OA OUT 170 0 –4 168 –6 166 –6 –8 164 –8 100 PHASE OA OUT 170 168 166 VS = ±1.5V TA = 25°C –10 0.1 162 1 10 FREQUENCY (MHz) 172 PHASE INV OUT –2 –4 –10 0.1 GAIN 180 INV OUT 178 GAIN OA OUT 6 2 –2 8 164 162 1 10 FREQUENCY (MHz) 100 1567 G15 1567 G03 OA Gain Bandwidth Product and Phase Margin vs Temperature GAIN BANDWIDTH (MHz) 25 GBW PRODUCT VS = ±5V 175 5 GBW PRODUCT VS = ±1.5V –15 PHASE MARGIN (DEG) PHASE MARGIN VS = ±1.5V 225 90 80 80 70 –35 5 25 45 65 85 105 125 TEMPERATURE (°C) 1567 G14 POSITIVE SUPPLY 60 50 NEGATIVE SUPPLY 40 30 20 10 150 –55 –35 –15 PSRR of OA or INV vs Frequency 90 POWER SUPPLY REJECTION (dB) 45 POWER SUPPLY REJECTION (dB) PHASE MARGIN VS = ±5V 250 200 PSRR of OA vs Frequency 65 PHASE (DEG) GAIN INV OUT 182 178 PHASE (DEG) GAIN (dB) 10 182 VS = ±5V TA = 25°C 180 GAIN (dB) 10 275 PHASE (DEG) 30 90 PHASE (DEG) GAIN (dB) 40 60 GAIN (dB) 50 150 VS = ±1.5V TA = 25°C 120 70 150 VS = ±5V TA = 25°C 120 60 VS = ±5V AV = –10 RF = 1k RG = 100Ω RL = 1k 0 0.001 0.1 1 0.01 FREQUENCY (MHz) 60 1567 G04 NEGATIVE SUPPLY 50 40 30 20 10 10 POSITIVE SUPPLY 70 VS = ±5V AV = –1 RF = RG = 1k RL = 1k 0 0.001 0.01 0.1 1 FREQUENCY (MHz) 10 1567 G05 1567fa 4 LT1567 U W TYPICAL PERFOR A CE CHARACTERISTICS OA Rising Slew Rate vs Temperature Output Impedance vs Frequency 60 VS = ±5V TA = 25°C OA AV = –10 OA AV = –1 0.1 30 VS = ±5V RS = 10Ω RL = ∞ 25 VS = ±2.5V 40 VS = ±1.5V 20 15 RS = 20Ω RL = ∞ 10 30 0.01 5 0.001 100k 1M 10M FREQUENCY (Hz) 20 –55 –35 –15 100M Output Overshoot vs Series Resistor and Capacitive Load RS = 10Ω RL = ∞ 30 25 RS = 20Ω RL = ∞ 20 15 10 RS = RL = 50Ω 5 100 CAPACITIVE LOAD (pF) Input Voltage Noise Density of OA vs Frequency Input Current Noise Density of OA vs Frequency 4.5 TA = 25°C 3.5 3.0 2.5 2.0 1.5 1.0 0.5 1000 0 0.1 1 10 FREQUENCY (kHz) 100 TA = 25°C 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0.1 1 10 FREQUENCY (kHz) 1567 G10 Input Bias Current of OA vs Common Mode Voltage 8 1000 1567 G08 1567 G09 100 1567 G11 Supply Current vs Supply Voltage 20 VS = 5V 7 6 SUPPLY CURRENT (mA) INPUT BIAS CURRENT (µA) 10 100 CAPACITIVE LOAD (pF) 1567 G07 4.0 0 10 CURRENT NOISE DENSITY (pA/√Hz) 35 4.5 VS = ±1.5V AV = –1 VOLTAGE NOISE DENSITY (nV/√Hz) 40 RL = RS = 50Ω 0 5 25 45 65 85 105 125 TEMPERATURE (°C) 1567 G06 OVERSHOOT (%) VS = ±2.5V AV = –1 50 INVERTER 1 AV = –1 RF = RG = 1k RL = 1k OVERSHOOT (%) OUTPUT IMPEDANCE (Ω) 10 SLEW RATE (V/µs) 100 Output Overshoot vs Series Resistor and Capacitive Load 5 4 3 2 15 10 5 1 0 0 1 2 4 3 COMMON MODE VOLTAGE (V) 5 1567 G12 0 0 2 6 8 4 TOTAL SUPPLY VOLTAGE (V) 10 1567 G13 1567fa 5 LT1567 U U U PI FU CTIO S OAOUT (Pin 1): Output of the Uncommitted Op Amp (OA). As with most wideband op amps, it is important to avoid connecting heavy capacitive loads (above about 10pF) directly to this output. Such loads will impair AC stability and should be isolated from the output through series resistance. OAIN (Pin 2): Inverting or “–” Input of the Uncommitted Op Amp (OA) in the LT1567. The noninverting or “+” input of this amplifier is shared with that of the INV amplifier and accessed via the DC BIAS and BYPASS pins. The OA amplifier is optimized for minimal wideband noise. BYPASS (Pin 3): AC Ground Bypass. A decoupling capacitor, typically 0.1µF, from this pin to a printed circuit ground plane must be used. Use the shortest possible wiring. Power Supply Pins (Pins 4, 8): The V – and V+ pins should be bypassed with 0.1µF capacitors to an adequate analog ground plane using the shortest possible wiring. Electrically clean supplies and a low impedance ground are important to obtain the wide dynamic range and bandwidth available from the LT1567. Low noise linear power supplies are recommended. Switching supplies require special care because of the inevitable risk of their switching noise coupling into the signal path, reducing dynamic range. DC BIAS (Pin 5): DC Biasing Input. Sets the DC voltage at the noninverting inputs of the two internal amplifiers; designed for use as a DC reference, not a signal input.The DC BIAS input includes a small series resistor, both to balance DC offsets in the presence of input bias currents and also to suppress the “Q” factor of possible parasitic high frequency resonant circuits introduced by wiring inductance. The reference voltage at the noninverting inputs of the two amplifiers is decoupled for very high frequencies with a small internal capacitor to the chip substrate, nominally 7pF. An external capacitor, typically 0.1µF, to a nearby ground plane must be added at Pin 3 (BYPASS) for a clean wideband DC reference biasing voltage. INVIN (Pin 6): Unity-Gain Inverter Input. The “inverter” (INV) amplifier in the LT1567 is connected to internal resistors (nominally 600Ω each) to form a closed-loop amplifier with a wideband voltage gain of nominally –1. This amplifier is similar to the uncommitted op amp (OA) but is optimized for high frequency linearity. INVOUT (Pin 7): Output of the INV or “Inverter” Amplifier, with a Nominal Gain of –1 from the INVIN Pin. As with most wideband op amps, it is important to avoid connecting heavy capacitive loads (above about 10pF) directly to this output. Such loads will impair AC stability and should be isolated from the output through series resistance. 1567fa 6 LT1567 W BLOCK DIAGRA + OAOUT 1 + 8 V OA – + 7 INVOUT INV OAIN 2 – 600Ω 600Ω BYPASS 3 6 INVIN 7pF V– 4 150Ω 5 DC BIAS 1567 BD 1567fa 7 LT1567 U U U W APPLICATIO S I FOR ATIO addressing the different sensitivities to these effects when used as a filter section. This combination produces a low noise filter with better distortion performance than would be possible with identical amplifiers. Functional Description The LT1567 contains two low noise rail-to-rail output, wideband operational amplifiers, one of them connected internally as a unity-gain inverter. These two amplifiers can form a second order multiple feedback filter configuration (Figure 1) for megahertz signal frequencies, with exceptionally low total noise. The amplifier in the dedicated inverter (INV) is optimized for better high frequency linearity while the uncommitted operational amplifier (OA) is optimized for lower input noise voltage, LT1567 Free Design Software A spreadsheet-based design tool is available at www.linear.com for designing lowpass and bandpass filters using the LT1567. VOUT– 1 R2 R1 600Ω – 2 VIN DESIGN EQUATIONS: ( R2 GAIN = 1 AND fC ≤ 1MHz GAIN = R1 LT1567 C1 R3 6 600Ω ) fC IS THE FILTER’S CUTOFF FREQUENCY 1 1000 • fC 1 BUTTERWORTH R2 = 4.44 • C1 • fC R2 R3 = 2 R1 = R2, C1 = C2, C1 ≤ C2 – + 7 0.1µF 3 VOUT+ + 7pF 150Ω 5 1 5.65 • C1 • fC R2 R3 = 2.62 CHEBYSHEV 0.25dB RIPPLE R2 = V+ 8 V– 0.1µF V+ 4 0.1µF V– 1567 F01a Gain vs Frequency 3 0 CHEBYSHEV –3 –6 1 2π√R2R3 C2 R2 R3 Q= GAIN + 1 TRANSFER FUNCTION H(s) = –9 GAIN (dB) fO = BUTTERWORTH (2πfO)2 (2πfO) s + Q s + (2πfO)2 2 –12 –15 –18 –21 –24 –27 –30 100k 1M FREQUENCY (Hz) 10M 1567 F01b GAIN IS MEASURED TO EITHER OUTPUT ALONE. IF OUTPUT USED DIFFERENTIALLY, VOUT+ – VOUT– = 2× VIN Figure 1. 2nd Order Lowpass Filter and Gain Response for fC = 1MHz (Butterworth: C1 = C2 = 390pF, R1 = R2 = 576Ω, R3 = 280Ω Chebyshev: C1 = C2 = 390pF, R1 = R2 = 453Ω, R3 = 174Ω) 1567fa 8 LT1567 U U U W APPLICATIO S I FOR ATIO The simple-to-use spreadsheet requires the user to define the desired corner (or center) frequency, the passband gain and a capacitor value for a choice of second or third order Chebyshev or Butterworth lowpass or second order bandpass filters. The spreadsheet outputs the required external standard component values and provides a circuit diagram. Signal Ground Both operational amplifiers within the LT1567 are designed for inverting operation (constant common mode input) and they share a single reference node on the chip. Two pins permit access to this node: DC BIAS and BYPASS. For a clean reference over a wide bandwidth, the normal procedure is to connect DC BIAS to a DC potential or ground and BYPASS to a decoupling capacitor that returns to a ground plane. Differential Output Feature The multiple feedback filter section of Figure 1 inherently includes two outputs of opposite signal polarity: a DC inverting output from the OA (Pin 1) and a DC noninverting VOUT– 1 R1 LT1567 R3 600Ω C1 2 VIN R2 – 600Ω DESIGN EQUATIONS FOR fCENTER ≤ 1MHz fCENTER IS THE FILTER’S CENTER FREQUENCY – + 7 0.1µF 3 5 VOUT+ + 150Ω V+ 8 C1 ≤ V– 0.1µF fCENTER √GN + 1 –3dB BANDWIDTH = 2 • π • R2 • C1 √GN + 1 √GN + 1 √GN + 1 R3 = 2500 • fC 2π • C1 • fCENTER 0.1µF 4 V+ MAXIMUM fCENTER = 5MHz/GAIN GN IS GAIN AT fCENTER = R3/R1, R2 = R3, C1 = C2 fCENTER = 7pF V– 1567 F02a Gain vs Frequency 25 20 15 GAIN (dB) C2 6 10 5 0 –5 –10 –15 50k 500k FREQUENCY (Hz) 5M 1567 F02b GAIN IS MEASURED TO EITHER OUTPUT ALONE. IF OUTPUT USED DIFFERENTIALLY, VOUT+ – VOUT– = 2× VIN Figure 2. 2nd Order Bandpass Filter and Gain Response for fC = 500kHz, Gain = 10 (C1 = C2 = 1000pF, R2 = R3 = 1.05k, R1 = 105Ω) 1567fa 9 LT1567 U W U U APPLICATIO S I FOR ATIO output from the INV block (Pin 7). These two outputs maintain equal gain and 180º phase shift over a wide frequency range. This feature permits choosing the signal polarity in single ended applications, and also performs single ended to differential conversion. The latter property is useful as an antialiasing filter to drive standard monolithic A/D converters having differential inputs, as illustrated on the first page of this data sheet. cause a high Q LC resonance in the hundreds of kHz in the chip’s supplies or ground reference. This may impair filter performance at those frequencies. In stringent filter applications, a compact, carefully laid out printed circuit board with good ground plane makes a difference in both stopband rejection and distortion. Finally, equipment to measure filter performance can itself introduce distortion or noise. Checking for these limits with a wire in place of the filter is a prudent routine procedure. Dealing with High Source Impedances The voltage VIN in Figure 1, on the left side of R1, is the signal voltage that the filter sees. If a voltage source with significant internal impedance drives the VIN node in Figure 1, then the filter input VIN may differ from the source’s open-circuit output, and the difference can be complex, because the filter presents a complex impedance to VIN. A rule of thumb is that a source impedance is negligibly “low” if it is much smaller than R1 at frequencies of interest. Otherwise, the source impedance (resistive or reactive) effectively adds to R1 and may change the signal frequency response compared to that with a low source impedance. If the source is resistive and predictable, then it may be possible to design for it by reducing R1. Unpredictable or nonresistive source impedances that are not much less than R1 should be buffered. Construction and Instrumentation Cautions Electrically clean construction is important in applications seeking the full dynamic range and bandwidth of the LT1567. Using the shortest possible wiring or printedcircuit paths will minimize parasitic capacitance and inductance. High quality supply bypass capacitors of 0.1µF near the chip, connected to a ground plane, provide good decoupling from a clean, low inductance power source. But several inches of wire (i.e., a few microhenrys of inductance) from the power supplies, unless decoupled by substantial capacitance (≥10µF) near the chip, can Low Noise Differential Circuits The LT1567 is an optimum analog building for designing single supply differential circuits to process low level signals. Figure 3 shows a single ended to differential amplifier driving a 1st order differential RC filter. The differential output of Figure 3 is a function of input (VIN) and the VREF voltage on Pin 5. (The range of the VREF voltage on Pin 5 in Figures 3, 4 and 5 is the common mode input voltage range parameter under Electrical Characteristics.)The graph of Figure 3 shows the differential signal-to-noise ratio for a gain of 2 and a gain of 10. Increasing the differential gain increases the differential signal-to-noise ratio. The equivalent input noise is equal to the output noise divided by the gain. For example, with a gain equal to 2 (R2 = R1 = 200Ω) and a gain equal to 10 (R2 = 1k, R1 = 200Ω), the equivalent input noise is 4.59nV/ √Hz and 2.04nV/√Hz respectively. The VREF voltage on Pin 5 can be set by a voltage divider or a reference voltage source. To maximize the unclipped LT1567 output swing, the DC output voltage should be set at V+/2. However, if VINDC (the input DC voltage) is within the range of VREF, then VREF can be equal to VINDC. The input signal can also be AC coupled to the input resistor, R1, and VREF set to the DC voltage of the circuit following the amplifier. For example, VREF might be set to 1.2V to bias the input of an I and Q modulator used in broadband communication systems. 1567fa 10 LT1567 U U U W APPLICATIO S I FOR ATIO R1 R2 VOUT1 VIN 1 R 6 LT1567 600Ω – 2 600Ω C – + 7 VOUT2 0.1µF 3 R + 7pF 150Ω 5 V+ 8 V+ V– 0.1µF 1567 F03a 4 ( ) VOUT1 = – R2 • VIN + R2 + 1 • VREF R1 R1 VOUT2 = –VOUT1 + 2 VREF VDIFF = VOUT2 – VOUT1 = 2 • R2 • (VIN – VREF) R1 fηBW IS THE NOISE BANDWIDTH fηBW = f –3dB = 1 4π • R • C 1.57 4π • R • C Differential Output Signal-to-Noise Ratio (for a Sinewave Signal) 110 SIGNAL-TO-NOISE RATIO (dB) VREF VDIFF VDIFF GAIN = 2 R1 = R2 = 200Ω 100 90 VDIFF GAIN = 10 R1 = 200Ω R2 = 1k 80 70 V+ = 5V f–3dB = 2.55MHz fNBW = 4MHz 0.5 1 1.5 2 VDIFF (VRMS) 2.5 3 1567 F03b Figure 3. A Single Ended to Differential Amplifier 1567fa 11 LT1567 U U U W APPLICATIO S I FOR ATIO Figure 4 shows an LT1567 single supply differential buffer driving a differential 1st order RC filter. The VREF voltage is subject to the common mode (DC BIAS) limits in the spec table. Within this constraint, VREF can be used to adjust the output common mode level, as noted in Figure 4. For example, in a single 5V power supply circuit, if the input common mode DC voltage is 1.1V and VREF is 1.8V, then the output common mode DC voltage is 2.5V. Output Drive The output of the LT1567 op amp (Pin 1) can typically provide at least ±20mA. The minimum resistive load to ground that Pin 1 or Pin 7 can drive depends on the feedback resistor and the peak output voltage. For example, the differential driver circuit in Figure 4 is operating with a single 5V supply, VREF and VINDC are equal to 2.5V and the peak AC signal (VINAC) is 1V. If the outputs provide 1.66mA to the feedback resistors (1V/604Ω), then 18.34mA is available to drive a resistive load. With the peak output voltage at 3.5V (2.5V DC plus 1V peak AC), the outputs can drive resistive loads of 191Ω or greater. Figure 5 shows a low noise differential to single ended amplifier and 1st order lowpass filter. The input common mode rejection depends on the matching of resistors R1 and R3 and the LT1567 inverter gain tolerance (common mode rejection is at least 38dB up to 1MHz with 1% resistors and 5% inverter gain tolerance). The DC voltage at the amplifier’s output (VOUT) is VREF. VIN1 604Ω 604Ω VOUT1 VIN2 1 R 6 LT1567 600Ω 2 – 600Ω C – + 7 VOUT2 0.1µF 3 VREF 5 VDIFF R + 7pF 150Ω V+ 8 V– 0.1µF 1567 F04a 4 V+ VOUT1 = –VIN2 + 2VREF VOUT2 = –VIN1 + 2VREF COMMON MODE VOUT IS 2VREF – (COMMON MODE VIN) VDIFF = VOUT2 – VOUT1 = VIN2 – VIN1 f –3dB = 1 4π • R • C fηBW IS THE NOISE BANDWIDTH fηBW = 1.57 4π • R • C Figure 4. A Differential Buffer/Driver 1567fa 12 LT1567 U W U U APPLICATIO S I FOR ATIO VIN2 R3 = R1 C R1 R2 VIN1 VOUT 1 6 LT1567 600Ω 2 – 600Ω – + 7 0.1µF 3 VREF 5 + 7pF 150Ω V+ 8 V– 0.1µF V+ 1567 F05 4 ( ) ( ) WITH R3 AND R1 EQUAL, VOUT = VREF + R2 (VIN2 – VIN1) R1 GAIN FROM (VIN2 – VIN1) TO VOUT IS IF R1 = R3 = 604Ω, THEN R2 604Ω 1.21k 2.43k R2 R1 GAIN 1 2 4 f –3dB = 1 2π • R2 • C Vη, INPUT REFERRED NOISE (nV/√Hz) 9.0 8.4 8.1 NOISE AT VOUT = GAIN • Vη • √fηBW; fηBW = 1.57 • f –3dB Figure 5. A Differential to Single Ended Amplifier/Filter 1567fa 13 LT1567 W U U W U U U APPE DIX: OUTPUT OISE OF A OP A P I VERTI G A PLIFIER R2 RS + – – R1 VS VOUT + RP CS 1567 AP01 NOISE AT VOUT IN VRMS = VON IN V/√Hz • √fNBW fNBW = NOISE BANDWIDTH VON = ( ) R2 + 1 R1 + RS 2 • VN2 + IF VSN AND RS = 0 THEN VON = ( ) R2 + 1 R1 2 () • VN2 + R2 R1 ( R2 R1 + RS 2 ) 2 • (VR12 + VSN2) + VR22 + (IN • R2)2 • VR12 + VR22 + (IN • R2)2 VON is the voltage noise density in V/√Hz at the inverter’s output. VN is the op amp’s voltage noise density in V/√Hz. IN is the op amp’s current noise density in A/√Hz. VSN is the voltage noise density of the input voltage source VS with source resistance RS. (If VSN is less than one-half the noise of resistor R1, then the calculation error when omitting VSN is less than 4.3%.) VR1 and VR2 is the voltage noise density of the thermal noise of resistors (R1 + RS) and R2 respectively. Resistor RS is typically smaller than R1 and is omitted from noise calculations. The voltage noise density of the thermal noise of a resistor R is approximately 0.128x√RnV/√Hz at 25°C. The RP resistor noise at the op amp’s plus input is equal to √(kT/CS) and is omitted from noise calculations. (If CS = 0.1µF, the RP noise is 0.2µVRMS at 25°C, k = 1.38x 10–23 and T = 273°C + 25°C.) The noise bandwidth (fNBW) is greater than a circuit’s –3dB bandwidth. (For a 1st, 2nd or 3rd order Butterworth filter, fNBW is 1.57x, 1.22x and 1.15x respectively the – 3dB bandwidth.) Example: Calculate VON, the voltage noise density of an LT1567 op amp inverter for R1 = R2 = 604Ω. With VN = 1.4nV/√Hz and IN = 1pA/√Hz. VON = ( ) 604 + 1 604 2 ( ) • (1.4 •10–9)2 + 604 604 2 • (0.128 •10–9 • √604)2 + (0.128 • 10–9 • √604)2 + (10–12 • 604)2 VON = 5.29nV/√Hz 1567fa 14 LT1567 U PACKAGE DESCRIPTIO MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660) 0.889 ± 0.127 (.035 ± .005) 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.42 ± 0.038 (.0165 ± .0015) TYP 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.65 (.0256) BSC 8 7 6 5 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) DETAIL “A” 0° – 6° TYP GAUGE PLANE 0.53 ± 0.152 (.021 ± .006) DETAIL “A” 1 2 3 4 1.10 (.043) MAX 0.86 (.034) REF 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) BSC 0.127 ± 0.076 (.005 ± .003) MSOP (MS8) 0204 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 1567fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LT1567 U TYPICAL APPLICATIO A 3rd Order Chebyshev 2.5MHz Lowpass Filter VOUT– 1 649Ω 40.2Ω 604Ω 90.9Ω 2200pF 220pF 220pF LT1567 2 VIN 6 600Ω – 600Ω – + 7 0.1µF 3 5 VOUT+ + 7pF 150Ω V+ 8 V– 0.1µF 4 V+ 0.1µF V– 1567 F06a Gain Response 10 GAIN (dB) 0 –10 –20 –30 –40 100k 1M FREQUENCY (Hz) 10M 1567 F06b GAIN IS MEASURED TO EITHER OUTPUT ALONE. IF OUTPUT USED DIFFERENTIALLY, VOUT+ – VOUT– = 2× VIN RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC 1560-1 1MHz/500kHz Continuous Time, Lowpass Elliptic Filter fCUTOFF = 500kHz or 1MHz LTC1562/LTC1562-2 Universal 8th Order Active RC Filters fCUTOFF(MAX) = 150kHz (LTC1562) fCUTOFF(MAX) = 300kHz (LTC1562-2) ® LTC1563-2/LTC1563-3 4th Order Active RC Lowpass Filters fCUTOFF(MAX) = 256kHz LTC1565-31 7th Order, Differential Inputs and Outputs 650kHz Continuous Time, Linear Phase Lowpass Filter LTC1566-1 2.3MHz Continuous Time Lowpass Filter 7th Order, Differential Inputs and Outputs LT1568 Very Low Noise 4th Order Filter Building Block fCUTOFF Up to 10MHz, Differential VOUT LTC1569-6/LTC1569-7 Self Clocked, 10th Order Linear Phase Lowpass Filters fCLK/fCUTOFF = 64/1, fCUTOFF(MAX) = 64kHz (LTC1569-6) fCLK/fCUTOFF = 32/1, fCUTOFF(MAX) = 374kHz (LTC1569-7) 1567fa 16 Linear Technology Corporation LT 0406 REV A • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2001