DN291 - Design Low Noise Differential Circuits Using the LT1567 Dual Amplifier Building Block

Design Low Noise Differential Circuits Using the LT1567 Dual
Amplifier Building Block
Design Note 291
Philip Karantzalis
Introduction
Many communications systems use differential, low
level (400mV to 1V peak-to-peak), analog baseband
signals where the baseband circuitry operates from
a single low voltage power supply (5V to 3V). Any
differential amplifier circuit used for baseband signal
conditioning must have very low noise and an output
voltage swing that includes most of the power supply
range for maximum signal dynamic range. The LT®1567,
a low noise operational amplifier (1.4nV/√Hz voltage
noise density) and a unity-gain inverter, is an excellent
analog building block (see Figure 1) for designing low
noise differential circuits. The gain bandwidth of the
LT1567 amplifier is 160MHz and its slew rate is sufficient for signal frequencies up to 5MHz. The LT1567
operates from 2.7V to 12V total power supply. The
output voltage swing is guaranteed to be 4.4V and
2.6V peak-to-peak, at 1k load with a single 5V and 3V
power supply, respectively. The LT1567 is available in
an 8-lead MSOP surface mount package.
1
tial output voltage noise density is 9.5 nV/√Hz and in
a 4MHz noise bandwidth, the total differential output
noise is 19μVRMS (with a low level 0.2VRMS differential
signal, the signal-to-noise ratio is an excellent 80.4dB).
The voltage on Pin 5 (VREF ) allows flexible DC bias
for the circuit and can be set by a voltage divider or
a reference voltage source (with a single 3V power
supply, the VREF range is 0.9V ≤ VREF ≤ 1.9V). In a
single supply circuit, if the input signal is DC coupled,
then an input DC voltage (VINDC) is required to bias
the circuit within its linear region. If VINDC is within
the VREF range, then VREF can be equal to VINDC and
the output DC common mode voltage (VOUTCM) at VO1
and VO2 is equal to VREF. To maximize the unclipped
LT1567 output swing however, the DC common mode
output voltage must be set at V+/2. The input signal
can be AC coupled to the circuit’s input resistor R1
and VREF also set to the DC common mode voltage
required by any following circuitry (for example the
input of an I and Q modulator).
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6
600Ω
2
600Ω
–
R1
R2
–
+
1
150Ω
600Ω
2
7pF
5
V+
4
V–
6
7
+
3
8
VO1
VIN
–
+
LT1567
DN191 F01
600Ω
–
0.1μF
Figure 1. LT1567 Analog Building Block
150Ω
VREF
A Single-Ended to Differential Amplifier
Figure 2 shows a circuit for generating a differential
signal from a single-ended input. The differential output
noise is a function of the noise of the amplifiers, the
noise of resistors R1 and R2 and the noise bandwidth.
For example, if R1 and R2 are each 200Ω, the differen08/02/291_conv
7
+
3
VO2
7pF
5
8
V+
V+
4
0.1μF
V–
LT1567
DN191 F02
V
R2
GAIN = O1 =
VIN R1
VO1o("*/t7IN("*/
t7REF
VO2 = –VO1t7REF
VDIFF = VO2 – VO1
VDIFFt("*/t7IN – VREF)
Figure 2. A Single-Ended Input to Differential
Output Amplifier
A Differential Buffer/Driver
Figure 3 shows an LT1567 connected as a differential
buffer. The differential output voltage noise density is
7.7nV/√Hz. The differential buffer circuit of Figure 3,
translates the input common mode DC voltage (VINCM)
to an output common mode DC voltage (VOUTCM) set
by the VREF voltage (VOUTCM = 2 • VREF – VINCM). For
example, in a single 5V power supply circuit, if VINCM
is 0.5V and VREF is 1.5V then VOUTCM is 2.5V.
A Differential to Single-Ended Amplifier
Figure 4 shows a circuit for converting a differential
input to a single-ended output. For a gain equal to
one (R1 = R2 = 604Ω and VOUT = V2 – V1) the input
referred differential voltage noise density is 9nV/√Hz
and differential input signal-to-noise ratio is 80.9dB
with 0.2VRMS input signal in a 4MHz noise bandwidth.
The input AC common mode rejection depends on
the matching of resistors R1 and R3 and the LT1567
inverter gain tolerance (common mode rejection is at
least 40dB up to 1MHz with one percent resistors and
two percent inverter gain tolerance). If the differential
input is DC coupled, then VREF must be set equal to
the input common mode voltage (VINCM). If VREF is
greater than VINCM then a peak voltage on Pin 7 may
exceed the output voltage swing limit. The DC voltage
at the amplifier’s output (VOUT, Pin 1) is VREF.
LT1567 Free Design Software
A spreadsheet-based design tool is available at
www.linear.com for designing lowpass and bandpass
filters using the LT1567.
The simple-to-use spreadsheet requires the user to
define the desired corner (or center) frequency, the
passband gain and a capacitor value for a choice
of second or third order Chebyshev or Butterworth
lowpass or second order bandpass filters.
The spreadsheet outputs the required external standard
component values and provides a circuit diagram.
Conclusion
With one LT1567 and two or three resistors, it is easy
to design low noise, differential circuits for signals
up to 5MHz. The LT1567 can also be used to make
low noise second and third order lowpass filters and
second order bandpass filters with differential outputs.
V2
R1
R2
C
V1
VOUT
1
6
600Ω
R3 = R1
2
600Ω
–
–
+
V2
604Ω
604Ω
VO1
V1
0.1μF
1
VREF
5
V+
600Ω
8
600Ω
–
2
V+
–
+
7
+
3
150Ω
VO2
V+
V–
LT1567
0.1μF
7pF
R2
, R3 = R1
R1
VO = GAIN (V2 – V1) + VREF
GAIN =
f–3dB BANDWIDTH AT VOUT =
5
8
4
DN191 F04
0.1μF
VREF
7pF
150Ω
6
7
+
3
V+
4
0.1μF
V–
LT1567
DN191 F03
VO1 = –7t7REF
VO2 = –7t7REF
VDIFF = VO2 – VO1 = V1 – V2
OUTPUT DC COMMON MODE
VOLTAGE, VOCMt7REF – VINCM
Figure 3. A Differential Input and Output Buffer/Driver
Data Sheet Download
www.linear.com
Linear Technology Corporation
IF R1 = R3 = 604Ω, THEN
1
õ.)[
tπt3t$
R2
604Ω
1.21k
2.43k
Vη* GAIN
9.0
8.4
8.1
NOISE AT VOUT("*/t7ηtðGηBW
1
2
4
fηBWtf –3dB
*Vη IS THE INPUT REFERRED DIFFERENTIAL VOLTAGE NOISE
%&/4*5:*/O7ð)[
Figure 4. A Differential Input-to-Single-Ended
Output Amplifier
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