Power Dissipation of MLX81100 DownloadLink 5464

Application Note
MLX81100
Power Dissipation
Table of contents
1
Introduction...................................................................................................................... 2
2
Schematics of example Applications............................................................................. 2
3
Calculation ....................................................................................................................... 4
4
Disclaimer......................................................................................................................... 9
MLX81100 application note
Author: FJE
Page 1 of 9
Rev 1.0 / 16/03/07
Application Note
MLX81100
Power Dissipation
1 Introduction
This document is intended to give a description of how to calculate the power dissipation of the chip if an
external regulator transistor is connected to pin VDD5V or if the internal regulator transistor is used.
2 Schematics of example Applications
All following schematics are sample schematics, which need to be adjusted depending on the application.
VBAT
VS
VDRV
RTG
CLKO
VDD5V
HSBC2
HS2
V1V8
BRMID2
VBAT
PS
VCC
HSBC1
IO4
HS1
IO5
BRMID1
VCC
Hall
sensor
M
VCC
Temperature
sensor
SW0
SW1
SW3
SW4
SW5
SW6
SW7
LS1
LS2
SW2
GND
SPI Interface
MLX
90316
LIN
IO0
IO1
IO2
IO3
LIN
GND
GND
Fig. 1
Shunt
VBAT
Reverse
Polarity
Protection
SHNT_L
CWD
TI0
TI1
TO
GND
GND
Sample application circuitry for DC-motor control using internal VDD5V voltage regulator
MLX81100 application note
Author: FJE
Page 2 of 9
Rev 1.0 / 16/03/07
Application Note
MLX81100
Power Dissipation
VBAT
VS
VDRV
RTG
CLKO
VDD5V
HSBC2
HS2
V1V8
BRMID2
VBAT
PS
VCC
HSBC1
IO4
HS1
IO5
BRMID1
VCC
Hall
sensor
M
VCC
Temperature
sensor
SW0
SW1
SW3
SW4
SW5
SW6
SW7
IO0
IO1
IO2
IO3
LIN
LIN
GND
GND
Fig. 2
LS1
LS2
SW2
GND
Shunt
SHNT_L
VBAT
Reverse
Polarity
Protection
CWD
TI0
TI1
TO
GND
GND
Sample application circuitry for higher VCC loads and higher ambient temperatures
MLX81100 application note
Author: FJE
Page 3 of 9
Rev 1.0 / 16/03/07
Application Note
MLX81100
Power Dissipation
3 Calculation
The real power dissipation has to be calculated by the user depending on the user’s application.
Main points where power dissipation can be saved are:
1 using an external regulator transistor -> Preg
2
=0
consider DC-load at pins carefully.
P =U *I
P = PVS I + Pchip + Preg + PLS X
P = (VSI * IVS I ) + ( IVDD 5V * VDD5V ) + ( IVDD 5V (VS I − VDD5V )) + ( I PU * RDSon )
2
If an external regulator transistor is used
Preg = I VDD 5V (VS I − VDD5V ) = 0 .
P = (VS I * IVS I ) + ( IVDD 5V *VDD5V ) + ( IVDD 5V (VS I − VDD5V )) is the basic power dissipation in all
applications when no DC-load is present at any of the pins and internal regulator transistor is used.
Case 1:
• internal voltage regulator transistor is used
• no DC-load at pins
•
IVS I = 0
•
I PU = 0
P = (VSI * IVS I ) + ( IVDD 5V * VDD5V ) + ( IVDD 5V (VS I − VDD5V )) + ( I PU * RDSon )
2
P = ( IVDD 5V * VDD5V ) + ( IVDD 5V (VS I − VDD5V ))
P = (30mA * 5V ) + (30mA(18V − 5V ))
P = 540mW
∆ϑ = Rth * P
K
* 0,54W
W
∆ϑ = 21,6 K
∆ϑ = 40
MLX81100 application note
Author: FJE
Page 4 of 9
Rev 1.0 / 16/03/07
Application Note
MLX81100
Power Dissipation
Case 2:
• external voltage regulator transistor is used
• no DC-load at pins
•
IVS I = 0
•
I PU = 0
P = (VSI * IVS I ) + ( IVDD 5V * VDD5V ) + ( IVDD 5V (VS I − VDD5V )) + ( I PU * RDSon )
2
P = ( IVDD 5V * VDD5V ) + ( IVDD 5V (VS I − VDD5V ))
P = (30mA * 5V ) + 0
P = 150mW
∆ϑ = Rth * P
K
* 0,15W
W
∆ϑ = 6 K
∆ϑ = 40
Any additional DC-load at pins will be added to P the power dissipation of the chip, e.g. pull-up resistors etc.
depending on their internal used voltage they cause load to VDD5V or VS.
IVS = I VDD 5V + IVS I + I PU
IVS I = I PS + IVDRV + I SW + I PSclamp
Explanation of the symbols and indexes:
IVS =
current flowing through reverse polarity diode, the sum of all currents flowing through the chip
IVS I =
and through possible external regulator transistor.
current flowing inside the chip at pin VS.
IVDD 5V =
I PS =
IVDRV =
I SW =
I PU =
I PSclamp =
current flowing into pin VDD5V.
current flowing through devices connected to pin PS.
current flowing while driving bridge drivers with PWM, mainly the current needed for
charge/discharge of the gate capacities.
current flowing through the pull-up/-down current sources connected to the SW-pins ( max value
4mA).
current flowing through low side drivers when a pull-up resistor is connected to these pins.
current flowing through chip-internal clamping diode when
MLX81100 application note
Author: FJE
Page 5 of 9
VS > VPSclamp .
Rev 1.0 / 16/03/07
Application Note
MLX81100
Power Dissipation
All terms using the index
VS I are related to chip internal voltage VS.
VS I =
VDD5V =
VS =
PS =
PS clamp =
5V supply system voltage.
supply voltage.
switchable supply voltage.
P=
PVS I =
power dissipation caused by the chip.
power dissipation caused by any load attached to chip internal power line VS.
Pchip =
power dissipation caused by the MelexCM chip and any circuit connected to VDD5V.
Preg =
power dissipation caused by VDD5V voltage regulator.
PLS X =
power dissipation caused by low side drivers when a pull-up resistor is connected to these
chip internal voltage VS.
clamped switchable supply voltage.
pins and the drivers force current down to GND.
MLX81100 application note
Author: FJE
Page 6 of 9
Rev 1.0 / 16/03/07
Application Note
MLX81100
Power Dissipation
The following schematic is a sample schematic, which needs to be adjusted depending on the application.
VBAT Ivs
VS
Ivdrv
Ivsi
VDRV
RTG
CLKO
Ivdd5v
VDD5V
HSBC2
HS2
V1V8
BRMID2
VBAT
Ips
PS
VCC
HSBC1
IO4
IO5
VCC
Isw
Temperature
sensor
SW0
SW1
SW3
SW4
SW5
SW6
SW7
IO0
IO1
IO2
IO3
LIN
LIN
GND
GND
Fig. 3
HS1
MLX81100
VCC
Hall
sensor
M
BRMID1
Ipu
LS1
LS2
SW2
GND
SHNT_L
Shunt
VBAT
Reverse
Polarity
Protection
CWD
TI0
TI1
TO
GND
GND
Sample application circuitry including current indicators
MLX81100 application note
Author: FJE
Page 7 of 9
Rev 1.0 / 16/03/07
Application Note
MLX81100
Power Dissipation
History record
Rev.
1.0
No.
1
Change
Creation
MLX81100 application note
Author: FJE
Date
16/03/07
Page 8 of 9
Rev 1.0 / 16/03/07
Application Note
MLX81100
Power Dissipation
4 Disclaimer
Devices sold by Melexis are covered by the warranty and patent indemnification provisions appearing in its
Term of Sale. Melexis makes no warranty, express, statutory, implied, or by description regarding the
information set forth herein or regarding the freedom of the described devices from patent infringement. Melexis
reserves the right to change specifications and prices at any time and without notice. Therefore, prior to
designing this product into a system, it is necessary to check with Melexis for current information. This product
is intended for use in normal commercial applications. Applications requiring extended temperature range,
unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not recommended without additional processing by Melexis for each
application.
The information furnished by Melexis is believed to be correct and accurate. However, Melexis shall not be
liable to recipient or any third party for any damages, including but not limited to personal injury, property
damage, loss of profits, loss of use, interrupt of business or indirect, special incidental or consequential
damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical
data herein. No obligation or liability to recipient or any third party shall arise or flow out of Melexis’ rendering of
technical or other services.
© 2007 Melexis NV. All rights reserved.
For the latest version of this document, go to our website at:
www.melexis.com
Or for additional information contact Melexis Direct:
Europe and Japan:
All other locations:
Phone: +32 1367 0495
E-mail: [email protected]
Phone: +1 603 223 2362
E-mail: [email protected]
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MLX81100 application note
Author: FJE
Page 9 of 9
Rev 1.0 / 16/03/07