LT3013 250mA, 4V to 80V Low Dropout Micropower Linear Regulator with PWRGD DESCRIPTION FEATURES n n n n n n n n n n n n n Wide Input Voltage Range: 4V to 80V Low Quiescent Current: 65μA Low Dropout Voltage: 400mV Output Current: 250mA No Protection Diodes Needed Adjustable Output from 1.24V to 60V 1μA Quiescent Current in Shutdown Stable with 3.3μF Output Capacitor Stable with Aluminum, Tantalum or Ceramic Capacitors Reverse-Battery Protection No Reverse Current Flow from Output to Input Thermal Limiting Thermally Enhanced 16-Lead TSSOP and 12-Pin (4mm × 3mm) DFN Package APPLICATIONS n n n n Low Current High Voltage Regulators Regulator for Battery-Powered Systems Telecom Applications Automotive Applications The LT®3013 is a high voltage, micropower low dropout linear regulator. The device is capable of supplying 250mA of output current with a dropout voltage of 400mV. Designed for use in battery-powered or high voltage systems, the low quiescent current (65μA operating and 1μA in shutdown) makes the LT3013 an ideal choice. Quiescent current is also well controlled in dropout. Other features of the LT3013 include a PWRGD flag to indicate output regulation. The delay between regulated output level and flag indication is programmable with a single capacitor. The LT3013 also has the ability to operate with very small output capacitors. The regulator is stable with only 3.3μF on the output while most older devices require between 10μF and 100μF for stability. Small ceramic capacitors can be used without any need for series resistance (ESR) as is common with other regulators. Internal protection circuitry includes reversebattery protection, current limiting, thermal limiting and reverse current protection. The device is available with an adjustable output with a 1.24V reference voltage. The LT3013 regulator is available in the thermally enhanced 16-lead TSSOP and the low profile (0.75mm), 12-pin (4mm × 3mm) DFN package, both providing excellent thermal characteristics. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Dropout Voltage TYPICAL APPLICATION 400 5V Supply with Shutdown 1μF 1.6M OUT LT3013 SHDN PWRGD GND 750k ADJ CT VOUT 5V 250mA 3.3μF 249k 3013 TA01 VSHDN <0.3V >2.0V OUTPUT OFF ON 1000pF DROPOUT VOLTAGE (mV) IN VIN 5.4V TO 80V 350 300 250 200 150 100 50 0 0 50 100 150 200 OUTPUT CURRENT (mA) 250 3013 TA02 3013fe 1 LT3013 ABSOLUTE MAXIMUM RATINGS (Note 1) IN Pin Voltage .........................................................±80V OUT Pin Voltage ......................................................±60V IN to OUT Differential Voltage .................................±80V ADJ Pin Voltage ....................................................... ±7V SHDN Pin Input Voltage ..........................................±80V CT Pin Voltage .................................................7V, –0.5V PWRGD Pin Voltage .......................................80V, –0.5V Output Short-Circuit Duration .......................... Indefinite Storage Temperature Range TSSOP Package .................................–65°C to 150°C DFN Package......................................–65°C to 125°C Operating Junction Temperature Range (Notes 3, 10, 11) LT3013E .............................................–40°C to 125°C LT3013HFE.........................................–40°C to 140°C LT3013MP..........................................–55°C to 125°C Lead Temperature (FE16 Soldering, 10 sec) ......... 300°C PIN CONFIGURATION TOP VIEW TOP VIEW GND 1 16 GND NC 1 12 NC NC 2 15 NC OUT 2 11 IN OUT 3 14 IN OUT 3 10 IN OUT 4 ADJ 5 13 ADJ 4 9 NC GND 5 8 SHDN PWRGD 6 7 CT DE PACKAGE 12-LEAD (4mm s 3mm) PLASTIC DFN 17 13 IN 12 NC GND 6 11 SHDN PWRGD 7 10 CT GND 8 9 GND FE PACKAGE 16-LEAD PLASTIC TSSOP TJMAX = 140°C, θJA = 40°C/W, θJC = 16°C/W EXPOSED PAD (PIN 17) IS GND MUST BE SOLDERED TO PCB TJMAX = 125°C, θJA = 40°C/W, θJC = 16°C/W EXPOSED PAD (PIN 13) IS GND MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LT3013EDE#PBF LT3013EDE#TRPBF 3013 12-Lead (4mm x 3mm) Plastic DFN –40°C to 125°C LT3013EFE#PBF LT3013EFE#TRPBF 3013EFE 16-Lead Plastic TSSOP –40°C to 125°C LT3013HFE#PBF LT3013HFE#TRPBF 3013HFE 16-Lead Plastic TSSOP –40°C to 140°C LT3013MPFE#PBF LT3013MPFE#TRPBF 3013MPFE 16-Lead Plastic TSSOP –55°C to 125°C LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LT3013EDE LT3013EDE#TR 3013 12-Lead (4mm x 3mm) Plastic DFN –40°C to 125°C LT3013EFE LT3013EFE#TR 3013EFE 16-Lead Plastic TSSOP –40°C to 125°C LT3013HFE LT3013HFE#TR 3013HFE 16-Lead Plastic TSSOP –40°C to 140°C LT3013MPFE LT3013MPFE#TR 3013MPFE 16-Lead Plastic TSSOP –55°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 3013fe 2 LT3013 ELECTRICAL CHARACTERISTICS (LT3013E, LT3013MP) The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. PARAMETER CONDITIONS MIN TYP 4 4.75 V 1.225 1.2 1.24 1.24 1.255 1.28 V V 0.1 5 mV 7 12 25 mV mV 160 230 300 mV mV 250 340 420 mV mV 400 490 620 mV mV 65 3 10 120 μA mA mA l Minimum Input Voltage ILOAD = 250mA ADJ Pin Voltage (Notes 2,3) VIN = 4V, ILOAD = 1mA 4.75V < VIN < 80V, 1mA < ILOAD < 250mA l Line Regulation ΔVIN = 4V to 80V, ILOAD = 1mA (Note 2) l Load Regulation (Note 2) VIN = 4.75V, ΔILOAD = 1mA to 250mA VIN = 4.75V, ΔILOAD = 1mA to 250mA l Dropout Voltage VIN = VOUT(NOMINAL) (Notes 4, 5) ILOAD = 10mA ILOAD = 10mA l ILOAD = 50mA ILOAD = 50mA l ILOAD = 250mA ILOAD = 250mA l l MAX UNITS GND Pin Current VIN = 4.75V (Notes 4, 6) ILOAD = 0mA ILOAD = 100mA ILOAD = 250mA Output Voltage Noise COUT = 10μF, ILOAD = 250mA, BW = 10Hz to 100kHz 100 ADJ Pin Bias Current (Note 7 ) 30 100 nA Shutdown Threshold VOUT = Off to On VOUT = On to Off 1.3 0.8 2 V V 0.3 0.1 2 1 μA μA 1 5 μA 90 94 % 140 250 mV 3.0 6 μA SHDN Pin Current (Note 8) VSHDN = 0V VSHDN = 6V Quiescent Current in Shutdown VIN = 6V, VSHDN = 0V PWRGD Trip Point % of Nominal Output Voltage, Output Rising PWRGD Trip Point Hysteresis % of Nominal Output Voltage PWRGD Output Low Voltage IPWRGD = 50μA l l l l 0.3 85 CT Pin Voltage Differential VCT(PWRGD High) – VCT(PWRGD Low) VIN = 7V(Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 250mA Current Limit VIN = 7V, VOUT = 0V VIN = 4.75V, ΔVOUT = –0.1V (Note 2) Reverse Output Current (Note 9) μVRMS 1.1 l CT Pin Charging Current Ripple Rejection 18 65 l % 1.6 V 75 dB 400 mA 250 VOUT = 1.24V, VIN < 1.24V (Note 2) mA 12 25 μA ELECTRICAL CHARACTERISTICS (LT3013H) The l denotes the specifications which apply over the –40°C to 140°C operating temperature range, otherwise specifications are at TJ = 25°C. PARAMETER CONDITIONS Minimum Input Voltage ILOAD = 200mA l MIN ADJ Pin Voltage (Notes 2,3) VIN = 4V, ILOAD = 1mA 4.75V < VIN < 80V, 1mA < ILOAD < 200mA l Line Regulation ΔVIN = 4V to 80V, ILOAD = 1mA (Note 2) l Load Regulation (Note 2) VIN = 4.75V, ΔILOAD = 1mA to 200mA VIN = 4.75V, ΔILOAD = 1mA to 200mA l 1.225 1.2 TYP MAX UNITS 4 4.75 V 1.24 1.24 1.255 1.28 V V 0.1 5 mV 6 12 30 mV mV 3013fe 3 LT3013 ELECTRICAL CHARACTERISTICS (LT3013H) The l denotes the specifications which apply over the –40°C to 140°C operating temperature range, otherwise specifications are at TJ = 25°C. PARAMETER CONDITIONS Dropout Voltage VIN = VOUT(NOMINAL) (Notes 4, 5) ILOAD = 10mA ILOAD = 10mA l ILOAD = 50mA ILOAD = 50mA l ILOAD = 200mA ILOAD = 200mA l GND Pin Current VIN = 4.75V (Notes 4, 6) MIN l ILOAD = 0mA ILOAD = 100mA ILOAD = 200mA l TYP MAX UNITS 160 230 320 mV mV 250 340 450 mV mV 360 490 630 mV mV 65 3 7 130 μA mA mA 18 Output Voltage Noise COUT = 10μF, ILOAD = 200mA, BW = 10Hz to 100kHz 100 ADJ Pin Bias Current (Note 7) 30 100 nA Shutdown Threshold VOUT = Off to On VOUT = On to Off 1.3 0.8 2 V V 0.3 0.1 2 1 μA μA 1 5 μA 90 95 % 140 250 mV 3.0 6 μA l l SHDN Pin Current (Note 8) VSHDN = 0V VSHDN = 6V Quiescent Current in Shutdown VIN = 6V, VSHDN = 0V PWRGD Trip Point % of Nominal Output Voltage, Output Rising PWRGD Trip Point Hysteresis % of Nominal Output Voltage PWRGD Output Low Voltage IPWRGD = 50μA l 0.3 85 1.1 l CT Pin Charging Current CT Pin Voltage Differential VCT(PWRGD High) – VCT(PWRGD Low) % 1.6 Ripple Rejection VIN = 7V(Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 200mA Current Limit VIN = 7V, VOUT = 0V VIN = 4.75V, ΔVOUT = –0.1V (Note 2) Reverse Output Current (Note 9) VOUT = 1.24V, VIN < 1.24V (Note 2) Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LT3013 is tested and specified for these conditions with the ADJ pin connected to the OUT pin. Note 3: Operating conditions are limited by maximum junction temperature. The regulated output voltage specification will not apply for all possible combinations of input voltage and output current. When operating at maximum input voltage, the output current range must be limited. When operating at maximum output current, the input voltage range must be limited. Note 4: To satisfy requirements for minimum input voltage, the LT3013 is tested and specified for these conditions with an external resistor divider (249k bottom, 649k top) for an output voltage of 4.5V. The external resistor divider will add a 5μA DC load on the output. Note 5: Dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output current. In dropout, the output voltage will be equal to (VIN – VDROPOUT). Note 6: GND pin current is tested with VIN = 4.75V and a current source load. This means the device is tested while operating close to its dropout region. This is the worst-case GND pin current. The GND pin current will decrease slightly at higher input voltages. μVRMS 65 l V 75 dB 400 mA mA 200 12 25 μA Note 7: ADJ pin bias current flows into the ADJ pin. Note 8: SHDN pin current flows out of the SHDN pin. Note 9: Reverse output current is tested with the IN pin grounded and the OUT pin forced to the rated output voltage. This current flows into the OUT pin and out the GND pin. Note 10: The LT3013E is guaranteed to meet performance specifications from 0°C to 125°C operating junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT3013H is tested to the LT3013H Electrical Characteristics table at 140°C operating junction temperature. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125°C. The LT3013MP is 100% tested and guaranteed over the –55°C to 125°C operating junction temperature range. Note 11: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C (LT3013E, LT3013MP) or 140°C (LT3013H) when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. 3013fe 4 LT3013 TYPICAL PERFORMANCE CHARACTERISTICS Typical Dropout Voltage Guaranteed Dropout Voltage 600 400 TJ = 25°C 300 200 100 TJ ≤ 125°C 500 500 400 TJ ≤ 25°C 300 200 100 100 150 200 OUTPUT CURRENT (mA) 0 250 IL = 100mA 400 300 IL = 50mA IL = 10mA 200 0 50 0 IL = 250mA IL = 1mA 100 50 100 200 150 OUTPUT CURRENT (mA) 0 –50 –25 250 0 25 50 75 100 125 150 TEMPERATURE (°C) 3013 G02 3013 G01 Quiescent Current 3013 G03 ADJ Pin Voltage 120 1.260 VIN = 6V RL = ∞ 100 IL = 0 IL = 1mA 1.255 VSHDN = VIN ADJ PIN VOLTAGE (V) 0 = TEST POINTS Dropout Voltage 600 DROPOUT VOLTAGE (mV) TJ = 125°C QUIESCENT CURRENT (μA) DROPOUT VOLTAGE (mV) 500 GUARANTEED DROPOUT VOLTAGE (mV) 600 80 60 40 20 1.250 1.245 1.240 1.235 1.230 1.225 VSHDN = GND 0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3013 G04 1.220 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3013 G05 3013fe 5 LT3013 TYPICAL PERFORMANCE CHARACTERISTICS Quiescent Current 60 QUIESCENT CURRENT (μA) TJ = 25°C RL = ∞ 70 QUIESCENT CURRENT (μA) Quiescent Current VSHDN = VIN 50 40 30 20 10 TJ = 25°C 225 RL = ∞ VOUT = 1.24V 200 150 1 2 VSHDN = VIN 125 100 75 VSHDN = GND 50 3 4 5 6 7 INPUT VOLTAGE (V) 8 9 10 0 10 20 30 40 50 60 INPUT VOLTAGE (V) 70 GND PIN CURRENT (mA) GND PIN CURRENT (mA) 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 9 10 3013 G07 VIN = 4.75V 9 TJ = 25°C 6 5 RL = 12.4Ω IL = 100mA* 2 8 7 6 5 4 3 2 1 0 0 GND Pin Current vs ILOAD RL = 4.96Ω IL = 250mA* 3 RL = 1.24k IL = 1mA* 10 TJ = 25°C, *FOR VOUT = 1.24V 4 0.4 3013 G06b 9 7 RL = 124Ω IL = 10mA* 0.6 0 80 GND Pin Current 8 RL = 49.6Ω IL = 25mA* 0.8 0.2 3013 G06 10 TJ = 25°C *FOR VOUT = 1.24V 1.0 175 0 0 1.2 25 VSHDN = GND 0 GND Pin Current 250 GND PIN CURRENT (mA) 80 1 RL = 24.8Ω, IL = 50mA* 0 1 2 3 4 5 6 7 INPUT VOLTAGE (V) 8 9 10 3013 G08 0 0 50 100 150 200 LOAD CURRENT (mA) 250 3013 G09 3013fe 6 LT3013 TYPICAL PERFORMANCE CHARACTERISTICS SHDN Pin Threshold 0.6 0.6 SHDN PIN CURRENT (μA) 1.6 OFF-TO-ON 1.4 1.2 1.0 ON-TO-OFF 0.8 0.6 0.4 SHDN PIN CURRENT (μA) TJ = 25°C CURRENT FLOWS 0.5 OUT OF SHDN PIN 1.8 0.4 0.3 0.2 0.1 VIN = 6V VSHDN = 0V 0.5 CURRENT FLOWS OUT OF SHDN PIN 0.4 0.3 0.2 0.1 0.2 0 –50 –25 0 0 25 50 75 100 125 150 TEMPERATURE (°C) 0 3013 G10 0.5 1.0 2.0 1.5 2.5 SHDN PIN VOLTAGE (V) 3.0 ADJ Pin Bias Current PWRGD TRIP POINT (% OF OUTPUT VOLTAGE) 80 60 40 20 0 0 25 50 75 100 125 150 TEMPERATURE (°C) 3013 G12 PWRGD Trip Point 100 0 –50 –25 0 –50 –25 3013 G11 120 ADJ PIN BIAS CURRENT (nA) SHDN PIN THRESHOLD (V) SHDN Pin Current SHDN Pin Current 2.0 25 50 75 100 125 150 TEMPERATURE (°C) 3013 G13 95 94 93 92 91 OUTPUT RISING 90 89 OUTPUT FALLING 88 87 86 85 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3013 G25 3013fe 7 LT3013 TYPICAL PERFORMANCE CHARACTERISTICS PWRGD Output Low Voltage CT Charging Current 4.0 IPWRGD = 50μA 180 CT Comparator Thresholds 2.0 PWRGD TRIPPED HIGH 160 140 120 100 80 60 40 CT COMPARATOR THRESHOLDS (V) 3.5 CT CHARGING CURRENT (μA) PWRGD OUTPUT LOW VOLTAGE (mV) 200 3.0 2.5 2.0 1.5 1.0 0.5 20 0 –50 –25 0 0 –50 –25 25 50 75 100 125 150 TEMPERATURE (°C) 3013 G26 0 1.4 1.2 1.0 0.8 0.6 0.4 VCT (LOW) 0.2 0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3013 G28 3013 G27 Current Limit 700 VOUT = 0V 900 1.6 25 50 75 100 125 150 TEMPERATURE (°C) Current Limit 1000 VCT (HIGH) 1.8 600 CURRENT LIMIT (mA) CURRENT LIMIT (mA) 800 TJ = 25°C 700 600 TJ = 125°C 500 400 300 500 400 300 200 200 100 100 0 0 10 20 30 40 50 60 INPUT VOLTAGE (V) 70 80 3013 G14 VIN = 7V VOUT = 0V 0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3013 G15 3013fe 8 LT3013 TYPICAL PERFORMANCE CHARACTERISTICS Reverse Output Current Reverse Output Current 120 140 120 CURRENT FLOWS INTO OUTPUT PIN 100 ADJ PIN CLAMP (SEE APPLICATIONS INFORMATION) 80 60 40 Input Ripple Rejection 92 VIN = 0V VOUT = VADJ = 1.24V 88 100 RIPPLE REJECTION (dB) REVERSE OUTPUT CURRENT (μA) TJ = 25°C 180 VIN = 0V VOUT = VADJ 160 80 60 40 20 0 1 2 3 4 5 6 7 8 OUTPUT VOLTAGE (V) 9 0 –50 –25 10 0 25 50 75 100 125 150 TEMPERATURE (°C) Input Ripple Rejection 5.0 VIN = 4.75V + 50mVRMS RIPPLE 90 ILOAD = 250mA 4.5 80 70 60 COUT = 10μF 40 30 20 COUT = 3.3μF 10 100 72 68 VIN = 4.75V + 0.5VP-P RIPPLE AT f = 120Hz IL = 250mA VOUT = 1.24V 60 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3013 G18 1k 10k FREQUENCY (Hz) 100k ILOAD = 250mA 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 10 76 Minimum Input Voltage 100 50 80 3013 G17 3013 G16 MINIMUM INPUT VOLTAGE (V) 0 84 64 20 RIPPLE REJECTION (dB) REVERSE OUTPUT CURRENT (μA) 200 1M 3013 G19 0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3013 G20 3013fe 9 LT3013 TYPICAL PERFORMANCE CHARACTERISTICS LOAD REGULATION (mV) –2 Output Noise Spectral Density OUTPUT NOISE SPECTRAL DENSITY (μV/√Hz) Load Regulation 0 ΔIL = 1mA TO 250mA –4 –6 –8 –10 –12 –14 –16 –18 –20 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 10 COUT = 3.3μF ILOAD = 250mA 1 0.1 0.01 10 100 1k 10k FREQUENCY (Hz) 100k 3013 G21 10Hz to 100kHz Output Noise Transient Response VOUT 100μV/DIV COUT = 10μF IL = 250mA VOUT = 1.24V 1ms/DIV 3013 G23 LOAD CURRENT (mA) OUTPUT VOLTAGE DEVIATION (V) 0.15 0.10 0.05 0 –0.05 VIN = 6V VOUT = 5V CIN = 3.3μF CERAMIC COUT = 3.3μF CERAMIC ΔILOAD = 100mA TO 200mA –0.10 –0.15 300 200 100 0 0 100 300 200 TIME (μs) 400 500 3013 G24 3013fe 10 LT3013 PIN FUNCTIONS (DFN Package)/(TSSOP Package) NC (Pins 1, 9, 12)/(Pins 2, 12, 15): No Connect. These pins have no internal connection; connecting NC pins to a copper area for heat dissipation provides a small improvement in thermal performance. OUT (Pins 2, 3)/(Pins 3, 4): Output. The output supplies power to the load. A minimum output capacitor of 3.3μF is required to prevent oscillations. Larger output capacitors will be required for applications with large transient loads to limit peak voltage transients. See the Applications Information section for more information on output capacitance and reverse output characteristics. ADJ (Pin 4)/(Pin 5): Adjust. This is the input to the error amplifier. This pin is internally clamped to ±7V. It has a bias current of 30nA which flows into the pin (see curve of ADJ Pin Bias Current vs Temperature in the Typical Performance Characteristics). The ADJ pin voltage is 1.24V referenced to ground, and the output voltage range is 1.24V to 60V. GND (Pins 5, 13)/(Pins 1, 6, 8, 9, 16, 17): Ground. The exposed backside of the package is an electrical connection for GND. As such, to ensure optimum device operation and thermal performance, the exposed pad must be connected directly to Pin 5/Pin 6 on the PC board. PWRGD (Pin 6)/(Pin 7): Power Good. The PWRGD flag is an open collector flag to indicate that the output voltage has come up to above 90% of the nominal output voltage. There is no internal pull-up on this pin; a pull-up resistor must be used. The PWRGD pin will change state from an open-collector to high impedance after both the output is above 90% of the nominal voltage and the capacitor on the CT pin has charged through a 1.6V differential. The maximum pull-down current of the PWRGD pin in the low state is 50μA. SHDN (Pin 8)/(Pin 11): Shutdown. The SHDN pin is used to put the LT3013 into a low power shutdown state. The output will be off when the SHDN pin is pulled low. The SHDN pin can be driven either by 5V logic or open-collector logic with a pull-up resistor. The pull-up resistor is only required to supply the pull-up current of the open-collector gate, normally several microamperes. If unused, the SHDN pin must be tied to a logic high or VIN. CT (Pin 7)/(Pin 10): Timing Capacitor. The CT pin allows the use of a small capacitor to delay the timing between the point where the output crosses the PWRGD threshold and the PWRGD flag changes to a high impedance state. Current out of this pin during the charging phase is 3μA. The voltage difference between the PWRGD low and PWRGD high states is 1.6V (see the Applications Information Section). IN (Pins 10, 11)/(Pins 13,14): Input. Power is supplied to the device through the IN pin. A bypass capacitor is required on this pin if the device is more than six inches away from the main input filter capacitor. In general, the output impedance of a battery rises with frequency, so it is advisable to include a bypass capacitor in battery-powered circuits. A bypass capacitor in the range of 1μF to 10μF is sufficient. The LT3013 is designed to withstand reverse voltages on the IN pin with respect to ground and the OUT pin. In the case of a reversed input, which can happen if a battery is plugged in backwards, the LT3013 will act as if there is a diode in series with its input. There will be no reverse current flow into the LT3013 and no reverse voltage will appear at the load. The device will protect both itself and the load. 3013fe 11 LT3013 APPLICATIONS INFORMATION The LT3013 is a 250mA high voltage low dropout regulator with micropower quiescent current and shutdown. The device is capable of supplying 250mA at a dropout voltage of 400mV. The low operating quiescent current (65μA) drops to 1μA in shutdown. In addition to the low quiescent current, the LT3013 incorporates several protection features which make it ideal for use in battery-powered systems. The device is protected against both reverse input and reverse output voltages. In battery backup applications where the output can be held up by a backup battery when the input is pulled to ground, the LT3013 acts like it has a diode in series with its output and prevents reverse current flow. Adjustable Operation The LT3013 has an output voltage range of 1.24V to 60V. The output voltage is set by the ratio of two external resistors as shown in Figure 1. The device servos the output to maintain the voltage at the adjust pin at 1.24V referenced to ground. The current in R1 is then equal to 1.24V/R1 and the current in R2 is the current in R1 plus the ADJ pin bias current. The ADJ pin bias current, 30nA at 25°C, flows through R2 into the ADJ pin. The output voltage can be calculated using the formula in Figure 1. The value of R1 should be less than 250k to minimize errors in the output voltage caused by the ADJ pin bias current. VOUT = 1.24V 1 + R2 + (IADJ)(R2) R1 VADJ = 1.24V IADJ = 30nA AT 25°C OUTPUT RANGE = 1.24V TO 60V Note that in shutdown the output is turned off and the divider current will be zero. The adjustable device is tested and specified with the ADJ pin tied to the OUT pin and a 5μA DC load (unless otherwise specified) for an output voltage of 1.24V. Specifications for output voltages greater than 1.24V will be proportional to the ratio of the desired output voltage to 1.24V; (VOUT/1.24V). For example, load regulation for an output current change of 1mA to 250mA is –7mV typical at VOUT = 1.24V. At VOUT = 12V, load regulation is: (12V/1.24V) • (–7mV) = –68mV Output Capacitance and Transient Response The LT3013 is designed to be stable with a wide range of output capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. A minimum output capacitor of 3.3μF with an ESR of 3Ω or less is recommended to prevent oscillations. The LT3013 is a micropower device and output transient response will be a function of output capacitance. Larger values of output capacitance decrease the peak deviations and provide improved transient response for larger load current changes. Bypass capacitors, used to decouple individual components powered by the LT3013, will increase the effective output capacitor value. IN VIN OUT LT3013 R2 + VOUT ADJ GND R1 3013 F01 Figure 1. Adjustable Operation 3013fe 12 LT3013 APPLICATIONS INFORMATION Extra consideration must be given to the use of ceramic capacitors. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. The most common dielectrics used are specified with EIA temperature characteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are good for providing high capacitances in a small package, but they tend to have strong voltage and temperature coefficients as shown in Figures 2 and 3. When used with a 5V regulator, a 16V 10μF Y5V capacitor can exhibit an effective value as low as 1μF to 2μF for the DC bias voltage applied and over the operating temperature range. The X5R and X7R dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. The X7R type has better stability across temperature, while the X5R is less expensive and is available in higher values. Care still must be exercised when using X5R and X7R capacitors; the X5R and X7R codes only specify operating temperature range and maximum capacitance change over temperature. Capacitance change due to DC bias with X5R and X7R capacitors is better than Y5V and Z5U capacitors, but can still be significant enough to drop capacitor values below appropriate levels. Capacitor DC bias characteristics tend to improve as component case size increases, but expected capacitance at operating voltage should be verified. 20 Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a piezoelectric response. A piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor the stress can be induced by vibrations in the system or thermal transients. PWRGD Flag and Timing Capacitor Delay The PWRGD flag is used to indicate that the ADJ pin voltage is within 10% of the regulated voltage. The PWRGD pin is an open-collector output, capable of sinking 50μA of current when the ADJ pin voltage is low. There is no internal pull-up on the PWRGD pin; an external pull-up resistor must be used. When the ADJ pin rises to within 10% of its final reference value, a delay timer is started. At the end of this delay, programmed by the value of the capacitor on the CT pin, the PWRGD pin switches to a high impedance and is pulled up to a logic level by an external pull-up resistor. To calculate the capacitor value on the CT pin, use the following formula: ICT • tDELAY C TIME = VCT (HIGH) – VCT (LOW) 40 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10μF 20 X5R CHANGE IN VALUE (%) CHANGE IN VALUE (%) 0 –20 –40 –60 Y5V –80 –100 0 X5R –20 –40 –80 0 2 4 8 6 10 12 DC BIAS VOLTAGE (V) 14 16 3013 F02 Figure 2. Ceramic Capacitor DC Bias Characteristics Y5V –60 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10μF –100 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 3013 F03 Figure 3. Ceramic Capacitor Temperature Characteristics 3013fe 13 LT3013 APPLICATIONS INFORMATION Figure 4 shows a block diagram of the PWRGD circuit. At startup, the timing capacitor is discharged and the PWRGD pin will be held low. As the output voltage increases and the ADJ pin crosses the 90% threshold, the JK flip-flop is reset, and the 3μA current source begins to charge the timing capacitor. Once the voltage on the CT pin reaches the VCT(HIGH) threshold (approximately 1.7V at 25°C), the capacitor voltage is clamped and the PWRGD pin is set to a high impedance state. Thermal Considerations During normal operation, an internal glitch filter will ignore short transients (<15μs). Longer transients below the 90% threshold will reset the JK flip-flop. This flip-flop ensures that the capacitor on the CT pin is quickly discharged all the way to the VCT(LOW) threshold before re-starting the time delay. This provides a consistent time delay after the ADJ pin is within 10% of the regulated voltage before the PWRGD pin switches to high impedance. 2. GND pin current multiplied by the input voltage: IGND • VIN. The power handling capability of the device will be limited by the maximum rated junction temperature (125°C for LT3013E, LT3013MP or 140°C for LT3013HFE). The power dissipated by the device will be made up of two components: 1. Output current multiplied by the input/output voltage differential: IOUT • (VIN – VOUT) and, The GND pin current can be found by examining the GND Pin Current curves in the Typical Performance Characteristics. Power dissipation will be equal to the sum of the two components listed above. The LT3013 has internal thermal limiting designed to protect the device during overload conditions. For continuous normal conditions the maximum junction temperature rating of 125°C (E-grade, MP-grade) or 140°C (H-grade)must not be exceeded. It is important to give careful consideration to all sources of thermal resistance from junction to ambient. Additional heat sources mounted nearby must also be considered. ICT 3μA CT ADJ + J VREF • 90% PWRGD – VCT(HIGH) – VBE (~1.1V) Q K – VCT(LOW) ~0.1V + 3013 F04 Figure 4. PWRGD Circuit Block Diagram 3013fe 14 LT3013 APPLICATIONS INFORMATION For surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the PC board and its copper traces. Copper board stiffeners and plated through-holes can also be used to spread the heat generated by power devices. The following tables list thermal resistance for several different board sizes and copper areas. All measurements were taken in still air on 3/32” FR-4 board with one ounce copper. Table 1. TSSOP Measured Thermal Resistance COPPER AREA TOPSIDE BOARD AREA THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 2500 sq mm 2500 sq mm 40°C/W 1000 sq mm 2500 sq mm 45°C/W 225 sq mm 2500 sq mm 50°C/W 100 sq mm 2500 sq mm 62°C/W Table 2. DFN Measured Thermal Resistance COPPER AREA TOPSIDE BOARD AREA THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 2500 sq mm 2500 sq mm 40°C/W 1000 sq mm 2500 sq mm 45°C/W 225 sq mm 2500 sq mm 50°C/W 100 sq mm 2500 sq mm 62°C/W The thermal resistance junction-to-case (θJC), measured at the exposed pad on the back of the die, is 16°C/W. Continuous operation at large input/output voltage differentials and maximum load current is not practical due to thermal limitations. Transient operation at high input/output differentials is possible. The approximate thermal time constant for a 2500sq mm 3/32” FR-4 board with maximum topside and backside area for one ounce copper is three seconds. This time constant will increase as more thermal mass is added (i.e., vias, larger board, and other components). For an application with transient high power peaks, average power dissipation can be used for junction temperature calculations if the pulse period is significantly less than the thermal time constant of the device and board. Calculating Junction Temperature Example 1: Given an output voltage of 5V, an input voltage range of 8V to 12V, an output current range of 0mA to 250mA, and a maximum ambient temperature of 30°C, what will the maximum junction temperature be? The power dissipated by the device will be equal to: IOUT(MAX) • (VIN(MAX) – VOUT) + (IGND • VIN(MAX)) where: IOUT(MAX) = 250mA VIN(MAX) = 12V IGND at (IOUT = 250mA, VIN = 12V) = 8mA So: P = 250mA • (12V – 5V) + (8mA • 12V) = 1.85W The thermal resistance will be in the range of 40°C/W to 62°C/W depending on the copper area. So the junction temperature rise above ambient will be approximately equal to: 1.85W • 50°C/W = 92.3°C The maximum junction temperature will then be equal to the maximum junction temperature rise above ambient plus the maximum ambient temperature or: TJMAX = 30°C + 92.3°C = 122.3°C Example 2: Given an output voltage of 5V, an input voltage of 48V that rises to 72V for 5ms(max) out of every 100ms, and a 5mA load that steps to 200mA for 50ms out of every 250ms, what is the junction temperature rise above ambient? Using a 500ms period (well under the time constant of the board), power dissipation is as follows: P1(48V in, 5mA load) = 5mA • (48V – 5V) + (200μA • 48V) = 0.23W P2(48V in, 50mA load) = 200mA • (48V – 5V) + (8mA • 48V) = 8.98W P3(72V in, 5mA load) = 5mA • (72V – 5V) + (200μA • 72V) = 0.35W P4(72V in, 50mA load) = 200mA • (72V – 5V) + (8mA • 72V) = 13.98W 3013fe 15 LT3013 APPLICATIONS INFORMATION Operation at the different power levels is as follows: 76% operation at P1, 19% for P2, 4% for P3, and 1% for P4. PEFF = 76%(0.23W) + 19%(8.98W) + 4%(0.35W) + 1%(13.98W) = 2.03W With a thermal resistance in the range of 40°C/W to 62°C/W, this translates to a junction temperature rise above ambient of 81°C to 125°C. High Temperature Operation Care must be taken when designing LT3013 applications to operate at high ambient temperatures. The LT3013 works at elevated temperatures but erratic operation can occur due to unforeseen variations in external components. Some tantalum capacitors are available for high temperature operation, but ESR is often several ohms; capacitor ESR above 3Ω is unsuitable for use with the LT3013. Ceramic capacitor manufacturers (Murata, AVX, TDK, and Vishay Vitramon at this writing) now offer ceramic capacitors that are rated to 150°C using an X8R dielectric. Device instability will occur if output capacitor value and ESR are outside design limits at elevated temperature and operating DC voltage bias (see information on capacitor characteristics under Output Capacitance and Transient Response). Check each passive component for absolute value and voltage ratings over the operating temperature range. Leakages in capacitors or from solder flux left after insufficient board cleaning adversely affects low quiescent current operation. The output voltage resistor divider should use a maximum bottom resistor value of 124k to compensate for high temperature leakage, setting divider current to 10μA. Consider junction temperature increase due to power dissipation in both the junction and nearby components to ensure maximum specifications are not violated for the device or external components. Protection Features The LT3013 incorporates several protection features which make it ideal for use in battery-powered circuits. In addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device is protected against reverse-input voltages, and reverse voltages from output to input. Current limit protection and thermal overload protection are intended to protect the device against current overload conditions at the output of the device. For normal operation, the junction temperature should not exceed 125°C (LT3013E, LT3013MP) or 140°C (LT3013HFE). Like many IC power regulators, the LT3013 has safe operating area protection. The safe area protection decreases the current limit as input voltage increases and keeps the power transistor inside a safe operating region for all values of input voltage. The protection is designed to provide some output current at all values of input voltage up to the device breakdown. The SOA protection circuitry for the LT3013 uses a current generated when the input voltage exceeds 25V to decrease current limit. This current shows up as additional quiescent current for input voltages above 25V. This increase in quiescent current occurs both in normal operation and in shutdown (see curve of Quiescent Current in the Typical Performance Characteristics). The input of the device will withstand reverse voltages of 80V. No negative voltage will appear at the output. The device will protect both itself and the load. This provides protection against batteries which can be plugged in backward. The ADJ pin of the device can be pulled above or below ground by as much as 7V without damaging the device. If the input is left open-circuit or grounded, the ADJ pin will act like an open-circuit when pulled below ground, and like a large resistor (typically 100k) in series with a diode when pulled above ground. If the input is powered by a voltage source, pulling the ADJ pin below the reference voltage will cause the device to current limit. This will cause the output to go to a unregulated high voltage. Pulling the ADJ pin above the reference voltage will turn off all output current. 3013fe 16 LT3013 APPLICATIONS INFORMATION In situations where the ADJ pin is connected to a resistor divider that would pull the ADJ pin above its 7V clamp voltage if the output is pulled high, the ADJ pin input current must be limited to less than 5mA. For example, a resistor divider is used to provide a regulated 1.5V output from the 1.24V reference when the output is forced to 60V. The top resistor of the resistor divider must be chosen to limit the current into the ADJ pin to less than 5mA when the ADJ pin is at 7V. The 53V difference between the OUT and ADJ pins divided by the 5mA maximum current into the ADJ pin yields a minimum top resistor value of 10.6k. In circuits where a backup battery is required, several different input/output conditions can occur. The output voltage may be held up while the input is either pulled to ground, pulled to some intermediate voltage, or is left open-circuit. Current flow back into the output will follow the curve shown in Figure 5. The rise in reverse output current above 7V occurs from the breakdown of the 7V clamp on the ADJ pin. With a resistor divider on the regulator output, this current will be reduced depending on the size of the resistor divider. When the IN pin of the LT3013 is forced below the OUT pin or the OUT pin is pulled above the IN pin, input current will typically drop to less than 2μA. This can happen if the input of the LT3013 is connected to a discharged (low voltage) battery and the output is held up by either a backup battery or a second regulator circuit. The state of the SHDN pin will have no effect on the reverse output current when the output is pulled above the input. REVERSE OUTPUT CURRENT (μA) 200 TJ = 25°C 180 VIN = 0V VOUT = VADJ 160 140 120 CURRENT FLOWS INTO OUTPUT PIN 100 80 ADJ PIN CLAMP (SEE ABOVE) 60 40 20 0 0 1 2 3 4 5 6 7 8 OUTPUT VOLTAGE (V) 9 10 3013 F05 Figure 5. Reverse Output Current 3013fe 17 LT3013 TYPICAL APPLICATIONS 5V Buck Converter with Low Current Keep Alive Backup D2 D1N914 6 4 C3 4.7μF 100V CERAMIC BOOST VIN SW 2 Buck Converter Efficiency vs Load Current L1† 15μH VOUT 5V 1A/250mA D1 10MQ060N LT1766 100 14 SHDN BIAS SYNC FB GND R1 15.4k 12 + R2 4.99k VC C1 100μF 10V SOLID TANTALUM CC 1nF 14 LOW HIGH 100k VIN = 10V 10 1, 8, 9, 16 11 OPERATING CURRENT VOUT = 5V L = 68μH 90 15 EFFICIENCY (%) VIN 5.5V* TO 60V C2 0.33μF IN OUT 11 7 SHDN ADJ PWRGD GND 5 50 3013 TA03 750k 249k CT 1 70 60 3 LT3013 VIN = 42V 80 0 0.25 * FOR INPUT VOLTAGES BELOW 7.5V, SOME RESTRICTIONS MAY APPLY † INCREASE L1 TO 30μH FOR LOAD CURRENTS ABOVE 0.6A AND TO 60μH ABOVE 1A 0.75 1.00 0.50 LOAD CURRENT (A) 1.25 3013 TA04 10 1000pF LT3013 Automotive Application VIN 12V (LATER 42V) IN + 1μF NO PROTECTION DIODE NEEDED! OUT LT3013 SHDN 750k 3.3μF ADJ GND LOAD: CLOCK, SECURITY SYSTEM ETC 249k OFF ON LT3013 Telecom Application VIN 48V (72V TRANSIENT) IN 1μF OUT LT3013 SHDN ADJ GND OFF ON 750k NO PROTECTION DIODE NEEDED! + 3.3μF LOAD: SYSTEM MONITOR ETC – BACKUP BATTERY 249k 3013 TA05 3013fe 18 LT3013 PACKAGE DESCRIPTION DE Package 12-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1695) 4.00 ±0.10 (2 SIDES) 7 0.65 ±0.05 3.50 ±0.05 1.70 ±0.05 2.20 ±0.05 (2 SIDES) R = 0.115 TYP 0.38 ± 0.10 12 R = 0.20 TYP 1.70 ± 0.10 (2 SIDES) 3.00 ±0.10 (2 SIDES) PIN 1 TOP MARK (NOTE 6) PACKAGE OUTLINE PIN 1 NOTCH (UE12/DE12) DFN 0603 3.30 ±0.05 (2 SIDES) 6 0.25 ± 0.05 0.75 ±0.05 0.200 REF 0.25 ± 0.05 0.50 BSC 3.30 ±0.10 (2 SIDES) 0.00 – 0.05 1 0.50 BSC BOTTOM VIEW—EXPOSED PAD RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING PROPOSED TO BE A VARIATION OF VERSION (WGED) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE FE Package 16-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663) Exposed Pad Variation BB 4.90 – 5.10* (.193 – .201) 3.58 (.141) 3.58 (.141) 16 1514 13 12 1110 6.60 ±0.10 9 2.94 (.116) 4.50 ±0.10 2.94 6.40 (.116) (.252) BSC SEE NOTE 4 0.45 ±0.05 1.05 ±0.10 0.65 BSC 1 2 3 4 5 6 7 8 RECOMMENDED SOLDER PAD LAYOUT 4.30 – 4.50* (.169 – .177) 0.09 – 0.20 (.0035 – .0079) 0.50 – 0.75 (.020 – .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE 0.25 REF 1.10 (.0433) MAX 0° – 8° 0.65 (.0256) BSC 0.195 – 0.30 (.0077 – .0118) TYP 0.05 – 0.15 (.002 – .006) FE16 (BB) TSSOP 0204 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 3013fe Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19 LT3013 TYPICAL APPLICATION Constant Brightness for Indicator LED over Wide Input Voltage Range RETURN IN 1μF OUT LT3013 SHDN OFF ON GND –48V CAN VARY FROM –4V TO –80V –48V ILED = 1.24V/RSET 3.3μF ADJ RSET 3013 TA06 RELATED PARTS PART NUMBER DESCRIPTION LT1020 125mA, Micropower Regulator and Comparator VIN: 4.5V to 36V, VOUT(MIN) = 2.5V, VDO = 0.4V, IQ = 40μA, ISD = 40μA, Comparator and Reference, Class B Outputs, S16, PDIP14 Packages 125mA, Micropower Regulator and Comparator VIN: 4.5V to 36V, VOUT(MIN) = 2.5V, VDO = 0.4V, IQ = 40μA, ISD = 10μA, Comparator and Reference, Logic Shutdown, Ref Sources and Sinks 2/4mA, S8, N8 Packages 150mA, Micropower, LDO VIN: 4.2V to 30/36V, VOUT(MIN) = 3.75V, VDO = 0.42V, IQ = 30μA, ISD = 16μA, Reverse Battery Protection, SOT-223, S8, Z Packages 700mA, Micropower, LDO VIN: 4.2V to 30V, VOUT(MIN) = 3.75V, VDO = 0.4V, IQ = 50μA, ISD = 16μA, DD, S0T-223, S8,TO220-5, TSSOP20 Packages VIN: 7.4V to 60V, VOUT(MIN) = 1.24V, IQ = 3.2mA, ISD = 2.5μA, S8 Package 60V, 440mA (IOUT), 100kHz, High Efficiency Step-Down DC/DC Converter 100mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.3V, IQ = 20μA, ISD = <1μA, Low Noise < 20μVRMS, Stable with 1μF Ceramic Capacitors, ThinSOTTM Package 150mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.3V, IQ = 25μA, ISD = <1μA, Low Noise < 20μVRMS, MS8 Package 500mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.3V, IQ = 30μA, ISD = <1μA, Low Noise < 20μVRMS, S8 Package 3A, Low Noise, Fast Transient Response, LDO VIN: 2.7V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD = <1μA, Low Noise < 40μVRMS, “A” Version Stable with Ceramic Capacitors, DD, TO220-5 Packages VIN: 5.5V to 60V, VOUT(MIN) = 1.2V, IQ = 2.5mA, ISD = 25μA, TSSOP16/E Package 60V, 1.2A (IOUT), 200kHz, High Efficiency Step-Down DC/DC Converter VIN: 7.4V to 40V, VOUT(MIN) = 1.24V, IQ = 3.2mA, ISD = 30μA, N8, S8 Packages 40V, 550mA (IOUT), 200kHz, High Efficiency Step-Down DC/DC Converter 300mA/60mA, (IOUT), Constant Off-Time, High 90% Efficiency, VIN: 3.2V to 34V, VOUT(MIN) = 1.25V, IQ = 14μA, ISD = <1μA, Efficiency Step-Down DC/DC Converter ThinSOT Package 60V, 1.2A (IOUT), 500kHz, High Efficiency VIN: 5.5V to 60V, VOUT(MIN) = 1.2V, IQ = 2.5mA, ISD = 25μA, TSSOP16/E Package Step-Down DC/DC Converter 300mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, VOUT(MIN) = 1.22V, VDO = 0.27V, IQ = 30μA, ISD = <1μA, Low Noise < 20μVRMS, MS8 Package 1.5A, Low Noise, Fast Transient Response, LDO VIN: 2.1V to 20V, VOUT(MIN) = 1.21V, VDO = 0.34V, IQ = 1mA, ISD = <1μA, Low Noise < 40μVRMS, “A” Version Stable with Ceramic Capacitors, DD, TO220-5, S0T-223, S8 Packages 200mA, Low Noise Micropower, Negative LDO VIN: –1.9V to –20V, VOUT(MIN) = –1.21V, VDO = 0.34V, IQ = 30μA, ISD = 3μA, Low Noise < 30μVRMS, Stable with Ceramic Capacitors, ThinSOT Package LT1120/LT1120A LT1121/LT1121HV LT1129 LT1676 LT1761 LT1762 LT1763 LT1764/LT1764A LT1766 LT1776 LT1934/LT1934-1 LT1956 LT1962 LT1963/LT1963A LT1964 COMMENTS LT3010/LT3010H 50mA, 3V to 80V, Low Noise Micropower LDO LT3012/LT3012H 250mA, 4V to 80V, Low Dropout Micropower Linear Regulator 20mA, 3V to 80V, Low Dropout Micropower Linear Regulator LT3014/HV VIN: 3V to 8V, VOUT(MIN) = 1.275V, VDO = 0.3V, IQ = 30μA, ISD = 1μA, Low Noise < 100μVRMS, MS8E Package, H Grade = +140°C TJMAX VIN: 4V to 80V, VOUT: 1.24V to 60V, VDO = 0.4V, IQ = 40μA, ISD = <1μA, TSSOP-16E and 4mm × 3mm DFN-12 Packages, H Grade = +140°C TJMAX VIN: 3V to 80V (100V for 2ms, HV version), VOUT: 1.22V to 60V, VDO = 0.35V, IQ = 7μA, ISD = <1μA, ThinSOT and 3mm × 3mm DFN-8 Packages ThinSOT is a trademark of Linear Technology Corporation. 3013fe 20 Linear Technology Corporation LT 0209 REV E • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2005