LT3066 Series 45V VIN, 500mA Low Noise, Linear Regulator with Programmable Current Limit and Active Output Discharge Description Features Input Voltage Range: 1.8V to 45V nn Output Current: 500mA nn Active Output Discharge nn Dropout Voltage: 300mV nn Programmable Precision Current Limit: ±10% nn Power Good Flag nn Input Filtering for High PSRR nn Low Noise: 25µV RMS (10Hz to 100kHz) nn Adjustable Output (V REF = VOUT(MIN) = 600mV) nn Output Tolerance: ±2% Over Line, Load and Temperature nn Stable with Low ESR, Ceramic Output Capacitors (3.3µF Minimum) nn Single Capacitor Soft-Starts Reference and Lowers Output Noise nn Current Limit Foldback Protection nn Shutdown Current: <3µA nn Reverse Battery and Thermal Limit Protection nn 12-Lead 4mm × 3mm DFN and 12-lead MSOP Packages nn Applications Battery-Powered Systems Automotive Power Supplies nn Industrial Power Supplies nn Avionic Power Supplies nn Portable Instruments nn nn The LT®3066 series are micropower, low noise, low dropout voltage (LDO) linear regulators that operate over a 1.8V to 45V input voltage range. The devices supply 500mA of output current with a typical dropout voltage of 300mV. A single external capacitor provides programmable low noise reference performance and output soft-start functionality. A single external resistor programs the LT3066’s current limit, accurate to ±10% over a wide input voltage and temperature range. A PWRGD flag indicates output regulation. The LT3066 features an NMOS pull-down that discharges the output if SHDN or IN is driven low. The LT3066 optimizes stability and transient response with low ESR ceramic capacitors, requiring a minimum of 3.3µF. Internal protection circuitry includes current limiting with foldback, thermal limiting, reverse battery protection, reverse current protection and reverse output protection. The LT3066 is available in fixed output voltages of 3.3V and 5V, and as an adjustable device with an output voltage range from 0.6V to 19V. The device is offered in the thermally-enhanced 12-lead 4mm × 3mm DFN and MSOP packages. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. U.S. Patents, including 8159278. Typical Application Output Discharge vs VOUT CREF/BYP = 1nF 3.3V Supply with 497mA Precision Current Limit IN 5V IN 10µF OUT SHDN 500k 10µF SENSE OUT 3.3V 500mA INFILT 0.47µF 5.0V 3.3V 1V/DIV 2.0V LT3066-3.3 1.2V PWRGD IMAX 604Ω 22nF SHDN: 0 TO 2V REF/BYP GND 3066 TA01a 1ms/DIV 1nF 3066 TA01b VIN = VOUT +1V COUT = 10µF IFB-DIVIDER = 10µA 3066fa For more information www.linear.com/LT3066 1 LT3066 Series Absolute Maximum Ratings (Note 1) IN Pin Voltage..........................................................±50V OUT Pin Voltage............................................... +20V, –1V Input-to-Output Differential Voltage (Note 2)............. ±50V ADJ Pin Voltage.......................................................±50V SHDN Pin Voltage....................................................±50V PWRGD Pin Voltage........................................–0.3V, 50V INFILT Pin Voltage (Note 15)....................................±50V SENSE Pin Voltage...................................................±50V Output Short-Circuit Duration........................... Indefinite Operating Junction Temperature Range (Notes 3, 5, 14) E-, I-Grades........................................ –40°C to 125°C Storage Temperature Range................... –65°C to 150°C Lead Temperature (Soldering, 10 sec) MSOP Package Only.......................................... 300°C Pin Configuration TOP VIEW INFILT 1 12 OUT IN 2 11 OUT IN 3 SHDN 4 PWRGD IMAX 13 GND TOP VIEW INFILT IN IN SHDN PWRGD IMAX 10 NC/SENSE* 9 ADJ 5 8 GND 6 7 REF/BYP 1 2 3 4 5 6 13 GND 12 11 10 9 8 7 OUT OUT NC/SENSE* ADJ GND REF/BYP MSE PACKAGE 12-LEAD PLASTIC MSOP DE PACKAGE 12-LEAD (4mm × 3mm) PLASTIC DFN TJMAX = 150°C, θJA = 34°C/W, θJC = 5°C/W EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB TJMAX = 150°C, θJA = 34°C/W, θJC = 6°C/W EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB *Pin 10: NC for LT3066, SENSE for LT3066-3.3, LT3066-5 Order Information LEAD FREE FINISH http://www.linear.com/product/LT3066#orderinfo TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3066EDE#PBF LT3066EDE#TRPBF 3066 12-Lead (4mm x 3mm) Plastic DFN –40°C to 125°C LT3066IDE#PBF LT3066IDE#TRPBF 3066 12-Lead (4mm x 3mm) Plastic DFN –40°C to 125°C LT3066EDE-3.3#PBF LT3066EDE-3.3#TRPBF 06633 12-Lead (4mm x 3mm) Plastic DFN –40°C to 125°C LT3066IDE-3.3#PBF LT3066IDE-3.3#TRPBF 06633 12-Lead (4mm x 3mm) Plastic DFN –40°C to 125°C LT3066EDE-5#PBF LT3066EDE-5#TRPBF 30665 12-Lead (4mm x 3mm) Plastic DFN –40°C to 125°C LT3066IDE-5#PBF LT3066IDE-5#TRPBF 30665 12-Lead (4mm x 3mm) Plastic DFN –40°C to 125°C LT3066EMSE#PBF LT3066EMSE#TRPBF 3066 12-Lead Plastic MSOP –40°C to 125°C LT3066IMSE#PBF LT3066IMSE#TRPBF 3066 12-Lead Plastic MSOP –40°C to 125°C LT3066EMSE-3.3#PBF LT3066EMSE-3.3#TRPBF 306633 12-Lead Plastic MSOP –40°C to 125°C LT3066IMSE-3.3#PBF LT3066IMSE-3.3#TRPBF 306633 12-Lead Plastic MSOP –40°C to 125°C LT3066EMSE-5#PBF LT3066EMSE-5#TRPBF 30665 12-Lead Plastic MSOP –40°C to 125°C LT3066IMSE-5#PBF LT3066IMSE-5#TRPBF 30665 12-Lead Plastic MSOP –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. 2 3066fa For more information www.linear.com/LT3066 LT3066 Series Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 3). PARAMETER CONDITIONS MIN TYP Minimum Input Voltage (Notes 4, 9) ILOAD = 500mA Regulated Output Voltage (Note 5) LT3066-3.3: VIN = 3.9V, ILOAD = 1mA LT3066-3.3: 3.9V < VIN < 45V, 1mA < ILOAD < 500mA LT3066-5: VIN = 5.6V, ILOAD = 1mA LT3066-5: 5.6V < VIN < 45V, 1mA < ILOAD < 500mA 1.8 2.2 V 3.3 l 3.267 3.234 4.950 4.900 3.333 3.366 5.050 5.100 V V V V VIN = 2.2V, ILOAD = 1mA 2.2V < VIN < 45V, 1mA < ILOAD < 500mA 594 588 600 l 606 612 mV mV Line Regulation ILOAD = 1mA LT3066-3.3: ΔVIN = 3.9V to 45V LT3066-5: ΔVIN = 5.6V to 45V LT3066: ΔVIN = 2.2V to 45V (Note 4) l l l 1.6 2.6 0.1 19.5 30 3 mV mV mV Load Regulation ∆ILOAD = 1mA to 500mA LT3066-3.3: VIN = 3.9V LT3066-5: VIN = 5.6V LT3066: VIN = 2.2V (Note 4) l l l 1.6 2.4 0.1 22 33 4 mV mV mV 110 150 210 mV mV 145 200 310 mV mV 175 220 330 mV mV 300 350 510 mV mV 64 100 270 1.8 11 125 200 550 4.5 25 µA µA µA mA mA 1.25 3 µA 16 60 nA ADJ Pin Voltage (Notes 4, 5) l Dropout Voltage, VIN = VOUT(NOMINAL) ILOAD = 10mA (Notes 6, 7) l 5 l ILOAD = 50mA l ILOAD = 100mA l ILOAD = 500mA l GND Pin Current, VIN = VOUT(NOMINAL) + 0.6V (Notes 7, 8) ILOAD = 0mA ILOAD = 1mA ILOAD = 10mA ILOAD = 100mA ILOAD = 500mA l l l l l MAX UNITS Quiescent Current in Shutdown VIN = 45V, VSHDN = 0V ADJ Pin Bias Current (Notes 4, 10) VIN = 2.2V Output Voltage Noise COUT = 10µF, ILOAD = 500mA, VOUT = 600mV, BW = 10Hz to 100kHz 90 µVRMS COUT = 10µF, CBYP = 10nF, ILOAD = 500mA, VOUT = 600mV, BW = 10Hz to 100kHz 25 µVRMS l Shutdown Threshold (Notes 4, 9) VOUT = Off to On VOUT = On to Off l l Output Discharge Time (Notes 7, 9) VOUT Discharged to 10% of Nominal, COUT = 4.7μF l Output Discharge Switch Resistance VIN = 3.6V, VOUT = 1V, SHDN = 0V Shutdown Pin Output Discharge Threshold VIN = 3.6V SHDN Pin Current (Note 11) VSHDN = 0V, VIN = 45V VSHDN = 45V, VIN = 45V Ripple Rejection VIN – VOUT = 2V, VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 500mA LT3066-3.3 LT3066-5 LT3066 (Note 4) Input Reverse Leakage Current VIN = –45V, VOUT = 0 Reverse Output Current (Note 12) VOUT = 3.4V, VIN = VSHDN = 2.2V Internal Current Limit (Notes 4, 9) VIN = 2.2V or VIN = VOUT(NOMINAL) + 1V, VOUT = 0V, VIMAX = 0V VIN = 2.2V or VIN = VOUT(NOMINAL) + 1V, ΔVOUT = –5% 0.9 l l 1. 3 1.1 1.42 0.4 1 30 Ω V 2.5 520 ±1 3 71 70 85 l l ms 0.56 1.2 56 55 70 V V 900 µA µA dB dB dB 1 mA 15 µA mA mA 3066fa For more information www.linear.com/LT3066 3 LT3066 Series Electrical Characteristics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 3). PARAMETER CONDITIONS External Programmed Current Limit (Notes 7, 13) RIMAX = 1.5k, VOUT = 95% of VOUT(NOMINAL) VOUT(NOMINAL) + 0.6V < VIN < VOUT(NOMINAL)+ 5V RIMAX = 604Ω, VOUT = 95% of VOUT(NOMINAL) VOUT(NOMINAL) + 0.6V < VIN < VOUT(NOMINAL) + 2V PWRGD Logic Low Voltage Pull-Up Current = 50µA l PWRGD Leakage Current VPWRGD = 5V PWRGD Trip Point % of Nominal Output Voltage, Output Rising PWRGD Trip Point Hysteresis % of Nominal Output Voltage Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Absolute maximum input-to-output differential voltage is not achievable with all combinations of rated IN pin and OUT pin voltages. With IN at 50V, do not pull OUT below 0V. If OUT is pulled above IN and GND, the OUT to IN differential voltage must not exceed 40V. Note 3: The LT3066 regulator is tested and specified under pulse load conditions such that TJ ≅ TA. The LT3066E regulators are 100% tested at TA = 25°C and performance is guaranteed from 0°C to 125°C. Performance at –40°C to 125°C is assured by design, characterization and correlation with statistical process controls. The LT3066I regulators are guaranteed over the full –40°C to 125°C operating junction temperature range. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125°C. Note 4: The LT3066 adjustable version is tested and specified for these conditions with the ADJ pin connected to the OUT pin. Note 5: Maximum junction temperature limits operating conditions. Regulated output voltage specifications do not apply for all possible combinations of input voltage and output current. If operating at the maximum input voltage, limit the output current range. If operating at the maximum output current, limit the input voltage range. Current limit foldback limits the maximum output current as a function of input-tooutput voltage. See Current Limit vs VIN – VOUT in the Typical Performance Characteristics section. Note 6: Dropout voltage is the minimum IN-to-OUT differential voltage needed to maintain regulation at a specified output current. In dropout, the output voltage equals (VIN – VDROPOUT). For some output voltages, minimum input voltage requirements limit dropout voltage. 4 MIN TYP MAX UNITS l 180 200 220 mA l 445 495 545 mA 0.07 0.25 V 0.01 1 µA 90 94 % l 86 1.6 % Note 7: To satisfy minimum input voltage requirements, the LT3066 adjustable version is tested and specified for these conditions with an external resistor divider (60.4k bottom, 442k top) which sets VOUT to 5V. The divider adds 10uA of output DC load. This external current is not factored into GND pin current. For fixed voltage options, an internal resistor divider will add 5μA to the GND pin current. See the GND Pin Current curves in the Typical Performance Characteristics section Note 8: GND pin current is tested with VIN = VOUT(NOMINAL) + 0.6V and a current source load. GND pin current increases in dropout. See GND pin current curves in the Typical Performance Characteristics section. Note 9: To satisfy requirements for minimum input voltage, the LT3066 is tested at VIN = VOUT(NOMINAL) + 1V or VIN = 2.2V, whichever is greater. Note 10: ADJ pin bias current flows out of the ADJ pin. Note 11: SHDN pin current flows into the SHDN pin. Note 12: This current flows into the OUT pin and out of the GND pin. Note 13: Current limit varies inversely with the external resistor value tied from the IMAX pin to GND. For detailed information on selecting the IMAX resistor value, see the Operation section. If the externally programmed current limit feature is unused, tie the IMAX pin to GND. The internal current limit circuitry implements short-circuit protection as specified. Note 14: This IC includes over temperature protection that protects the device during overload conditions. Junction temperature exceeds 125°C (LT3066E, LT3066I) when the over temperature circuitry is active. Continuous operation above the specified maximum junction temperature may impair device reliability. Note 15: Tie INFILT directly to IN or to a decoupling capacitor. 3066fa For more information www.linear.com/LT3066 LT3066 Series Typical Performance Characteristics Guaranteed Dropout Voltage 600 550 450 TJ = 150°C TJ = 125°C 300 250 200 TJ = 25°C 150 100 50 0 0 50 100 150 200 250 300 350 400 450 500 OUTPUT CURRENT (mA) Dropout Voltage 600 = TEST POINTS 550 500 TJ = 125°C TJ = 25°C Quiescent Current Current Quiescent 3.355 100.0 3.344 0 60.0 50.0 40.0 30.0 20.0 10.0 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 5.060 3.322 3.311 3.300 3.289 3.278 3.267 5.020 5.000 4.980 4.960 4.940 4.920 3.234 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 4.900 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) LT3066 G06 LT3066 G05 QUIESCENT CURRENT (µA) 608 ADJ PIN VOLTAGE (mV) 5.040 3.245 IL = 1mA 604 602 600 598 596 594 592 590 588 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) IL = 1mA 5.080 LT3066-3.3 Quiescent Current 606 IL = 10mA LT3066-5 Output Voltage 3.333 LT3066 ADJ Pin Voltage 610 150 3066 G03 IL = 1mA 3066 G04 612 IL = 100mA 5.100 3.256 VIN = 12V ALL OTHER PINS = 0V IL = 50mA 200 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 50 100 150 200 250 300 350 400 450 500 OUTPUT CURRENT (mA) OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) QUIESCENT CURRENT (µA) 110.0 70.0 250 LT3066-3.3 Output Voltage 3.366 VIN = VSHDN = 12V VOUT = 5V IL =10µA IL = 500mA 300 3066 G02 120.0 80.0 400 350 50 3066 G01 90.0 450 100 130 120 110 100 90 80 70 60 50 40 30 20 10 0 LT3066-5 Quiescent Current QUIESCENT CURRENT (µA) 400 350 DROPOUT VOLTAGE (mV) DROPOUT VOLTAGE (mV) 500 700 650 600 550 500 450 400 350 300 250 200 150 100 50 0 DROPOUT VOLTAGE (mV) Typical Dropout Voltage TJ = 25°C, unless otherwise noted. VSHDN = VIN VSHDN = 0V 0 1 2 3 4 5 6 7 VIN (V) 8 9 10 11 12 3066 G08 130 120 110 100 90 80 70 60 50 40 30 20 10 0 VSHDN = VIN VSHDN = 0V 0 1 2 3 4 5 6 7 VIN (V) 8 9 10 11 12 3066 G09 3066 G07 3066fa For more information www.linear.com/LT3066 5 LT3066 Series Typical Performance Characteristics LT3066-3.3 GND Pin Current 24 TJ = 25°C VOUT = 5V I L = 10µA 20 16 5 10 15 20 25 VIN (V) 30 35 40 RL = 33Ω IL = 100mA* 12 10 RL = 13.2Ω IL = 250mA* 8 6 VSHDN = 0V 0 2 3 4 5 6 7 8 9 10 11 12 INPUT VOLTAGE (V) SHDN PIN THRESHOLD (V) GND PIN CURRENT (mA) RL = 500Ω IL = 10mA* 8 6 0 0 1 2 3 4 5 6 7 8 9 10 11 12 INPUT VOLTAGE (V) 3066 G12 SHDN Pin Threshold VIN = 5.6V VOUT = 5V 14 12 10 8 6 4 2 0 10 3066 G11 16 0 RL = 50Ω IL = 100mA* 12 2 GND Pin Current vs ILOAD 18 14 4 1 RL = 20Ω IL = 250mA* 16 2 0 TJ = 25°C *FOR VOUT = 5V VSHDN = VIN 18 4 0 45 RL = 330Ω IL = 10mA* 3066 G10 20 20 18 14 RL = 10Ω IL = 500mA* 22 GND PIN CURRENT (mA) VSHDN = VIN LT3066-5 GND Pin Current 24 TJ = 25°C RL = 6.6Ω IL = 500mA* *FOR VOUT = 3.3V VSHDN = VIN 22 GND PIN CURRENT (mA) QUIESCENT CURRENT (µA) Quiescent Current 130 120 110 100 90 80 70 60 50 40 30 20 10 0 TJ = 25°C, unless otherwise noted. 50 100 150 200 250 300 350 400 450 500 ILOAD (mA) 1.5 1.4 OFF TO ON 1.3 1.2 1.1 ON TO OFF 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 3066 G13 3066 G14 SHDN Pin Input Current SHDN Pin Current 3.0 3.0 SHDN = 45V 2.5 SHDN PIN CURRENT (µA) SHDN PIN CURRENT (µA) 2.5 2.0 1.5 1.0 2.0 1.5 1.0 0.5 0.5 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 0 0 5 10 15 20 25 30 35 SHDN PIN VOLTAGE (V) 40 45 3066 G16 3066 G15 6 3066fa For more information www.linear.com/LT3066 LT3066 Series Typical Performance Characteristics Internal Current Limit 50 45 CURRENT LIMIT (A) ADJ PIN CURRENT (nA) 40 35 30 25 20 15 Internal Current Limit 1.5 1.4 VIN = 6V 1.3 VOUT = 0V 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 10 5 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 3066 G17 3.0 4.0 COUT = 4.7µF VIN = VOUT + 1V 2.5 OUTPUT DISCHARGE 2.0 FOLDBACK STARTS 1.5 1.0 0.5 0 0 2 4 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 5 10 15 20 25 30 35 40 45 50 INPUT/OUTPUT DIFFERENTIAL (V) 3066 G19 Output Discharge Pull-Down Threshold Pulldown Threshold T = –55°C T = –40°C T = 25°C T = 125°C T = 155°C 3.5 3.0 2.0 1.5 1.0 VIN = 3.6V 0.7 PULL-DOWN OFF 0.6 0.5 PULL-DOWN ON 0.4 0.3 0.2 0.5 6 8 10 12 14 16 18 20 OUTPUT VOLTAGE (V) 0.9 0.8 2.5 0 1.0 VIN = 4.3V VOUT(NOMINAL) = 3.3V SHDN PIN VOLTAGE (V) 3.5 0.8 Output Discharge Time OUTPUT DISCHARGE TIME (ms) OUTPUT DISCHARGE TIME (ms) T = –55°C T = –40°C T = 25°C T = 125°C T = 150°C TJ = –55°C TJ = –40°C TJ = 25°C TJ = 125°C TJ = 150°C 0.9 3066 G18 Output Discharge Time 4.0 1.0 CURRENT LIMIT (A) ADJ Pin Bias Current TJ = 25°C, unless otherwise noted. 0.1 0 2 4 6 8 10 12 14 16 18 20 22 24 OUTPUT CAPACITANCE (µF) 3066 G20 LT3066 G21 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 3066 G22 Output Discharge vs VOUT CREF/BYP = 1nF Output Discharge vs VOUT CREF/BYP = 1nF 5.0V 1V/DIV 20V 19V 15V 5V/DIV 12V 8V 5V 3.3V 2.0V 1.2V 0V SHDN: 0 TO 2V 1ms/DIV VIN = VOUT +1V COUT = 10µF IFB-DIVIDER = 10µA SHDN: 0 TO 2V 3066 G23 1ms/DIV 3066 G24 VIN = VOUT +1V COUT = 10µF IFB-DIVIDER = 10µA 3066fa For more information www.linear.com/LT3066 7 LT3066 Series Typical Performance Characteristics Reverse Output CurrentCurrent 50 2.00 110 VOUT = 3.4V VIN = V SHDN = 2.2V 1.80 30 25 20 15 1.40 1.20 1.00 0.80 0.60 60 50 40 20 0.20 10 2 4 6 8 10 12 14 16 18 20 VOUT (V) IN RMS RIPPLE REJECTION (dB) 80 70 60 50 CREF/BYP = 10nF 40 30 20 10 0 CREF/BYP = CFF = 10nF No CREF/BYP, CFF, CINFILT 10 100 1M 100 90 70.0 80 60.0 70 50.0 40.0 30.0 100kHz IL = 500mA 500kHz VOUT = 3.3V 1MHz CINFILT = 0.47µF 2MHz CREF/BYP = 10nF CFF =10nF COUT = 3 • 3.3µF IN PARALLEL (0805 SIZE) 20.0 0 10M 3066 G28 0 1k 10k 100k FREQUENCY (Hz) 1M 10M Input Ripple Rejection 80.0 10.0 IOUT = 500mA COUT = 3•3.3µF 1k 10k 100k FREQUENCY (Hz) 10 3066 G27 Input Input Ripple Ripple Rejection Rejection OUT CREF/BYP = CFF = 10nF, CINFILT = 0.47µF 90 CREF/BYP = CFF = 10nF, CINFILT = 0.47µF 3066 G26 Input Ripple Rejection VIN = 4.3V + 50mVRMS, VOUT = 3.3V 100 0 RIPPLE REJECTION (dB) 0 CREF/BYP = 10nF 30 5 3066 G25 RIPPLE REJECTION (dB) 70 0.40 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) IOUT = 500mA 80 10 0 COUT = 3•3.3µF (0805 SIZE) COUT = 3.3µF (0805 SIZE) 90 RIPPLE REJECTION (dB) 35 Input Ripple Rejection VIN = 4.3V + 50mVRMS, VOUT = 3.3V 100 1.60 40 OUTPUT CURRENT (mA) OUTPUT CURRENT (µA) Reverse Output Current VIN = V SHDN = 2.1V VADJ = VOUT 45 TJ = 25°C, unless otherwise noted. 0.5 1 1.5 2 2.5 3 3.5 INPUT/OUTPUT DIFFERENTIAL (V) 60 50 40 30 ILOAD = 500mA CREF/BYP = CFF = 10nF VOUT = 3.3V VIN = 4.3V + 50mVRMS RIPPLE f = 120Hz 20 10 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 4 3066 G29 3066 G30 2.2 3.0 IL = 500mA 2.0 1.8 LOAD REGULATION (mV) MINIMUM INPUT VOLTAGE (V) 2.0 Load Regulation 1.6 1.4 1.2 1.0 0.8 0.6 0 –1.0 –2.0 –3.0 –4.0 –5.0 0.2 –6.0 3066 G31 8 1.0 0.4 0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) ∆IL = 1mA to 500mA LT3066-5, VIN = 6V LT3066-3.3, VIN = 4.3V LT3066, VOUT = 0.6V, VIN = 2.2V –7.0 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 3066 G32 OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz) Minimum Input Voltage 10 Output Noise Spectral Density CREF/BYP = 0, CFF = 0 COUT = 10µF IL = 500mA 1 0.1 0.01 VOUT = 5V VOUT = 3.3V VOUT = 2.5V VOUT = 1.2V VOUT = 0.6V 10 100 1k 10k FREQUENCY (Hz) 100k 3066 G33 3066fa For more information www.linear.com/LT3066 LT3066 Series COUT = 10µF IL = 500mA VOUT = 5V 1 VOUT = 0.6V 0.1 0.01 CREF/BYP = 100pF CREF/BYP = 1nF CREF/BYP = 10nF 10 100 1k 10k FREQUENCY (Hz) 100k 10 Output Noise Spectral Density vs CFF, CREF/BYP = 10nF VOUT = 5V COUT = 10µF IL = 500mA 1 0.1 0.01 CFF = 0pF CFF = 100pF CFF = 1nF CFF = 10nF 100 10 1k 10k FREQUENCY (Hz) 140 120 100 120 110 VOUT = 2.5V VOUT = 1.8V VOUT = 1.5V 80 60 VOUT = 1.2V 40 20 0 0.01 VOUT = 0.6V 0.1 1 10 100 LOAD CURRENT (mA) 1000 OUTPUT NOISE VOLTAGE (µVRMS) OUTPUT VOLTAGE NOISE (µVRMS) 160 70 CREF/BYP = 100pF 60 50 40 CREF/BYP = 1nF 30 20 CREF/BYP = 10nF 0.1 1 10 100 LOAD CURRENT (mA) VOUT = 5V 100 VOUT = 3.3V 90 80 Start-Up Time vs REF/BYP Capacitor f = 10Hz TO 100kHz CREF/BYP = 10nF COUT = 10µF IFB-DIVIDER = 10µA ILOAD = 500mA VOUT = 2.5V 70 60 50 40 30 VOUT = 1.2V 20 10 1000 3066 G36 RMS Output Noise, vs Feedforward Capacitor (CFF) VOUT = 5V VOUT = 3.3V 80 0 0.01 100k CREF/BYP = 0pF 3066 G35 RMS Output Noise vs Load Current vs CREF/BYP = 10nF, CFF = 0 f = 10Hz TO 100kHz 180 COUT = 10µF 110 f = 10Hz TO 100kHz 100 C OUT = 10µF 90 10 3066 G34 200 RMS Output Noise, VOUT = 0.6V, CFF = 0 1000 START-UP TIME (ms) 10 TJ = 25°C, unless otherwise noted. OUTPUT NOISE VOLTAGE (µVRMS) Output Noise Spectral Density vs CREF/BYP, CFF = 0 OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz) OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz) Typical Performance Characteristics CFF = OPEN 100 10 1 VOUT = 0.6V 0 0.01 0.1 1 FEEDFORWARD CAPACITOR, CFF (nF) 10 0.1 1 100 10 REF/BYP CAPACITOR (nF) 3066 G38 3066 G37 1000 3066 G39 10Hz to 100kHz Output Noise CREF/BYP = 10nF, CFF = 10nF 10Hz to 100kHz Output Noise CREF/BYP = 10nF, CFF = 0 VOUT 200µV/DIV VOUT 200µV/DIV COUT = 10µF ILOAD = 500mA VOUT = 5V 2ms/DIV 3066 G40 COUT = 10µF ILOAD = 500mA VOUT = 5V 2ms/DIV 3066 G41 3066fa For more information www.linear.com/LT3066 9 LT3066 Series Typical Performance Characteristics 5V Transient Response CFF = 0, IOUT = 50mA to 500mA 5V Transient Response CFF = 10nF, IOUT = 50mA to 500mA VOUT 100mV/DIV VOUT 100mV/DIV IOUT 500mA/DIV IOUT 500mA/DIV 3066 G42 VIN = 6V 100µs/DIV COUT = 10µF IFB-DIVIDER = 10µA VOUT = 5V TJ = 25°C, unless otherwise noted. 3066 G43 VIN = 6V 20µs/DIV COUT = 10µF IFB-DIVIDER = 10µA VOUT = 5V SHDN Transient Response CREF/BYP = 10nF Transient Response (Load Dump) CREF/BYP = 0 VOUT 20mV/DIV 45V REF/BYP 500mV/DIV VIN 10V/DIV 12V 550 VOUT(NOMINAL) = 5V 212 208 200 196 VIN = 10V VIN = 5.6V 192 188 184 180 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 3066 G46 540 2ms/DIV Precision Current Limit, RIMAX = 604Ω PWRGD Threshold Voltage VOUT(NOMINAL) = 5V 580 530 570 520 510 500 490 3066 G45 590 ADJ PIN VOLTAGE (mV) Precision Current Limit, RIMAX = 1.5k 204 CREF/BYP = 10nF 3066 G44 1ms/DIV CURRENT LIMIT FAULT THRESHOLD (mA) CURRENT LIMIT FAULT THRESHOLD (mA) 216 CREF/BYP = 0 SHDN 2V/DIV VOUT = 5V IOUT = 100mA COUT = 10µF 220 CREF/BYP = 10nF OUT 1V/DIV IL = 100μA VIN = 7V VIN = 5.6V 480 560 550 ADJ PIN RISING THRESHOLD 540 530 520 ADJ PIN FALLING THRESHOLD 470 510 460 500 450 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 490 –75 –50 –25 0 25 50 75 100 125 150 175 TEMPERATURE (°C) 3066 G47 3066 G48 10 3066fa For more information www.linear.com/LT3066 LT3066 Series Pin Functions (DFN/MSOP) INFILT (Pin 1): Filtered Input. This pin is connected to IN through a ~140Ω on-chip resistor. To improve PSRR, at frequencies greater than 10kHz connect up to a 0.47μF capacitor from INFILT to GND (see Figure 1). If improved PSRR is not needed, connect the INFILT pin to IN. IN (Pins 2, 3): Input. These pin(s) supply power to the device. The LT3066 requires a local IN bypass capacitor if it is located more than six inches from the main input filter capacitor. In general, battery output impedance rises with frequency, so adding a bypass capacitor in batterypowered circuits is advisable. An input bypass capacitor in the range of 1µF to 10µF generally suffices. See Input Capacitance and Stability in the Applications Information section for more information. The LT3066 withstands reverse voltages on the IN pin with respect to its GND and OUT pins. In such case, such as a battery plugged in backwards, the LT3066 behaves as if a diode is in series with its input. No reverse current flows into the LT3066 and no reverse voltage appears at the load. The device protects itself and the load. SHDN (Pin 4): Shutdown. Pulling the SHDN pin low puts the LT3066 into a low power state and turns the output off. Drive the SHDN pin with either logic or an open collector/drain with a pull-up resistor. The resistor supplies the pull-up current to the open collector/drain logic, normally several microamperes, and the SHDN pin current, typically less than 2µA. If unused, connect the SHDN pin to IN. The LT3066 does not function if the SHDN pin is not connected. PWRGD (Pin 5): Power Good. The PWRGD pin is an open-drain output that actively pulls low if the output is less than 90% of the nominal output value. The PWRGD pin is capable of sinking 50µA. There is no internal pull-up resistor; an external pull-up resistor must be used. IMAX (Pin 6): Precision Current Limit Programming. This pin is the collector of a current mirror PNP that is 1/500th the size of the output power PNP. This pin is also the input to the current limit amplifier. The current limit threshold is set by connecting a resistor between the IMAX pin and GND. For detailed information on how to set the IMAX pin resistor value, see the Applications Information section. The IMAX pin requires a 22nF de-coupling capacitor to ground. If not used, tie IMAX to GND. Do not drive this pin with any active circuitry. REF/BYP (Pin 7): Bypass/Soft-Start. Connecting a capacitor from this pin to GND bypasses the LT3066’s reference noise and soft-starts the reference. A 10nF bypass capacitor typically reduces output voltage noise to 25µVRMS in a 10Hz to 100kHz bandwidth. Soft-start time is directly proportional to the BYP capacitor value. If the LT3066 is placed in shutdown, BYP is actively pulled low by an internal device to reset soft-start. If low noise or soft-start performance is not required, this pin must be left floating (unconnected). Do not drive this pin with any active circuitry. Because the REF/BYP pin is the reference input to the error amplifier, stray capacitance at this point should be minimized. Special attention should be given to any stray capacitances that can couple external signals onto the REF/BYP pin producing undesirable output transients or ripple. A minimum capacitance of 100pF from REF/BYP to GND is recommended. GND (Pin 8, Exposed Pad Pin 13): Ground. The exposed pad of the DFN and MSOP packages is an electrical connection to GND. To ensure proper electrical and thermal performance, solder Pin 8 to the PCB GND and tie it directly to Pin 13. For the adjustable LT3066, connect the bottom of the external resistor divider that sets output voltage directly to GND (Pin 8)for optimum load regulation. ADJ (Pin 9): Adjust. This pin is the error amplifier’s inverting terminal. It’s typical bias current of 16nA flows out of the pin (see curve of ADJ Pin Bias Current vs Temperature in the Typical Performance Characteristics section). The ADJ pin voltage is 600mV referenced to GND. 3066fa For more information www.linear.com/LT3066 11 LT3066 Series Pin Functions (DFN/MSOP) NC (LT3066: Pin 10): No Connect. This pin has no connection to internal circuitry. This pin may be floated or connected to GND. SENSE (LT3066-3.3, LT3066-5: Pin 10): Sense. This pin is the top of the internal resistor divider network and should be connected directly to the load, as a Kelvin sense, for optimum load regulation and transient performance. Connecting this pin to the output pin at the package, rather than directly to the load, can result in load regulation errors due to the current across the parasitic resistance of the PCB trace. OUT (Pins 11, 12): Output. These pins supply power to the load. Stability requirements demand a minimum 3.3µF ceramic output capacitor with an ESR < 1Ω to prevent oscillations. Applications with output voltages less than 1.2V require a minimum 4.7µF ceramic output capacitor. Large load transient applications require larger output capacitors to limit peak voltage transients. See the Applications Information section for details on transient response and reverse output characteristics. Permissible output voltage range is 600mV to 19V. Connecting a capacitor from OUT to ADJ reduces output noise and improves transient response for output voltages greater than 600mV. See the Applications Information section for calculating the value of the feedforward capacitor. At output voltages above 0.6V, the resistor divider connected to the ADJ pin is used to regulate voltage at the load. Parasitic resistances of PCB traces or cables can therefore result in load regulation errors at high output currents. To eliminate these, connect the resistor divider directly to the load for a Kelvin sense connection, as shown in Figure 1. If the LT3066 is placed in shutdown, OUT is actively discharged by an internal NMOS device. Gate drive is controlled to insure that a 10μF capacitor is discharged 90% in 2ms or less. If IN is driven low, OUT is actively discharged to ~800mV. For OUT voltages greater than 6V, current limit foldback is implemented to protect the NMOS device and discharge rates increase. See the Applications Information section for more information. ADJUSTABLE VERSION IN OUT VIN + SHDN GND RP IN R2 LT3066 + FIXED VOLTAGE VERSION ADJ R1 RP OUT RP LT3066-X LOAD + VIN + 3066 F01a SHDN SENSE LOAD GND RP 3066 F01b Figure 1. Kelvin Sense Connection 12 3066fa For more information www.linear.com/LT3066 LT3066 Series Block Diagram IN R1 140Ω INFILT TO REFERENCES, ERROR AMPLIFIER D1 QIMAX 1/500X ERROR AMPLIFIER OUT THERMAL/ CURRENT LIMIT REF/BYP QPOWER 1X Q1 600mV REFERENCE IMAX R3 100k SENSE* CURRENT LIMIT AMPLIFIER SHDN D5 R2 30k D2 IDEAL DIODE INFILT ADJ R5* OUT D3 IN R6* D4 GATE DRIVE WITH FOLDBACK PWRGD R4 10Ω 540mV REFERENCE GND 3066 BD *FIXED OUTPUT VOLTAGE OPTIONS ONLY LT3066-3.3: R5 = 120k, R6 = 880k LT3066-5: R5 = 120k, R6 = 540k Figure 2. System Block Diagram 3066fa For more information www.linear.com/LT3066 13 LT3066 Series Applications Information The LT3066 series are micropower, low noise and low drop-out voltage, 500mA linear regulators with micropower shutdown, programmable current limit, and a Power-good flag. The devices supply up to 500mA at a typical dropout voltage of 300mV and operates over a 1.8V to 45V input range. + The LT3066 optimizes stability and transient response with low ESR, ceramic output capacitors. The regulator does not require the addition of ESR as is common with other regulators. The LT3066 typically provides better than 0.1% line regulation and 0.1% load regulation. Internal protection circuitry includes reverse battery protection, reverse output protection, reverse current protection, current limit with foldback and thermal shutdown. This “bullet-proof” protection set makes it ideal for use in battery-powered, automotive and industrial systems.In battery backup applications where the output is held up by a backup battery and the input is pulled to ground, the LT3066 acts like it has a diode in series with its output and prevents reverse current. Adjustable Operation The adjustable LT3066 has an output voltage range of 0.6V to 19V. Output voltage is set by the ratio of two external resistors, as shown in Figure 3. The device regulates the output to maintain the ADJ pin voltage at 0.6V referenced to ground. The current in R1 equals 0.6V/R1, and R2’s current is R1’s current minus the ADJ pin bias current. The ADJ pin bias current, 16nA at 25°C, flows from the ADJ pin through R1 to GND. Calculate the output voltage using the formula in Figure 3. R1’s value should not be 14 VOUT OUT LT3066 SHDN R2 ADJ GND R1 3066 F03 A single external capacitor provides low noise reference performance and output soft-start functionality. For example, connecting a 10nF capacitor from the REF/BYP pin to GND lowers output noise to 25μVRMS over a 10Hz to 100kHz bandwidth. This capacitor also soft-starts the reference and prevents output voltage overshoot at turn-on. The LT3066’s quiescent current is merely 64μA but provides fast transient response with a low ESR, minimum value 3.3μF ceramic output capacitor. In shutdown, quiescent current is less than 3μA and the reference soft-start capacitor is reset. IN VIN R2 VOUT = 0.6V 1+ – (IADJ • R2) R1 VADJ = 0.6V IADJ = 16nA AT 25°C OUTPUT RANGE = 0.6V TO 19V Figure 3. Adjustable Operation greater than 62k to provide a minimum 10μA load current so that output voltage errors, caused by the ADJ pin bias current, are minimized. Note that in shutdown, the output is turned off and the divider current is zero. Curves of ADJ Pin Voltage vs Temperature and ADJ Pin Bias Current vs Temperature appear in the Typical Performance Characteristics section. The LT3066 is tested and specified with the ADJ pin tied to the OUT pin, yielding VOUT = 0.6V. Specifications for output voltages greater than 0.6V are proportional to the ratio of the desired output voltage to 0.6V: VOUT/0.6V. For example, load regulation for an output current change of 1mA to 500mA is 0.1mV (typical) at VOUT = 0.6V. At VOUT = 12V, load regulation is: 12V •(0.1mV) = 2mV 0.6V Table 1 shows 1% resistor divider values for some common output voltages with a resistor divider current of 10μA. Table 1. Output Voltage Resistor Divider Values VOUT (V) R1 (kΩ) R2 (kΩ) 1.2 60.4 60.4 1.5 59 88.7 1.8 59 118 2.5 60.4 191 3 59 237 3.3 61.9 280 5 59 432 3066fa For more information www.linear.com/LT3066 LT3066 Series Applications Information Bypass Capacitance and Output Voltage Noise The LT3066 regulator provides low output voltage noise over a 10Hz to 100kHz bandwidth while operating at full load with the addition of a bypass capacitor (CREF/BYP) from the REF/BYP pin to GND. A high quality low leakage capacitor is recommended. This capacitor bypasses the internal reference of the regulator, providing a low frequency noise pole for the internal reference. With the use of 10nF for CREF/BYP, output voltage noise decreases to as low as 25μVRMS when the output voltage is set for 0.6V. For higher output voltages (generated by using a feedback resistor divider), the output voltage noise gains up proportionately when using CREF/BYP. To lower the higher output voltage noise, connect a feedforward capacitor (CFF) from VOUT to the ADJ pin. A high quality, low leakage capacitor is recommended. This capacitor bypasses the error amplifier of the regulator, providing an additional low frequency noise pole. With the use of 10nF for both CFF and CREF/BYP, output voltage noise decreases to 25μVRMS when the output voltage is set to 5V by a 10μA feedback resistor divider. If the current in the feedback resistor divider is doubled, CFF must also be doubled to achieve equivalent noise performance. output voltage (See Figure 5 and Transient Response in the Typical Performance Characteristics section). During start-up, the internal reference soft-starts when a REF/BYP capacitor is used. Regulator start-up time is directly proportional to the size of the bypass capacitor (see Start-Up Time vs REF/BYP Capacitor in the Typical Performance Characteristics section). The reference bypass capacitor is actively pulled low during shutdown to reset the internal reference. Using a feedforward capacitor also affects start-up time. Start-up time is directly proportional to the size of the feedforward capacitor and the output voltage, and is inversely proportional to the feedback resistor divider current, slowing to 15ms with a 10nF feedforward capacitor and a 10μF output capacitor for an output voltage set to 5V by a 10μA feedback resistor divider. IN + VIN LT3066 SHDN ADJ GND REF/BYP CFF VOUT COUT R1 3066 F04 CFF ≥ 10nF • (IFB _DIVIDER) 10µA IFB _DIVIDER = VOUT R1+R2 FEEDFORWARD CAPACITOR, CFF Figure 4. Feedforward Capacitor for Fast Transient Response 0 VOUT 100mV/DIV Using a feedforward capacitor (CFF) connected between VOUT and ADJ has the added benefit of improving transient response for output voltages greater than 0.6V. With no feedforward capacitor, the settling time increases as the output voltage increases above 0.6V. Use the equation in Figure 4 to determine the minimum value of CFF to achieve a transient response that is similar to the 0.6V output voltage performance regardless of the chosen R2 CREF/BYP Feedforward capacitance can also be used in fixed-voltage parts; the feedforward capacitor is connected from OUT to ADJ in the same manner. In this case, the current in the internal feedback resistor divider is 5μA. Higher values of output voltage noise can occur if care is not exercised with regard to circuit layout and testing. Crosstalk from nearby traces induces unwanted noise onto the LT3066’s output. Power supply ripple rejection must also be considered. The LT3066 regulator does not have unlimited power supply rejection and passes a small portion of the input noise through to the output. OUT 100pF 1nF 10nF LOAD CURRENT 500mA/DIV 100µs/DIV VOUT = 5V COUT = 10µF IFB-DIVIDER = 10µA 3066 F05 Figure 5. Transient Response vs Feedforward Capacitor 3066fa For more information www.linear.com/LT3066 15 LT3066 Series Applications Information Output Capacitance and Transient Response The LT3066 regulator is stable with a wide range of output capacitors. The ESR of the output capacitor affects stability, most notably with small capacitors. Use a minimum output capacitor of 3.3μF with an ESR of 1Ω or less to prevent oscillations. For VOUT less than 1.2V, use a minimum COUT of 4.7µF. The LT3066 is a micropower device and output load transient response is a function of output capacitance. Larger values of output capacitance decrease the peak deviations and provide improved transient response for larger load current changes. Bypass capacitors, used to decouple individual components powered by the LT3066, increase the effective output capacitor value. For applications with large load current transients, a low ESR ceramic capacitor in parallel with a bulk tantalum capacitor often provides an optimally damped response. Give extra consideration to the use of ceramic capacitors. Manufacturers make ceramic capacitors with a variety of dielectrics, each with different behavior across temperature and applied voltage. The most common dielectrics are specified with EIA temperature characteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics provide high C-V products in a small package at low cost, but exhibit strong voltage and temperature coefficients, as shown in Figures 6 and 7. When used with a 5V regulator, a 16V 10μF Y5V capacitor can exhibit an effective value as low as 1μF to 2μF for the DC bias voltage applied, and 20 20 X5R CHANGE IN VALUE (%) CHANGE IN VALUE (%) Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a piezoelectric response. A piezoelectric device generates voltage across its terminals due to mechanical stress, similar to the way a piezoelectric accelerometer or microphone works. For a ceramic capacitor, the stress is induced by vibrations in the system or thermal transients. The resulting voltages produced cause appreciable amounts of noise. A ceramic capacitor produced the trace in Figure 8 in response to light tapping from a pencil. Similar vibration induced behavior can masquerade as increased output voltage noise. 40 –20 –40 –60 Y5V –80 0 2 4 8 6 10 12 DC BIAS VOLTAGE (V) 14 16 X5R 0 –20 –40 Y5V –60 –80 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF –100 –50 –25 3066 F06 Figure 6. Ceramic Capacitor DC Bias Characteristics 16 The X7R type works over a wider temperature range and has better temperature stability, while the X5R is less expensive and is available in higher values. Care still must be exercised when using X5R and X7R capacitors; the X5R and X7R codes only specify operating temperature range and maximum capacitance change over temperature. Capacitance change due to DC bias with X5R and X7R capacitors is better than Y5V and Z5U capacitors, but can still be significant enough to drop capacitor values below appropriate levels. Capacitor DC bias characteristics tend to improve as component case size increases, but expected capacitance at operating voltage should be verified. BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10µF 0 –100 over the operating temperature range. The X5R and X7R dielectrics yield much more stable characteristics and are more suitable for use as the output capacitor. 50 25 75 0 TEMPERATURE (°C) 100 125 3066 F07 Figure 7. Ceramic Capacitor Temperature Characteristics 3066fa For more information www.linear.com/LT3066 LT3066 Series Applications Information VOUT 1mV/DIV VOUT = 5V COUT = 10µF CREF/BYP = 10nF 10ms/DIV 3066 F08 Figure 8. Noise Resulting from Tapping On a Ceramic Capacitor Stability and Input Capacitance Low ESR, ceramic input bypass capacitors are acceptable for applications without long input leads. However, applications connecting a power supply to an LT3066 circuit’s IN and GND pins with long input wires combined with a low ESR, ceramic input capacitors are prone to voltage spikes, reliability concerns and application-specific board oscillations. The input wire inductance found in many battery-powered applications, combined with the low ESR ceramic input capacitor, forms a high Q LC resonant tank circuit. In some instances this resonant frequency beats against the output current dependent LDO bandwidth and interferes with proper operation. Simple circuit modifications/solutions are then required. This behavior is not indicative of LT3066 instability, but is a common ceramic input bypass capacitor application issue. The self-inductance, or isolated inductance, of a wire is directly proportional to its length. Wire diameter is not a major factor on its self-inductance. For example, the selfinductance of a 2-AWG isolated wire (diameter = 0.26") is about half the self-inductance of a 30-AWG wire (diameter = 0.01"). One foot of 30-AWG wire has approximately 465nH of self-inductance. Two methods can reduce wire self-inductance. One method divides the current flowing towards the LT3066 between two parallel conductors. In this case, the farther apart the wires are from each other, the more the self-inductance is reduced; up to a 50% reduction when placed a few inches apart. Splitting the wires connects two equal inductors in parallel, but placing them in close proximity creates mutual inductance adding to the self-inductance. The second and most effective way to reduce overall inductance is to place both forward and return current conductors (the input and GND wires) in very close proximity. Two 30-AWG wires separated by only 0.02", used as forward and return current conductors, reduce the overall self-inductance to approximately one-fifth that of a single isolated wire. If a battery, mounted in close proximity, powers the LT3066, a 10µF input capacitor suffices for stability. However, if a distant supply powers the LT3066, use a larger value input capacitor. Use a rough guideline of 1µF (in addition to the 10µF minimum) per 8 inches of wire length. The minimum input capacitance needed to stabilize the application also varies with power supply output impedance variations. Placing additional capacitance on the LT3066’s output also helps. However, this requires an order of magnitude more capacitance in comparison with additional LT3066 input bypassing. Series resistance between the supply and the LT3066 input also helps stabilize the application; as little as 0.1Ω to 0.5Ω suffices. This impedance dampens the LC tank circuit at the expense of dropout voltage. A better alternative is to use higher ESR tantalum or electrolytic capacitors at the LT3066 input in place of ceramic capacitors. Input Filtering The INFILT pin is a separate input pin which supplies power to the error amplifier and reference. It is connected to the IN pin by a 140Ω resistor. Placing a decoupling capacitor from INFILT to ground creates an RC filter which reduces input supply ripple at the error amplifier and reference. Placing a 0.47µF decoupling capacitor on INFILT improves PSRR by as much as 30dB at frequencies greater than 10kHz. If input filtering is not required, connect the INFILT pin to the IN pins. 3066fa For more information www.linear.com/LT3066 17 LT3066 Series Applications Information VIN = 4.3V + 50mVRMS, VOUT = 3.3V 90 COUT = 3•3.3µF (0805 SIZE) CFF = CREF/BYP = 10nF IOUT = 500mA RIPPLE REJECTION (dB) 80 70 60 50 40 30 CINFILT = 0.47µF CINFILT = 0.1µF CINFILT = 47nF NO C INFILT 20 10 0 10 100 1k 10k 100k FREQUENCY (Hz) 1M 10M 3066 F09 Figure 9. Input Ripple Rejection. VIN = 4.3V + 50mVRMS. VOUT = 3.3 IMAX Pin Operation The IMAX pin is the collector of a PNP that sources a current equal to 1/500th of output load current (see Block Diagram). The IMAX pin is also the input to the precision current limit amplifier. Connecting a resistor (RIMAX) from IMAX to GND sets the current limit threshold. If the output load increases to a level such that the IMAX pin voltage reaches 0.6V, the current limit amplifier takes control and regulates the IMAX voltage to 0.6V, regardless of the output voltage. Calculate the required RIMAX value for a given current limit from the following formula: RIMAX = 500 • 0.6V ILIMIT In cases where the IN to OUT differential voltage exceeds 10V, current limit foldback lowers the internal current limit level, possibly causing it to override the external programmable current limit. See the Internal Current Limit vs VIN – VOUT graph in the Typical Performance Characteristics section. The IMAX pin requires a 22nF decoupling capacitor. If the external programmable current limit is not used, connect the IMAX pin directly to GND. LT3066 power dissipation increases the IMAX threshold at a rate of approximately 0.5 percent per watt. PWRGD Pin Operation The PWRGD pin is an open-drain high voltage NMOS digital output capable of sinking 50µA. The PWRGD pin 18 de-asserts and becomes high impedance if the output rises above 90% of its nominal value. If the output falls below 88.4% of its nominal value for more than 25μs, the PWRGD pin asserts low. The PWRGD comparator has 1.6% hysteresis and about 25μs of deglitching. The PWRGD comparator has a dedicated reference that does not soft-start if a capacitor is used on the REF/BYP pin. The use of a feed-forward capacitor, CFF, as shown in Figure 4, can result in the ADJ pin being pulled artificially high during startup transients, which causes the PWRGD flag to assert early. To avoid this problem, ensure that the REF/BYP capacitor is significantly larger than the feed-forward capacitor, causing REF/BYP time constant to dominate over the time constant of the resistor divider network. Operation in Dropout Some degradation of the IMAX current mirror accuracy occurs for output currents less than 50mA when operating in dropout. Overload Recovery Like many IC power regulators, the LT3066 has safe operating area protection. The safe area protection decreases current limit as input-to-output voltage increases, and keeps the power transistor inside a safe operating region for all values of input-to-output voltage. The LT3066 provides some output current at all values of input-to-output voltage up to the device’s Absolute Maximum Rating. When power is first applied, the input voltage rises and the output follows the input; allowing the regulator to start-up into very heavy loads. During start-up, as the input voltage is rising, the input-to-output voltage differential is small, allowing the regulator to supply large output currents. With a high input voltage, a problem can occur wherein the removal of an output short will not allow the output to recover. Other regulators, such as the LT1083/LT1084/ LT1085 family and LT1764A also exhibit this phenomenon, so it is not unique to the LT3066. The problem occurs with a heavy output load when the input voltage is high and the output voltage is low. Common situations are immediately after the removal of a short circuit or if the shutdown pin is pulled high after the input voltage is already turned on. 3066fa For more information www.linear.com/LT3066 LT3066 Series Applications Information The load line intersects the output current curve at two points. If this happens, there are two stable output operating points for the regulator. With this double intersection, the input power supply needs to be cycled down to zero and back up again to recover the output. Thermal Considerations Active Output Discharge 1. Output current multiplied by the input/output voltage differential: The LT3066 includes a low resistance NMOS device which rapidly discharges the output voltage if the part is put in shutdown mode. For a 2.9V output with a 10μF decoupling capacitor, the NMOS discharges the output to 290mV in 750µs if SHDN is driven low. Control circuitry drives the gate of the NMOS high if either the SHDN pin or the IN pin are driven low. In the case where the IN pin is driven to ground, the NMOS rapidly discharges the OUT pin to the threshold voltage of the NMOS, approximately 800mV. From 800mV, the external load discharges the OUT pin at a reduced rate. The SHDN pin threshold to turn on the output discharge NMOS is nominally 560mV at room temperature (see Typical Performance curves). In order to ensure rapid discharge at high temperature, drive SHDN below 200mV. The control circuitry implements protection features which allow the OUT pin to be driven from –1V to 20V without damaging the LT3066. Current limit foldback for output voltages greater than 6V protects the NMOS pull-down, but increases discharge times for higher output voltages. OUTPUT DISCHARGE TIME (ms) 4.0 T = –55°C T = –40°C T = 25°C T = 125°C T = 150°C 3.5 3.0 COUT = 4.7µF VIN = VOUT + 1V 2.5 OUTPUT DISCHARGE 2.0 FOLDBACK STARTS 1.5 1.0 0.5 0 0 2 4 6 8 10 12 14 16 18 20 OUTPUT VOLTAGE (V) 3066 F10 The LT3066’s maximum rated junction temperature of 125°C (E-, I-grades) limits its power handling capability. Two components comprise the power dissipated by the device: IOUT • (VIN – VOUT), and 2. GND pin current multiplied by the input voltage: IGND • VIN GND pin current is determined using the GND Pin Current curves in the Typical Performance Characteristics section. Power dissipation equals the sum of the two components listed above. The LT3066 regulator has internal thermal limiting that protects the device during overload conditions. For continuous normal conditions, do not exceed the maximum junction temperature of 125°C (E-, I-grades). Carefully consider all sources of thermal resistance from junction-to-ambient including other heat sources mounted in proximity to the LT3066. The undersides of the LT3066 DFN and MSE packages have exposed metal from the lead frame to the die attachment. These packages allow heat to directly transfer from the die junction to the printed circuit board metal to control maximum operating junction temperature. The dual-in line pin arrangement allows metal to extend beyond the ends of the package on the topside (component side) of a PCB. Connect this metal to GND on the PCB. The multiple IN and OUT pins of the LT3066 also assist in spreading heat to the PCB. For surface mount devices, heat sinking is accomplished by using the heat spreading capabilities of the PC board and its copper traces. Copper board stiffeners and plated through-holes also can spread the heat generated by power devices. Figure 10. Discharge Time vs Output Voltage 3066fa For more information www.linear.com/LT3066 19 LT3066 Series Applications Information Tables 2 and 3 list thermal resistance as a function of copper area in a fixed board size. All measurements were taken in still air on a 4-layer FR-4 board with 1oz solid internal planes, and 2oz external trace planes with a total board thickness of 1.6mm. For further information on thermal resistance and using thermal information, refer to JEDEC standard JESD51, notably JESD51-12. Table 2. MSOP Measured Thermal Resistance COPPER AREA TOPSIDE (sq mm) BACKSIDE (sq mm) THERMAL RESISTANCE BOARD AREA (JUNCTION-TO-AMBIENT) 2500 2500 2500 34°C/W 1000 2500 2500 34°C/W 225 2500 2500 37°C/W 100 2500 2500 44°C/W Table 3. DFN Measured Thermal Resistance COPPER AREA TOPSIDE (sq mm) BOARD AREA (sq mm) THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 2500 2500 34°C/W 1000 2500 36°C/W 225 2500 39°C/W 100 2500 42°C/W Using a DFN package, the thermal resistance ranges from 31°C/W to 35°C/W depending on the copper area. So the junction temperature rise above ambient approximately equals: 0.614W • 34°C/W = 20.9°C The maximum junction temperature equals the maximum ambient temperature plus the maximum junction temperature rise above ambient or: TJMAX = 85°C + 20.9°C = 105.9°C Protection Features The LT3066 incorporates several protection features that make it ideal for use in battery-powered circuits. In addition to the normal protection features associated with monolithic regulators, such as current limiting and thermal limiting, the device also protects against reverse input voltages, reverse output voltages and reverse output-toinput voltages. Calculating Junction Temperature Current limit protection and thermal overload protection protect the device against current overload conditions at the LT3066’s output. The typical thermal shutdown temperature is 165°C with about 7°C of hysteresis. For normal operation, do not exceed a junction temperature of 125°C (E-, I-grades). Example: Given an output voltage of 5V, an input voltage range of 12V ±5%, a maximum output current range of 75mA and a maximum ambient temperature of 85°C, what is the maximum junction temperature? The LT3066 IN pin withstands reverse voltages of 50V. The device limits current flow to less than 1mA and no negative voltage appears at OUT. The device protects both itself and the load against batteries that are plugged in backwards. The power dissipated by the device equals: Reverse Current 50 IOUT(MAX) • (VIN(MAX) – VOUT) + IGND • VIN(MAX) where: VIN = V SHDN = 2.1V VADJ = VOUT 45 IOUT(MAX) = 75mA VIN(MAX) = 12.6V IGND at (IOUT = 75mA, VIN = 12V) = 3.5mA So: OUPUT CURRENT (µA) 40 35 30 25 20 15 10 5 P = 75mA • (12.6V – 5V) + 3.5mA • 12.6V = 0.614W 0 0 2 4 6 8 10 12 14 16 18 20 VOUT (V) 3066 F11 Figure 11. Reverse Output Current 20 3066fa For more information www.linear.com/LT3066 LT3066 Series Typical Applications Programming Undervoltage Lockout IN VIN > VUVLO IN R1 LT3066 SHDN R2 3066 TA02 VUVLO = R1+R2 • 1.1V R2 Power Supply Sequencing Using PWRGD IN IN 500k LT3066 SHDN PWRGD IN LT3066 SHDN 3066 TA03 Current Monitor LT3066 IMAX 600mV RIMAX = • 500 IOUT(MAX) VIMAX = IOUT • RIMAX 500 TO ADC RIMAX 3066 TA04 3066fa For more information www.linear.com/LT3066 21 LT3066 Series Typical Applications LED Driver/Current Source 5V IN IN OUT LT3066 100k OPEN-LED INDICATOR I = 100mA PWRGD SHDN 22nF LED ADJ 6Ω SHDN ILIM = 150mA GND REF/BYP IMAX 10nF 2k 3066 TA05 Paralleling Regulators for Higher Output Current VIN > 3V IN 10µF PWRGD OUT 500k 19.1k 1% LT3066 PWRGD 10µF 2.5V 1A ADJ 6.04k 1% SHDN SHDN GND IMAX REF/BYP 10nF 49.9Ω IN OUT 10µF 21k 1% 10µF LT3066 PWRGD ADJ 6.04k 1% SHDN GND IMAX REF/BYP 10nF 49.9Ω 1k 1k 0.1µF 10k + LT1637 – 33nF 6.8k 3066 TA06 22 3066fa For more information www.linear.com/LT3066 LT3066 Series Package Description Please refer to http://www.linear.com/product/LT3066#packaging for the most recent package drawings. DE/UE Package 12-Lead Plastic DFN (4mm × 3mm) (Reference LTC DWG # 05-08-1695 Rev D) 0.70 ±0.05 3.30 ±0.05 3.60 ±0.05 2.20 ±0.05 1.70 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 2.50 REF RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ±0.10 (2 SIDES) 7 R = 0.115 TYP 0.40 ±0.10 12 R = 0.05 TYP PIN 1 TOP MARK (NOTE 6) 0.200 REF 3.30 ±0.10 3.00 ±0.10 (2 SIDES) 1.70 ±0.10 0.75 ±0.05 6 0.25 ±0.05 1 PIN 1 NOTCH R = 0.20 OR 0.35 × 45° CHAMFER (UE12/DE12) DFN 0806 REV D 0.50 BSC 2.50 REF 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE A VARIATION OF VERSION (WGED) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3066fa For more information www.linear.com/LT3066 23 LT3066 Series Package Description Please refer to http://www.linear.com/product/LT3066#packaging for the most recent package drawings. MSE Package 12-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1666 Rev G) BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 (.112 ±.004) 5.10 (.201) MIN 2.845 ±0.102 (.112 ±.004) 0.889 ±0.127 (.035 ±.005) 6 1 1.651 ±0.102 (.065 ±.004) 1.651 ±0.102 3.20 – 3.45 (.065 ±.004) (.126 – .136) 12 0.65 0.42 ±0.038 (.0256) (.0165 ±.0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 0.35 REF 4.039 ±0.102 (.159 ±.004) (NOTE 3) 0.12 REF DETAIL “B” CORNER TAIL IS PART OF DETAIL “B” THE LEADFRAME FEATURE. FOR REFERENCE ONLY 7 NO MEASUREMENT PURPOSE 0.406 ±0.076 (.016 ±.003) REF 12 11 10 9 8 7 DETAIL “A” 0° – 6° TYP 3.00 ±0.102 (.118 ±.004) (NOTE 4) 4.90 ±0.152 (.193 ±.006) GAUGE PLANE 0.53 ±0.152 (.021 ±.006) DETAIL “A” 1.10 (.043) MAX 0.18 (.007) SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 1 2 3 4 5 6 0.650 (.0256) BSC NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 24 0.86 (.034) REF 0.1016 ±0.0508 (.004 ±.002) MSOP (MSE12) 0213 REV G 3066fa For more information www.linear.com/LT3066 LT3066 Series Revision History REV DATE DESCRIPTION A 05/16 Add –3.3V, –5V fixed voltage options. PAGE NUMBER 1–26 3066fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LT3066 25 LT3066 Series Typical Application Adjustable High Efficiency Regulator CMDSH-4E 4.5V TO 25V VIN 1µF 10µF 100k BOOST 0.1µF LT3493 SHDN 10µH SW IN 0.1µF MBRM140 47µF ×2 255k 4.7µF LT3066 SHDN 10nF GND FB 10k OUT TP0610L 1M ADJ 100k 0.6V TO 10VOUT 200mA 61.9k 1% PWRGD REF/BYP NOTE: DIFFERENTIAL VOLTAGE ON LT3066 ≈ 1.4V SET BY THE TP0610L P-CHANNEL THRESHOLD. 10µF 10nF IMAX GND 1.2k 22nF 3066 TA07 Related Parts PART NUMBER DESCRIPTION COMMENTS LT1761 100mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20μVRMS, VIN = 1.8V to 20V, ThinSOT™ Package LT1762 150mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20μVRMS, VIN = 1.8V to 20V, MS8 Package LT1763 500mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20μVRMS, VIN = 1.8V to 20V, SO-8 and 3mm × 4mm DFN Packages LT1962 300mA, Low Noise LDO 270mV Dropout Voltage, Low Noise: 20μVRMS, VIN = 1.8V to 20V, MS8 Package LT1964 200mA, Low Noise Negative LDO VIN = –2.2V to –20V, VOUT(MIN) = –1.21V, VDO = 0.34V, IQ = 30μA, ISD = 3μA, Low Noise <30μVRMS, Stable with Ceramic Capacitors, ThinSOT and 3mm × 3mm DFN Packages LT1965 1.1A, Low Noise LDO 290mV Dropout Voltage, Low Noise: 40μVRMS, VIN = 1.8V to 20V, VOUT = 1.2V to 19.5V, Stable with Ceramic Capacitors, TO-220, DD-Pak, MSOP and 3mm × 3mm DFN Packages LT3050 100mA LDO with Diagnostics and Precision Current Limit 340mV Dropout Voltage, Low Noise: 30μVRMS, VIN = 1.8V to 45V, 3mm × 2mm DFN and MSOP Packages LT3055 500mA LDO with Diagnostics and Precision Current Limit 350mV Dropout Voltage, Low Noise: 25μVRMS, VIN = 1.8V to 45V, 4mm × 3mm DFN and MSOP Packages LT3060 100mA Low Noise LDO with Soft-Start 300mV Dropout Voltage, Low Noise: 30μVRMS, VIN = 1.8V to 45V, 2mm × 2mm DFN and ThinSOT Packages LT3061 45V VIN, Micropower, Low Noise, 100mA 250mV Dropout Voltage, Low Noise: 30μVRMS, VIN = 1.6V to 45V, 8-Lead 2mm × 3mm DFN LDO with Output Discharge and MSOP Packages LT3063 45V VIN, Micropower, Low Noise, 200mA 300mV Dropout Voltage, Low Noise: 30μVRMS, VIN = 1.6V to 45V, 8-Lead 2mm × 3mm DFN LDO with Output Discharge and MSOP Packages LT3065 45V VIN, 500mA Low Noise, Linear Regulator with Programmable Current Limit and Power Good 300mV Dropout Voltage, Low Noise: 25μVRMS, VIN = 1.8V to 45V, 10-Lead 3mm × 3mm DFN and 12-lead MSOP Packages LT3080/ LT3080-1 1.1A, Parallelable, Low Noise LDO 300mV Dropout Voltage (2-Supply Operation), Low Noise 40µVRMS, VIN = 1.2V to 36V, VOUT = 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set, Directly Parallelable, Stable with Ceramic Capacitors, TO-220, SOT-223, MSOP and 3mm × 3mm DFN LT3082 200mA, Parallelable, Low Noise LDO Outputs may be Paralleled for Higher Output Current or Heat Spreading, Wide Input Voltage Range: 1.2V to 40V, Low Value Input/Output Capacitors Required: 2.2µF, Single Resistor Sets Output Voltage, 8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages LT3085 500mA, Parallelable, Low Noise LDO 275mV Dropout Voltage (2-Supply Operation), Low Noise 40µVRMS, VIN = 1.2V to 36V, VOUT = 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set, Directly Parallelable, Stable with Ceramic Capacitors, MS8E and 2mm × 3mm DFN-6 Packages 26 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LT3066 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com/LT3066 3066fa LT 0516 REV A • PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2015