3x5 mm LGA Package Guidelines for Printed Circuit Board Design This technical note is intended to provide information about Kionix’s 3 x 5 mm LGA packages and guidelines for developing PCB land pattern layouts. These guidelines are general in nature and based on recommended industry practices. The user must apply their actual experiences and development efforts to optimize designs and processes for their manufacturing techniques and the needs of varying end-use applications. It should be noted that with the proper PCB footprint and solder stencil designs, the package will self-align during the solder reflow process. 3x5 LGA Package Marking • Marking font type • Font size • Line space • Text information st : Arial : 1.5 Point (0.56 mm height) : 0.1mm - 1 line – Device name nd - 2 line – Assembly Build Lot code rd - 3 line – Date code (WWYY) th - 4 line – Pin #1 Dot (0.5 mm diameter) Note - All text lines shall be right justified. Figure 1. 3x5 mm LGA package marking information. 36 Thornwood Dr. – Ithaca, NY 14850 tel: 607-257-1080 – fax:607-257-1146 www.kionix.com - [email protected] © Kionix 2007 03-July-2008 Page 1 of 1 3x5 LGA Package Outline and Dimensions The following diagrams show the outline of the Kionix’s LGA packages with dimensions and tolerances. All dimensions and tolerances conform to ASME Y14.5M-1994. All dimensions are in millimeters and angles are in degrees. Dim. A A1 A2 b D E K e L Min --0.66 0.45 0.75 mm Nom 0.91 0.21 REF 0.7 0.5 3.0 BSC 5.0 BSC 4.0 BSC 0.8 BSC 0.8 Max 1.0 0.74 0.55 0.85 Figure 2. 3 x 5 mm LGA package outline diagram with dimensions. © Kionix 2008 03-July-2008 Page 2 of 2 LGA PCB Layout Recommendations Given the above 3 x 5 mm package dimensions, the following guidelines are recommended: The PCB should be designed with SMD (Solder Mask Defined) openings for the LGA lands. These openings should be an identical mirror image of the bottom pattern of the LGA package. The land size on the PCB should be 100% of the device land. The pin 1 indicator triangle that is exposed on the LGA substrate does not need to be soldered to the PCB and should be left floating. LGA Solder Stencil Guidelines A laser-cut, stainless steel stencil with electro-polished trapezoidal walls is recommended. Solder stencil thickness: 0.150mm for the 3 x 5 LGA The solder stencil openings should be 0.05mm smaller per side than corresponding pad openings. If improved solder release is required, aperture walls can be trapezoidal and the corners rounded. Figure 3. Example of a 3 x 5 mm LGA solder stencil layout © Kionix 2008 03-July-2008 Page 3 of 3 Traces, Vias Vias are not needed for thermal dissipation, as our part doesn't generate much heat. Therefore, only electrical vias are needed. If vias are not in the land pads, capped, plugged, tented, un-capped or un-plugged vias can be used. To ensure optimal performance, vias and traces should not be placed on the top layer directly beneath the accelerometer. The following figures illustrate an example of proper PCB via and trace placement. Obviously, each product will present its own physical limitations for accelerometer placement and trace routing. Therefore, these guidelines are general in nature. Engineering judgment should be used to try to avoid placement directly beneath the accelerometer. Figure 4. Via and Trace “Keepout” (Top Vew) Figure 5. Via and Trace “Keepout” (Side View) © Kionix 2008 03-July-2008 Page 4 of 4 Tape and Reel Dimensions The following section provides information on the tape and reel used for shipping Kionix’s 3 x 5 mm LGA accelerometers. Package LGA (3x5) Tape Width Component Pitch Hole Pitch Reel Diameter 16mm 8mm 4mm 330mm Figure 6. Dimensions of the reel © Kionix 2008 03-July-2008 Page 5 of 5 © Kionix 2008 03-July-2008 Page 6 of 6 Direction of feed Figure 7. Orientation of the parts in the carrier tape and direction of feed © Kionix 2008 03-July-2008 Page 7 of 7 Revision History Rev - Date 03-Jul-08 Description of Change Initial release "Kionix" is a registered trademark of Kionix, Inc. Products described herein are protected by patents issued or pending. No license is granted by implication or otherwise under any patent or other rights of Kionix. The information contained herein is believed to be accurate and reliable but is not guaranteed. Kionix does not assume responsibility for its use or distribution. Kionix also reserves the right to change product specifications, application notes, and technical notes or discontinue any product at any time without prior notice. This publication supersedes and replaces all information previously supplied. © 2008 Kionix, Inc. – All rights reserved © Kionix 2008 03-July-2008 Page 8 of 8