Data Sheet

DISCRETE SEMICONDUCTORS
DATA SHEET
BSP250
P-channel enhancement mode
vertical D-MOS transistor
Product specification
Supersedes data of November 1994
File under Discrete Semiconductors, SC13b
1997 Jun 20
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP250
FEATURES
PINNING - SOT223
• High-speed switching
PIN
SYMBOL
• No secondary breakdown
1
g
gate
• Very low on-resistance.
2
d
drain
3
s
source
4
d
drain
APPLICATIONS
DESCRIPTION
• Low-loss motor and actuator drivers
• Power switching.
DESCRIPTION
4
handbook, halfpage
d
P-channel enhancement mode vertical D-MOS transistor
in a SOT223 plastic SMD package.
g
CAUTION
1
The device is supplied in an antistatic package.
The gate-source input must be protected against static
discharge during transport or handling.
2
3
s
Top view
MAM121
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
VDS
drain-source voltage (DC)
VSD
source-drain diode forward voltage
CONDITIONS
MIN.
MAX.
UNIT
−
−30
V
IS = −1.25 A
−
−1.6
V
VGSO
gate-source voltage (DC)
open drain
−
±20
V
VGSth
gate-source threshold voltage
ID = −1 mA; VDS = VGS
−1
−2.8
V
ID
drain current (DC)
−
−3
A
RDSon
drain-source on-state resistance
ID = −1 A; VGS = −10 V
−
0.25
Ω
Ptot
total power dissipation
Ts = 100 °C
−
5
W
1997 Jun 20
2
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP250
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDS
drain-source voltage (DC)
−
−30
V
VGSO
gate-source voltage (DC)
open drain
−
±20
V
ID
drain current (DC)
Ts ≤ 100 °C
−
−3
A
IDM
peak drain current
note 1
−
−12
A
Ptot
total power dissipation
Ts = 100 °C
−
5
W
Tamb = 25 °C; note 2
−
1.65
W
Tstg
storage temperature
−65
+150
°C
Tj
operating junction temperature
−
150
°C
Source-drain diode
IS
source current (DC)
Ts ≤ 100 °C
−
−1.5
A
ISM
peak pulsed source current
note 1
−
−6
A
Notes
1. Pulse width and duty cycle limited by maximum junction temperature.
2. Device mounted on an epoxy printed-circuit board, 40 × 40 × 1.5 mm; mounting pad for drain lead minimum 6 cm2.
MLB885
2.0
MLB835
−102
handbook, halfpage
handbook, halfpage
Ptot
(W)
ID
(A)
1.6
−10
(1)
tp =
10 µs
1.2
−1
0.8
1 ms
tp
δ= T
P
DC
−10−1
0.4
t
tp
−10−2
−10−1
0
0
50
100
150
200
Tamb (°C)
T
−1
−10
δ = 0.01.
Soldering point temperature Ts = 100 °C.
(1) RDSon limitation.
Fig.2 Power derating curve.
1997 Jun 20
Fig.3 SOAR.
3
VDS (V)
−102
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP250
THERMAL CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
Rth j-a
thermal resistance from junction to ambient
Rth j-s
thermal resistance from junction to soldering point
VALUE
UNIT
75
K/W
10
K/W
note 1
Note
1. Device mounted on an epoxy printed-circuit board, 40 × 40 × 1.5 mm; mounting pad for drain lead minimum 6 cm2.
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V(BR)DSS
drain-source breakdown voltage
VGS = 0; ID = −10 µA
−30
−
−
V
VGSth
gate-source threshold voltage
VGS = VDS ; ID = −1 mA
−1
−
−2.8
V
IDSS
drain-source leakage current
VGS = 0; VDS = −24 V
−
−
−100
nA
IGSS
gate leakage current
VGS = ±20 V; VDS = 0
−
−
±100
nA
IDon
on-state drain current
VGS = −10 V; VDS = −1 V
−3
−
−
A
VGS = −4.5 V; VDS = −5 V
−1
−
−
A
VGS = −4.5 V; ID = −0.5 A
−
0.33
0.4
Ω
RDSon
drain-source on-state resistance
VGS = −10 V; ID = −1 A
−
0.22
0.25
Ω
yfs
forward transfer admittance
VDS = −20 V; ID = −1 A
1
2
−
S
Ciss
input capacitance
VGS = 0; VDS = −20 V; f = 1 MHz −
250
−
pF
Coss
output capacitance
VGS = 0; VDS = −20 V; f = 1 MHz −
140
−
pF
Crss
reverse transfer capacitance
VGS = 0; VDS = −20 V; f = 1 MHz −
50
−
pF
QG
total gate charge
VGS = −10 V; VDS = −15 V;
ID = −2.3 A
−
10
25
nC
QGS
gate-source charge
VGS = −10 V; VDS = −15 V;
ID = −2.3 A
−
1
−
nC
QGD
gate-drain charge
VGS = −10 V; VDS = −15 V;
ID = −2.3 A
−
3
−
nC
Switching times
ton
turn-on time
VGS = 0 to −10 V; VDD = −20 V;
ID = −1 A; RL = 20 Ω
−
20
80
ns
toff
turn-off time
VGS = −10 to 0 V; VDD = −20 V;
ID = −1 A; RL = 20 Ω
−
50
140
ns
−
−
−1.6
V
−
150
200
ns
Source-drain diode
VSD
source-drain diode forward voltage VGD = 0; IS = −1.25 A
trr
reverse recovery time
1997 Jun 20
IS = −1.25 A; di/dt = 100 A/µs
4
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP250
MBE144
600
MBE149
−12
handbook, halfpage
handbook, halfpage V
GS =
ID
−10 V
(A)
−10
C
(pF)
−7.5 V
−6 V
−8
400
−5 V
−6
Ciss
−4.5 V
−4
200
−4 V
Coss
0
−10
0
−20
−3.5 V
−2
Crss
−3 V
−2.5 V
VDS (V)
0
−30
−2
0
−4
−6
−8
−10
−12
V DS (V)
VGS = 0.
Tj = 25 °C.
Tj = 25 °C.
Fig.4
Capacitance as a function of drain source
voltage; typical values.
Fig.5 Output characteristics; typical values.
MBE150
−16
MBE145
−10
handbook, halfpage
handbook, halfpage
ID
(A)
VGS
(V)
−8
−12
−6
−8
−4
−4
0
−2
0
−2
−4
−6
VGS (V)
0
−8
−4
−6
−8
−10
Qg (nC)
VDD = −15 V.
ID = −3 A.
VDS = −10 V.
Tj = 25 °C.
Fig.7
Fig.6 Transfer characteristic, typical values.
1997 Jun 20
−2
0
5
Gate-source voltage as a function of total
gate charge.
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP250
MBE148
−6
MDA218
104
handbook, halfpage
handbook, halfpage
IS
(A)
RDSon
(mΩ)
−4
(1)(2)(3) (4)
(5)
103
(1)
(2)
(3)
−2
0
−0.5
0
−1
−1.5
102
−2
−2.5
VSD (V)
Source current as a function of source-drain
diode forward voltage.
MBE138
1.2
MBE146
k
k
1.1
1.6
1.0
1.4
0.9
1.2
0.8
1.0
0.7
0.8
0.6
50
100
Tj (°C)
150
(1)
(2)
−50
0
50
100
Tj (°C)
150
R DSon at T j
k = ---------------------------------------R DSon at 25 °C
V GSth at T j
k = ------------------------------------V GSth at 25°C
Typical RDSon at:
(1) ID = −1 A; VGS = −10 V.
(2) ID = −0.5 A; VGS = −4.5 V.
Typical VGSth at ID = −1 mA; VDS =VGS = VGSth.
Fig.10 Temperature coefficient of gate-source
threshold voltage.
1997 Jun 20
(4) ID = −3 A.
(5) ID = −6 A.
1.8
handbook, halfpage
0
−8
−10
VGS (V)
Drain-source on-state resistance as a
function of gate-source voltage; typical
values.
handbook, halfpage
−50
−6
(1) ID = −0.1 A.
(2) ID = −0.5 A.
(3) ID = −1 A.
Fig.9
0.6
−4
−VDS ≥ −ID × RDSon; Tj = 25 °C.
VGD = 0.
(1) Tj = 150 °C.
(2) Tj = 25 °C.
(3) Tj = −55 °C.
Fig.8
−2
0
Fig.11 Temperature coefficient of drain-source
on-resistance.
6
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
10
handbook, full pagewidth
Rth j-s
(K/W)
BSP250
MBE147
δ=
0.75
0.5
0.33
0.2
0.1
1
0.05
0.02
tp
δ= T
P
0.01
0
t
tp
T
10−1
10−6
10−5
10−4
10−3
10−2
10−1
tp (s)
1
Fig.12 Transient thermal resistance from junction to soldering point as a function of pulse time; typical values.
1997 Jun 20
7
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP250
PACKAGE OUTLINE
Plastic surface mounted package; collector pad for good heat transfer; 4 leads
D
SOT223
E
B
A
X
c
y
HE
v M A
b1
4
Q
A
A1
1
2
3
Lp
bp
e1
w M B
detail X
e
0
2
4 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
A1
bp
b1
c
D
E
e
e1
HE
Lp
Q
v
w
y
mm
1.8
1.5
0.10
0.01
0.80
0.60
3.1
2.9
0.32
0.22
6.7
6.3
3.7
3.3
4.6
2.3
7.3
6.7
1.1
0.7
0.95
0.85
0.2
0.1
0.1
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
EIAJ
ISSUE DATE
96-11-11
97-02-28
SOT223
1997 Jun 20
EUROPEAN
PROJECTION
8
Philips Semiconductors
Product specification
P-channel enhancement mode
vertical D-MOS transistor
BSP250
DEFINITIONS
Data Sheet Status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1997 Jun 20
9
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
NOTES
1997 Jun 20
10
BSP250
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
NOTES
1997 Jun 20
11
BSP250
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© Philips Electronics N.V. 1997
SCA54
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Printed in The Netherlands
137107/00/02/pp12
Date of release: 1997 Jun 20
Document order number:
9397 750 02331