PHILIPS PHC21025

DISCRETE SEMICONDUCTORS
DATA SHEET
PHC21025
Complementary enhancement
mode MOS transistors
Product specification
Supersedes data of November 1994
File under Discrete Semiconductors, SC13b
1997 Jun 20
Philips Semiconductors
Product specification
Complementary enhancement
mode MOS transistors
PHC21025
FEATURES
PINNING - SOT96-1 (SO8)
• High-speed switching
PIN
SYMBOL
DESCRIPTION
• No secondary breakdown
1
s1
source 1
• Very low on-resistance.
2
g1
gate 1
3
s2
source 2
APPLICATIONS
4
g2
gate 2
• Motor and actuator driver
5
d2
drain 2
• Power management
6
d2
drain 2
• Synchronized rectification.
7
d1
drain 1
8
d1
drain 1
DESCRIPTION
One N-channel and one P-channel enhancement mode
MOS transistor in an 8-pin plastic SOT96-1 (SO8)
package.
d1 d1
handbook, halfpage
8
5
1
4
d2 d2
CAUTION
The device is supplied in an antistatic package.
The gate-source input must be protected against static
discharge during transport or handling.
MAM118
g1
s1
s2
g2
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
Per channel
VDS
VSD
drain-source voltage (DC)
N-channel
−
30
V
P-channel
−
−30
V
source-drain diode forward voltage
N-channel
IS = 1.25 A
−
1.2
V
P-channel
IS = −1.25 A
−
−1.6
V
open drain
−
±20
V
VGSO
gate-source voltage (DC)
VGSth
gate-source threshold voltage
ID
RDSon
Ptot
1997 Jun 20
V
N-channel
VDS = VGS; ID = 1 mA
1
2.8
V
P-channel
VDS = VGS ; ID = −1 mA
−1
−2.8
V
N-channel
−
3.5
A
P-channel
−
−2.3
A
drain current (DC)
drain-source on-state resistance
N-channel
VGS = 10 V; ID = 2.2 A
−
0.1
Ω
P-channel
VGS = −10 V; ID = −1 A
−
0.25
Ω
Ts = 80 °C
−
2
W
total power dissipation
2
Philips Semiconductors
Product specification
Complementary enhancement
mode MOS transistors
PHC21025
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
Per channel
VDS
drain-source voltage (DC)
−
30
V
−
−30
V
−
±20
V
N-channel
−
3.5
A
P-channel
−
−2.3
A
−
14
A
N-channel
P-channel
VGSO
gate-source voltage (DC)
open drain
ID
drain current (DC)
Ts ≤ 80 °C
IDM
peak drain current
note 1
N-channel
−
−10
A
Ts = 80 °C; note 2
−
2
W
Tamb = 25 °C; note 3
−
2
W
Tamb = 25 °C; note 4
−
1
W
Tamb = 25 °C; note 5
−
1.3
W
P-channel
Ptot
total power dissipation
Tstg
storage temperature
−65
+150
°C
Tj
operating junction temperature
−
150
°C
N-channel
−
1.5
A
P-channel
−
−1.25
A
N-channel
−
6
A
P-channel
−
−5
A
Source-drain diode
IS
ISM
Ts ≤ 80 °C
source current (DC)
peak pulsed source current
note 1
Notes
1. Pulse width and duty cycle limited by maximum junction temperature.
2. Maximum permissible dissipation per MOS transistor. Both devices may be loaded up to 2 W at the same time.
3. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an Rth a-tp
(ambient to tie-point) of 27.5 K/W.
4. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an Rth a-tp
(ambient to tie-point) of 90 K/W.
5. Maximum permissible dissipation if only one MOS transistor dissipates. Device mounted on printed-circuit board with
an Rth a-tp (ambient to tie-point) of 90 K/W.
1997 Jun 20
3
Philips Semiconductors
Product specification
Complementary enhancement
mode MOS transistors
PHC21025
MLB836
2.5
MLB833 - 1
2
10
handbook, halfpage
handbook, halfpage
P tot
ID
(A)
(W)
2.0
(1)
10
tp =
10 µs
1.5
1
1 ms
1.0
tp
δ= T
P
10
0.5
1
DC
0.1 s
t
tp
T
0
50
0
100
150
10
200
o
2
10
T s ( C)
1
1
10
V
DS
δ = 0.01.
Ts = 80 °C.
(1) RDSon limitation.
Fig.2 Power derating curve.
Fig.3 SOAR; N-channel.
MBE155
10 2
handbook, halfpage
ID
(A)
10
tp =
10 µs
(1)
1
1 ms
tp
δ= T
P
10
1
DC
0.1 s
t
tp
T
10
2
10
1
1
10
V
DS
(V)
10 2
δ = 0.01.
Ts = 80 °C.
(1) RDSon limitation.
Fig.4 SOAR; P-channel.
1997 Jun 20
4
(V)
10 2
Philips Semiconductors
Product specification
Complementary enhancement
mode MOS transistors
PHC21025
THERMAL CHARACTERISTICS
SYMBOL
Rth j-s
PARAMETER
VALUE
UNIT
35
K/W
thermal resistance from junction to soldering point
CHARACTERISTICS
Tj = 25 °C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
Per channel
V(BR)DSS
VGSth
IDSS
IGSS
IDon
RDSon
drain-source breakdown voltage
N-channel
VGS = 0; ID = 10 µA
30
−
−
V
P-channel
VGS = 0; ID = −10 µA
−30
−
−
V
N-channel
VGS = VDS ; ID = 1 mA
1
−
2.8
V
P-channel
VGS = VDS ; ID = −1 mA
−1
−
−2.8
V
N-channel
VGS = 0; VDS = 24 V
−
−
100
nA
P-channel
VGS = 0; VDS = −24 V
−
−
−100
nA
N-channel
−
−
±100
nA
P-channel
−
−
±100
nA
3.5
−
−
A
gate-source threshold voltage
drain-source leakage current
gate leakage current
on-state drain current
N-channel
VGS = 10 V; VDS = 1 V
VGS = 4.5 V; VDS = 5 V
2
−
−
A
P-channel
VGS = −10 V; VDS = −1 V
−2.3
−
−
A
VGS = −4.5 V; VDS = −5 V
−1
−
−
A
drain-source on-state resistance
VGS = 4.5 V; ID = 1 A
−
0.11
0.2
Ω
VGS = 10 V; ID = 2.2 A
−
0.08
0.1
Ω
VGS = −4.5 V; ID = − 0.5 A
−
0.33
0.4
Ω
VGS = −10 V; ID = −1 A
−
0.22
0.25
Ω
N-channel
VDS = 20 V; ID = 2.2 A
2
4.5
−
S
P-channel
VDS = −20 V; ID = −1 A
1
2
−
S
N-channel
VGS = 0; VDS = 20 V; f = 1 MHz
−
250
−
pF
P-channel
VGS = 0; VDS = −20 V; f = 1 MHz
−
250
−
pF
N-channel
VGS = 0; VDS = 20 V; f = 1 MHz
−
140
−
pF
P-channel
VGS = 0; VDS = −20 V; f = 1 MHz
−
140
−
pF
N-channel
P-channel
yfs
Ciss
Coss
1997 Jun 20
VGS = ±20 V; VDS = 0
forward transfer admittance
input capacitance
output capacitance
5
Philips Semiconductors
Product specification
Complementary enhancement
mode MOS transistors
SYMBOL
Crss
QG
QGS
QGD
PHC21025
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
reverse transfer capacitance
N-channel
VGS = 0; VDS = 20 V; f = 1 MHz
−
50
−
pF
P-channel
VGS = 0; VDS = −20 V; f = 1 MHz
−
50
−
pF
N-channel
VGS = 10 V; VDS = 15 V; ID = 2.3 A
−
10
30
nC
P-channel
VGS = −10 V; VDS = −15 V; ID = −2.3 A −
10
25
nC
total gate charge
gate-source charge
N-channel
VGS = 10 V; VDS = 15 V; ID = 2.3 A
−
1
−
nC
P-channel
VGS = −10 V; VDS = −15 V; ID = −2.3 A −
1
−
nC
2.5
−
nC
3
−
nC
gate-drain charge
−
N-channel
VGS = 10 V; VDS = 15 V; ID = 2.3 A
P-channel
VGS = −10 V; VDS = −15 V; ID = −2.3 A −
Switching times
ton
toff
turn-on time
N-channel
VGS = 0 to 10 V; VDD = 20 V;
ID = 1 A; RL = 20 Ω
−
15
40
ns
P-channel
VGS = 0 to −10 V; VDD = −20 V;
ID = −1 A; RL = 20 Ω
−
20
80
ns
N-channel
VGS = 10 to 0 V; VDD = 20 V;
ID = 1 A; RL = 20 Ω
−
25
140
ns
P-channel
VGS = −10 to 0 V; VDD = −20 V;
ID = −1 A; RL = 20 Ω
−
50
140
ns
N-channel
VGD = 0; IS = 1.25 A
−
−
1.2
V
P-channel
VGD = 0; IS = −1.25 A
−
−
−1.6
V
N-channel
IS = 1.25 A; di/dt = 100 A/µs
−
35
100
ns
P-channel
IS = −1.25 A; di/dt = 100 A/µs
−
150
200
ns
turn-off time
Source-drain diode
VSD
trr
1997 Jun 20
source-drain diode forward
voltage
reverse recovery time
6
Philips Semiconductors
Product specification
Complementary enhancement
mode MOS transistors
PHC21025
MBE137
MBE144
600
600
handbook, halfpage
handbook, halfpage
C
(pF)
C
(pF)
400
400
C iss
C iss
200
200
Coss
Coss
C rss
C rss
0
0
0
10
20
V DS (V)
0
30
10
VGS = 0.
Tj = 25 °C.
VGS = 0.
Tj = 25 °C.
Fig.5
Fig.6
Capacitance as a function of drain-source
voltage; N-channel; typical values.
20
V DS (V)
30
Capacitance as a function of drain source
voltage; P-channel; typical values.
handbook, halfpage
MBE142
10 V
ID
MBE154
10
16
VGS =
handbook, halfpage
VGS =
10 V
ID
(A)
8
6V
(A)
7.5 V
6V
12
5V
6
8
5V
4.5 V
4.5 V
4
4V
4V
4
2
3.5 V
3.5 V
3V
2.5 V
3V
0
0
0
2
4
6
8
10
V DS (V)
0
12
2
Tj = 25 °C.
Tj = 25 °C.
Fig.7
Fig.8
Output characteristics; typical values;
N-channel.
1997 Jun 20
7
4
6
8
10
V DS (V)
12
Output characteristics; typical values;
P-channel.
Philips Semiconductors
Product specification
Complementary enhancement
mode MOS transistors
PHC21025
MBE141
MBE157
16
10
handbook, halfpage
handbook, halfpage
ID
(A)
ID
(A)
8
12
6
8
4
4
2
0
0
0
2
4
6 V
8
GS (V)
0
2
4
6
V GS (V)
8
VDS = 10 V.
Tj = 25 °C.
VDS = −10 V.
Tj = 25 °C.
Fig.9
Fig.10 Transfer characteristic; typical values;
P-channel.
Transfer characteristic; typical values;
N-channel.
MBE136
10
MBE145
10
VGS
handbook, halfpage
handbook, halfpage
VGS
(V)
(V)
8
8
6
6
4
4
2
2
0
0
2
4
0
6 Q (nC) 8
g
0
2
4
6
8
10
Q g (nC)
VDD = 15 V.
ID = 3.5 A.
VDD = −15 V.
ID = −2.3 A.
Fig.11 Gate-source voltage as a function of total
gate charge; N-channel.
Fig.12 Gate-source voltage as a function of total
gate charge; P-channel.
1997 Jun 20
8
Philips Semiconductors
Product specification
Complementary enhancement
mode MOS transistors
PHC21025
MBE159
6
MBE158
6
handbook, halfpage
handbook, halfpage
IS
(A)
IS
(A)
4
4
(1)
(2)
(1)
(3)
(2)
(3)
2
2
0
0
0
0.5
1
V SD (V)
0
1.5
0.5
1
1.5
2
V SD (V)
VGD = 0.
(1) Tj = 150 °C.
(2) Tj = 25 °C.
(3) Tj = −55 °C.
VGD = 0.
(1) Tj = 150 °C.
(2) Tj = 25 °C.
(3) Tj = −55 °C.
Fig.13 Source current as a function of source-drain
diode forward voltage; N-channel.
Fig.14 Source current as a function of source-drain
diode forward voltage; P-channel.
MDA217
104
handbook, halfpage
MDA165
104
handbook, halfpage
RDSon
(mΩ)
RDSon
(1)(2)(3)(4)(5)(6)
(mΩ)
(1) (2)(3) (4) (5)
103
103
102
10
0
2
4
6
8
102
10
VGS (V)
VDS ≥ ID × RDSon; Tj = 25 °C.
(1) ID = 0.1 A.
(2) ID = 0.5 A.
(3) ID = 1 A.
−2
−4
−6
−8
−10
VGS (V)
−VDS ≥ −ID × RDSon; Tj = 25 °C.
(1) ID = −0.1 A.
(2) ID = −0.5 A.
(3) ID = −1 A.
(4) ID = 2.2 A.
(5) ID = 3.5 A.
(6) ID = 7 A.
Fig.15 Drain-source on-state resistance as a
function of gate-source voltage; typical
values; N-channel.
1997 Jun 20
0
(4) ID = −2.3 A.
(5) ID = −4.5 A.
Fig.16 Drain-source on-state resistance as a
function of gate-source voltage; typical
values; P-channel.
9
Philips Semiconductors
Product specification
Complementary enhancement
mode MOS transistors
PHC21025
MBE139
1.8
MBE138
1.2
handbook, halfpage
handbook, halfpage
k
k
1.6
1.1
(1)
1.4
1.0
(2)
1.2
0.9
1.0
0.8
0.8
0.7
0.6
0.6
50
0
50
100
50
150
o
T j ( C)
0
R DSon at T j
k = ---------------------------------------R DSon at 25 °C
V GSth at T j
k = ------------------------------------V GSth at 25°C
50
100
o
150
T j ( C)
Typical VGSth at ID = 1 mA; VDS =VGS = VGSth.
Typical RDSon at:
(1) ID = 2.2 A; VGS = 10 V.
(2) ID = 1 A; VGS = 4.5 V.
Fig.17 Temperature coefficient of gate-source
threshold voltage; N and P-channels.
Fig.18 Temperature coefficient of drain-source
on-resistance; N-channel.
MBE146
1.8
handbook, halfpage
k
1.6
(1)
(2)
1.4
1.2
1.0
0.8
0.6
50
0
R DSon at T j
k = ---------------------------------------R DSon at 25 °C
50
100
o
150
T j ( C)
Typical RDSon at:
(1) ID = −1 A; VGS = −10 V.
(2) ID = −0.5 A; VGS = −4.5 V.
Fig.19 Temperature coefficient of drain-source
on-resistance; P-channel.
1997 Jun 20
10
Philips Semiconductors
Product specification
Complementary enhancement
mode MOS transistors
PHC21025
MBE152
10 2
R th j-s
(K/W)
δ=
0.75
10
0.33
0.5
0.2
0.1
0.05
1
0.02
tp
δ= T
P
0.01
0
t
tp
T
10
1
10
6
10
5
10
4
10
3
10
2
10
1
t p (s)
1
Fig.20 Transient thermal resistance from junction to soldering point as a function of pulse time; typical values.
1997 Jun 20
11
Philips Semiconductors
Product specification
Complementary enhancement
mode MOS transistors
PHC21025
PACKAGE OUTLINE
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
D
E
A
X
c
y
HE
v M A
Z
5
8
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
1
L
4
e
detail X
w M
bp
0
2.5
5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (2)
e
HE
L
Lp
Q
v
w
y
Z (1)
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
5.0
4.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
0.25
0.1
0.7
0.3
0.01
0.019 0.0100
0.014 0.0075
0.20
0.19
0.16
0.15
0.244
0.039 0.028
0.050
0.041
0.228
0.016 0.024
inches
0.010 0.057
0.069
0.004 0.049
0.01
0.01
0.028
0.004
0.012
θ
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT96-1
076E03S
MS-012AA
1997 Jun 20
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
95-02-04
97-05-22
12
o
8
0o
Philips Semiconductors
Product specification
Complementary enhancement
mode MOS transistors
PHC21025
DEFINITIONS
Data Sheet Status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1997 Jun 20
13
Philips Semiconductors
Product specification
Complementary enhancement
mode MOS transistors
PHC21025
NOTES
1997 Jun 20
14
Philips Semiconductors
Product specification
Complementary enhancement
mode MOS transistors
PHC21025
NOTES
1997 Jun 20
15
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Norway: Box 1, Manglerud 0612, OSLO,
Tel. +47 22 74 8000, Fax. +47 22 74 8341
Philippines: Philips Semiconductors Philippines Inc.,
106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474
Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. +48 22 612 2831, Fax. +48 22 612 2327
Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,
Tel. +7 095 755 6918, Fax. +7 095 755 6919
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,
Tel. +65 350 2538, Fax. +65 251 6500
Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. +27 11 470 5911, Fax. +27 11 470 5494
South America: Rua do Rocio 220, 5th floor, Suite 51,
04552-903 São Paulo, SÃO PAULO - SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 829 1849
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 3 301 6312, Fax. +34 3 301 4107
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 632 2000, Fax. +46 8 632 2745
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2686, Fax. +41 1 481 7730
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
Internet: http://www.semiconductors.philips.com
© Philips Electronics N.V. 1997
SCA54
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
137107/00/02/pp16
Date of release: 1997 Jun 20
Document order number:
9397 750 02509