20160423075913cYzTjsv

CI Series
Multilayer Ceramic Chip Capacitor
Array
MERITEK
RoHS
FEATURES
 Reduction in required real estate (more than 50%)
 Reduced cost, space and time for placement on PCB
 Reduction in number of solder joints
 Easier PCB design
 Reduced waste from tape and reel packaging process
 Protect EMI bypassing digital signal line noise
APPLICATION
 For use as bypass for digital and analog signal line noise
 Computer motherboards and peripherals
 The other common electronic circuits
STRUCTURE AND DIMENSION
Type
Element
L (mm)
W (mm)
T (mm)
0805 (2012)
4
2.00±0.15
1.25±0.15
0.85±0.10
1206 (3216)
4
3.20±0.15
1.60±0.15
0.80±0.10
BW(mm)
SW(mm)
S1 (mm)
P (mm)
T
0.25±0.10
0.20±0.10
0.25±0.10
0.50±0.10
B
0.40±0.15
0.3±0.20
0.40±0.20
0.80±0.15
PART NUMBERING SYSTEM
CI
1206
XR
101
K
500
Meritek Series, C-array
Size
Dielectric
CODE
CG
XR
YV
COG (NP0)
X7R
Y5V
Capacitance
CODE
8R2
101
104
223
pF
8.2
100
--
--
nF
--
--
100
22
μF
--
--
0.1
0.022
CODE
Tolerance
Code
Tolerance
Code
Tolerance
B
±.10pF
G
±2%
M
±20%
C
±.25pF
J
±5%
Z
+80/-20%
D
±.50pF
K
±10%
P
+1000/0%
Tolerance
For values less than 10 pF use C or D
Rated Voltage
2 significant digits + number of zeros
CODE
R.V.
100
10V
160
16V
250
25V
500
50V
101
100V
Rev. 7a
CI Series
Multilayer Ceramic Chip Capacitor
Array
MERITEK
RoHS
ELECTRICAL SPECIFICATIONS
Dielectric
NPO
X7R
Y5V
Size Inch (mm)
0805 (2012)
1206 (3216)
0805 (2012)
1206 (3216)
1206 (3216)
Capacitance*
10pF to 270pF
10pF to 470pF
1000pF to 100nF
180pF to 100nF
10nF to 100nF
Capacitance tolerance**
J (±5%), K (±10%)
Rated voltage (WVDC)
25V,50V, 100V
Cap<30pF,
Cap≥30pF,
Tan ð*
Insulation resistance at Ur
K (±10%), M (±20%)
10V, 16V, 25V, 50V
≥10GΩ
16V, 50V
≤2.5%
≤3.5%
≤5.0%
Ur=50V, ≤5%
Ur=16V, ≤7%
≥10GΩ or RxC≥500ΩxF whichever is less
Operating temperature
Capacitance characteristic
16V, 25V, 50V
Ur=50V,
Ur = 25V&16V,
Ur=10V,
Q≥400+20C
Q≥1000
Z(-20/+80%)
-55 to +125°C
-25 to +85°C
±30ppm
±15%
Termination
+30/-80%
Ni/Sn (lead-free termination)
* Measured at 30~70% related humidity.
NP0: Apply 1.0±0.2Vrms, 1.0MHz±10% at the conditions of 25°C ambient temperature.
X7R: Apply 1.0±0.2Vrms, 1.0kHz±10% at the conditions of 25°C ambient temperature.
Y5V: Apply 1.0±0.2Vrms, 1.0kHz±10% at the conditions of 20°C ambient temperature.
** Preconditioning for Class II MLCC: Perform a heat treatment at 150±10°C for 1hour, then leave in ambient condition for 24±2 hours before
measurement.
CAPACITANCE RANGE
DIELECTRIC
0508 (1220)
SIZE
RATED VOLTAGE (VDC)
10 pF(100)
NPO
0612 (1632)
X7R
25
50
100
T
T
T
10
16
25
NPO
50
X7R
25
50
100
B
B
B
16
Capacitance
15 pF (150)
T
T
T
B
B
B
22 pF (220)
T
T
T
B
B
B
33 pF (330)
T
T
T
B
B
B
47 pF (470)
T
T
T
B
B
B
68 pF (680)
T
T
T
B
B
B
100 pF (101)
T
T
T
B
B
B
150 pF (151)
T
T
T
B
B
B
180 pF (181)
T
T
T
B
B
B
220 pF (221)
T
T
T
B
B
B
270 pF (271)
T
T
T
B
B
B
330 pF (331)
B
B
B
470 pF (471)
B
B
B
680 pF (681)
1000 pF (102)
T
T
T
T
1500 pF (152)
T
T
T
T
2200 pF (222)
T
T
T
T
3300 pF (332)
T
T
T
T
4700 pF (472)
T
T
T
T
6800 pF (682)
T
T
T
T
0.010 µF (103)
T
T
T
0.015 µF (153)
T
T
T
B
0.022 µF (223)
T
T
T
B
0.03 µF (333)
T
T
T
B
0.047 µF (473)
T
T
T
B
0.068 µF (683)
T
T
T
B
0.10 µF (104)
T
T
T
B
Note: The letter in cell is expressed the symbol of product thinkness. T is 0.85±0.10mm, and B is 0.80±0.10mm.
Y5V
25
50
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
16
50
B
B
B
B
B
B
B
B
Rev. 7a