SLVU2.8-4 EPD TVS Diode Array For ESD and Latch-Up Protection PRELIMINARY PROTECTION PRODUCTS Description Features The SLV series of transient voltage suppressors are designed to protect low voltage, state-of-the-art CMOS semiconductors from transients caused by electrostatic discharge (ESD), cable discharge events (CDE), lightning and other induced voltage surges. 400 Watts peak pulse power (tp = 8/20µs) Transient protection for high speed data lines to The devices are constructed using Semtech’s proprietary EPD process technology. The EPD process provides low standoff voltages with significant reductions in leakage currents and capacitance over siliconavalanche diode processes. The SLVU2.8-4 features integrated low capacitance compensation diodes that reduce the typical capacitance to 5pF per line. This, combined with low leakage current, means signal integrity is preserved in high-speed applications such as 10/100 Ethernet. Mechanical Characteristics The SLVU2.8-4 is in an SO-8 package and may be used to protect two high-speed line pairs. The “flow-thru” design minimizes trace inductance and reduces voltage overshoot associated with ESD events. The low clamping voltage of the SLVU2.8-4 minimizes the stress on the protected IC. Circuit Diagram Pin 2, 4 JEDEC SO-8 package Molding compound flammability rating: UL 94V-0 Marking : Part number, date code, logo Packaging : Tape and Reel Applications The SLV series TVS diodes will meet the surge requirements of IEC 61000-4-2, Level 4. Pin 1, 3 IEC 61000-4-2 (ESD) ±15kV (air), ±8kV (contact) IEC 61000-4-4 (EFT) 40A (5/50ns) IEC 61000-4-5 (Lightning) 24A (8/20µs) Protects two line pairs (four lines) Comprehensive pin out for easy board layout Low capacitance Low leakage current Low operating and clamping voltages Solid-state EPD TVS process technology 10/100 Ethernet WAN/LAN Equipment Switching Systems Desktops, Servers, and Notebooks Instrumentation Base Stations Analog Inputs Schematic & PIN Configuration Pin 6, 8 Pin 5, 7 SO-8 (Top View) Revision 1/18/2008 1 www.semtech.com SLVU2.8-4 PROTECTION PRODUCTS Absolute Maximum Rating R ating Symbol Value Units Peak Pulse Power (tp = 8/20µs) Pp k 400 Watts Peak Pulse Current (tp = 8/20µs) IP P 24 A ESD per IEC 61000-4-2 (Air) ESD per IEC 61000-4-2 (Contact) VESD 25 15 kV Lead Soldering Temperature TL 260 (10 seconds) o Operating Temperature TJ -55 to +125 o TSTG -55 to +150 o Storage Temperature C C C Electrical Characteristics SLVU2.8-4 Parameter Reverse Stand-Off Voltage Symbol Conditions Minimum Typical VRWM Maximum Units 2.8 V Punch-Through Voltage V PT IPT = 2µA 3.0 V Snap-Back Voltage VSB ISB = 50mA 2.8 V Reverse Leakage Current IR VRWM = 2.8V, T=25°C (Each Line) 1 µA Clamping Voltage VC IPP = 2A, tp = 8/20µs (Each Line) 5.5 V Clamping Voltage VC IPP = 5A, tp = 8/20µs (Each Line) 8.5 V Clamping Voltage VC IPP = 24A, tp = 8/20µs (Each Line) 15 V Junction Capacitance Cj VR = 0V, f = 1MHz (Each Line) 2008 Semtech Corp. 2 5 pF www.semtech.com SLVU2.8-4 PRELIMINARY PROTECTION PRODUCTS Typical Characteristics Non-Repetitive Peak Pulse Power vs. Pulse Time Power Derating Curve 110 10 100 % of Rated Power or IPP Peak Pulse Power - Ppk (kW) 90 1 0.1 80 70 60 50 40 30 20 10 0 0.01 0.1 1 10 100 0 1000 25 75 100 125 150 o Pulse Waveform Clamping Voltage vs. Peak Pulse Current 110 14 100 12 Clamping Voltage - VC (V) 90 80 Percent of IPP 50 Ambient Temperature - TA ( C) Pulse Duration - tp (µs) 70 e -t 60 50 40 td = I PP /2 30 10 8 6 4 Waveform Parameters: tr = 8µs td = 20µs 2 20 10 0 0 0 5 10 15 20 25 0 30 5 10 15 20 25 Peak Pulse Current - IPP (A) T im e (µs) Normalized Capacitance vs. Reverse Voltage Insertion Loss S21 CH1 1.6 S21 LOG 10 dB/ REF 0 dB 1.4 CJ(VR) / C J(VR=0) 1.2 1 0.8 0.6 0.4 0.2 f = 1 MHz 0 0 0.5 1 1.5 2 2.5 3 Reverse Voltage - VR (V) START 2008 Semtech Corp. 3 .030 000 MHz STOP 3 000. 000 000 MHz www.semtech.com SLVU2.8-4 PROTECTION PRODUCTS Applications Information SLVU2.8-4 Circuit Diagram Device Connection for Protection of Four Data Lines Electronic equipment is susceptible to transient disturbances from a variety of sources including: ESD to an open connector or interface, direct or nearby lightning strikes to cables and wires, and charged cables “hot plugged” into I/O ports. The SLVU2.8-4 is designed to protect sensitive components from damage and latchup which may result from such transient events. The SLVU2.8-4 can be configured to protect two highspeed line pairs. The device is connected as follows: 1 . Protection of two high-speed line pairs: The SLVU2.8-4 is designed such that the data lines are routed through the device. The first line pair enters at pins 1 and 2 and exit at pins 8 and 7 respectively. The second line pair enters at pins 3 and 4 and exits at pins 6 and 5. The traces must be connected at the bottom of the device as shown. Low Capacitance Protection of Two Differential Line Pairs Circuit Board Layout Recommendations for Suppression of ESD. Good circuit board layout is critical for the suppression of ESD induced transients. The following guidelines are recommended: z Place the SLVU2.8-4 near the input terminals or connectors to restrict transient coupling. z Minimize the path length between the TVS and the protected line. z Minimize all conductive loops including power and ground loops. z The ESD transient return path to ground should be kept as short as possible. z Never run critical signals near board edges. z Use ground planes whenever possible. 2008 Semtech Corp. 4 Line 1 1 8 Line 1 Line 2 2 7 Line 2 Line 3 3 6 Line 3 Line 4 4 5 Line 4 www.semtech.com SLVU2.8-4 PRELIMINARY PROTECTION PRODUCTS Typical Applications 10/100 Ethernet Protection Circuit 2008 Semtech Corp. 5 www.semtech.com SLVU2.8-4 PROTECTION PRODUCTS Applications Information (continued) EPD TVS Characteristics IPP The SLVU2.8-4 is constructed using Semtech’s proprietary EPD technology. The structure of the EPD TVS is vastly different from the traditional pn-junction devices. At voltages below 5V, high leakage current and junction capacitance render conventional avalanche technology impractical for most applications. However, by utilizing the EPD technology, the SLVU2.8-4 can effectively operate at 2.8V while maintaining excellent electrical characteristics. ISB IPT VBRR IR VRWM VSB VPT VC IBRR The EPD TVS employs a complex nppn structure in contrast to the pn structure normally found in traditional silicon-avalanche TVS diodes. The EPD mechanism is achieved by engineering the center region of the device such that the reverse biased junction does not avalanche, but will “punch-through” to a conducting state. This structure results in a device with superior dc electrical parameters at low voltages while maintaining the capability to absorb high transient currents. EPD TVS IV Characteristic Curve The IV characteristic curve of the EPD device is shown in Figure 1. The device represents a high impedance to the circuit up to the working voltage (VRWM). During a transient event, the device will begin to conduct as it is biased in the reverse direction. When the punchthrough voltage (VPT) is exceeded, the device enters a low impedance state, diverting the transient current away from the protected circuit. When the device is conducting current, it will exhibit a slight “snap-back” or negative resistance characteristic due to its structure. This must be considered when connecting the device to a power supply rail. To return to a non-conducting state, the current through the device must fall below the snap-back current (approximately < 50mA). 2008 Semtech Corp. 6 www.semtech.com SLVU2.8-4 PRELIMINARY PROTECTION PRODUCTS Applications Information - SPICE Model 0.8 nH SLVU2.8-4 Spice Model SLVU2.8-4 Spice Parameters 2008 Semtech Corp. Parameter Unit D1 (T VS) D2 (LCR D) IS Amp 6.09E-14 8.57E-9 BV Volt 3.4 420 VJ Volt 13.8 0.62 RS Ohm 0.389 0.15 IB V A mp 10E-3 10E-3 CJO Farad 24.75E-12 3.15E-12 TT sec 2.541E-9 2.541E-9 M -- 0.145 0.113 N -- 1.1 1.1 EG eV 1.11 1.11 7 www.semtech.com SLVU2.8-4 PROTECTION PRODUCTS Outline Drawing - SO-8 A h D e N h H 2X E/2 E1 E 1 0.25 L (L1) e/2 DETAIL B 01 A D aaa C SEATING PLANE A2 A C SEE DETAIL A .053 .069 .010 .004 .065 .049 .012 .020 .010 .007 .189 .193 .197 .150 .154 .157 .236 BSC .050 BSC .010 .020 .016 .028 .041 (.041) 8 8° 0° .004 .010 .008 1.35 1.75 0.10 0.25 1.25 1.65 0.31 0.51 0.17 0.25 4.80 4.90 5.00 3.80 3.90 4.00 6.00 BSC 1.27 BSC 0.25 0.50 0.40 0.72 1.04 (1.04) 8 0° 8° 0.10 0.25 0.20 SIDE VIEW A1 bxN bbb DIMENSIONS INCHES MILLIMETERS MIN NOM MAX MIN NOM MAX A A1 A2 b c D E1 E e h L L1 N 01 aaa bbb ccc c GAGE PLANE 2 ccc C 2X N/2 TIPS DIM C A-B D NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MS-012, VARIATION AA. Land Pattern - SO-8 X DIM (C) G C G P X Y Z Z Y DIMENSIONS INCHES MILLIMETERS (.205) .118 .050 .024 .087 .291 (5.20) 3.00 1.27 0.60 2.20 7.40 P NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. 2. REFERENCE IPC-SM-782A, RLP NO. 300A. 2008 Semtech Corp. 8 www.semtech.com SLVU2.8-4 PRELIMINARY PROTECTION PRODUCTS Marking SC YYWW SLVU2.8 -4 1 Top View Note: (1) yyww = Date Code Ordering Information Part Number Working Voltage Qty/Pkg R eel Size SLVU2.8-4.TB 2.8V 500/Reel 7 Inch 2.8V 500/Reel 7 Inch 2.8V 98/Tube N /A 2.8V 98/Tube N /A SLVU2.8-4.TBT (1) SLVU2.8-4 SLVU2.8-4.T (1) Note: (1) Lead-Free Product Contact Information Semtech Corporation Protection Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804 2008 Semtech Corp. 9 www.semtech.com