SEMTECH SLVU2.8-4TB

SLVU2.8-4
EPD TVS™ Diode Array
For ESD and Latch-Up Protection
PRELIMINARY
PROTECTION PRODUCTS
Description
Features
The SLV series of transient voltage suppressors are
designed to protect low voltage, state-of-the-art CMOS
semiconductors from transients caused by electrostatic discharge (ESD), cable discharge events (CDE),
lightning and other induced voltage surges.
u 400 Watts peak pulse power (tp = 8/20µs)
u Transient protection for high speed data lines to
The devices are constructed using Semtech’s proprietary EPD process technology. The EPD process provides low standoff voltages with significant reductions
in leakage currents and capacitance over siliconavalanche diode processes. The SLVU2.8-4 features
integrated low capacitance compensation diodes that
reduce the maximum capacitance to <8pF per line.
This, combined with low leakage current, means signal
integrity is preserved in high-speed applications such
as 10/100 Ethernet.
u
u
u
u
u
u
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
IEC 61000-4-4 (EFT) 40A (tp = 5/50ns)
IEC 61000-4-5 (Lightning) 24A (tp = 8/20µs)
Protects two line pairs (four lines)
Comprehensive pin out for easy board layout
Low capacitance
Low leakage current
Low operating and clamping voltages
Solid-state EPD TVS process technology
Mechanical Characteristics
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u
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u
The SLVU2.8-4 is in an SO-8 package and may be used
to protect two high-speed line pairs. The “flow-thru”
design minimizes trace inductance and reduces voltage
overshoot associated with ESD events. The low
clamping voltage of the SLVU2.8-4 minimizes the
stress on the protected IC.
JEDEC SO-8 package
Molding compound flammability rating: UL 94V-0
Marking : Part number, date code, logo
Packaging : Tape and Reel per EIA 481
Applications
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u
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u
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u
u
The SLV series TVS diodes will meet the surge requirements of IEC 61000-4-2, Level 4.
Circuit Diagram
10/100 Ethernet
WAN/LAN Equipment
Switching Systems
Desktops, Servers, & Notebooks
Instrumentation
Base Stations
Analog Inputs
Schematic & PIN Configuration
SO-8 (Top View)
Revision 9/2000
1
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SLVU2.8-4
PROTECTION PRODUCTS
Absolute Maximum Rating
R ating
Symbo l
Value
Units
Peak Pulse Pow er (tp = 8/20ms)
Pp k
400
Watts
Peak Pulse Current (tp = 8/20ms)
I PP
24
A
ESD p er IEC 61000-4-2 (Air)
ESD p er IEC 61000-4-2 (Contact)
V ESD
25
15
kV
Lead Soldering Temp erature
TL
260 (10 seconds)
o
Op erating Temp erature
TJ
-55 to +125
o
TSTG
-55 to +150
o
Storage Temp erature
C
C
C
Electrical Characteristics
SLVU2.8-4
Par ame te r
Reverse Stand -Off Voltage
Symbo l
Co nd itio ns
Minimum
Typ ical
VRWM
Maximum
Units
2.8
V
Punch -Th rough Voltage
V PT
IPT = 2µ A
3.0
V
Snap -Back Voltage
VSB
ISB = 50mA
2.8
V
Reverse Leakage Current
IR
V RWM = 2.8V, T=25°C
(Each Line)
1
µA
Clamp ing Voltage
VC
IPP = 2A , tp = 8/20µ s
(Each Line)
5.5
V
Clamp ing Voltage
VC
IPP = 5A , tp = 8/20µ s
(Each Line)
8.5
V
Clamp ing Voltage
VC
IPP = 24A , tp = 8/20µ s
(Each Line)
15
V
Maximum Peak Pulse Current
I PP
tp = 8/20µ s
24
A
Junction Cap acitance
Cj
V R = 0V, f = 1MHz
(Each Line)
8
pF
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SLVU2.8-4
PRELIMINARY
PROTECTION PRODUCTS
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
Power Derating Curve
110
10
90
% of Rated Power or I PP
Peak Pulse Power - PPP (kW)
100
1
0.1
80
70
60
50
40
30
20
10
0
0.01
0.1
1
10
100
0
1000
25
Pulse Waveform
75
100
125
150
Clamping Voltage vs. Peak Pulse Current
14
110
Waveform
Parameters:
tr = 8µs
td = 20µs
90
80
70
e
60
12
Clamping Voltage - VC (V)
100
Percent of IPP
50
Ambient Temperature - TA (oC)
Pulse Duration - tp (µ s)
-t
50
40
td = IPP/2
30
20
10
8
6
4
Waveform
Parameters:
tr = 8µs
td = 20µs
2
10
0
0
0
5
10
15
20
25
0
30
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10
15
20
25
Peak Pulse Current - IPP (A)
Time (µs)
3
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SLVU2.8-4
PROTECTION PRODUCTS
Applications Information
SLVU2.8-4 Circuit Diagram
Device Connection for Protection of Four Data Lines
Electronic equipment is susceptible to transient disturbances from a variety of sources including: ESD to an
open connector or interface, direct or nearby lightning
strikes to cables and wires, and charged cables “hot
plugged” into I/O ports. The SLVU2.8-4 is designed to
protect sensitive components from damage and latchup which may result from such transient events. The
SLVU2.8-4 can be configured to protect two highspeed line pairs. The device is connected as follows:
1 . Protection of two high-speed line pairs:
The SLVU2.8-4 is designed such that the data lines
are routed through the device. The first line pair
enters at pins 1 and 2 and exit at pins 8 and 7
respectively. The second line pair enters at pins 3
and 4 and exits at pins 6 and 5. The traces must
be connected at the bottom of the device as
shown.
Low Capacitance Protection of Two Differential Line
Pairs
Circuit Board Layout Recommendations for Suppression of ESD.
Good circuit board layout is critical for the suppression
of ESD induced transients. The following guidelines are
recommended:
l Place the SLVU2.8-4 near the input terminals or
connectors to restrict transient coupling.
l Minimize the path length between the TVS and the
protected line.
l Minimize all conductive loops including power and
ground loops.
l The ESD transient return path to ground should be
kept as short as possible.
l Never run critical signals near board edges.
l Use ground planes whenever possible.
ã 2000 Semtech Corp.
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Line 1
1
8
Line 1
Line 2
2
7
Line 2
Line 3
3
6
Line 3
Line 4
4
5
Line 4
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SLVU2.8-4
PRELIMINARY
PROTECTION PRODUCTS
Typical Applications
10/100 Ethernet Protection Circuit
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SLVU2.8-4
PROTECTION PRODUCTS
Applications Information (continued)
EPD TVS™ Characteristics
,PP
The SLVU2.8-4 is constructed using Semtech’s proprietary EPD technology. The structure of the EPD TVS is
vastly different from the traditional pn-junction devices.
At voltages below 5V, high leakage current and junction
capacitance render conventional avalanche technology
impractical for most applications. However, by utilizing
the EPD technology, the SLVU2.8-4 can effectively
operate at 2.8V while maintaining excellent electrical
characteristics.
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The EPD TVS employs a complex nppn structure in
contrast to the pn structure normally found in traditional silicon-avalanche TVS diodes. The EPD mechanism is achieved by engineering the center region of
the device such that the reverse biased junction does
not avalanche, but will “punch-through” to a conducting state. This structure results in a device with superior dc electrical parameters at low voltages while
maintaining the capability to absorb high transient
currents.
EPD TVS VI Characteristic Curve
The IV characteristic curve of the EPD device is shown
in Figure 1. The device represents a high impedance
to the circuit up to the working voltage (VRWM). During a
transient event, the device will begin to conduct as it is
biased in the reverse direction. When the punchthrough voltage (VPT) is exceeded, the device enters a
low impedance state, diverting the transient current
away from the protected circuit. When the device is
conducting current, it will exhibit a slight “snap-back” or
negative resistance characteristic due to its structure.
This must be considered when connecting the device
to a power supply rail. To return to a non-conducting
state, the current through the device must fall below
the snap-back current (approximately < 50mA).
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SLVU2.8-4
PRELIMINARY
PROTECTION PRODUCTS
Outline Drawing - SO-8
Land Pattern - SO-8
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SLVU2.8-4
PROTECTION PRODUCTS
Ordering Information
Par t Numbe r
Wo r king
Vo ltage
Qty p e r R e e l
R e e l Size
SLVU2.8-4.TB
2.8V
500
7 Inch
SLVU2.8-4.TE
2.8V
2,500
13 Inch
Note:
(1) No suffix indicates tube pack.
Contact Information
Semtech Corporation
Protection Products Division
652 Mitchell Rd., Newbury Park, CA 91320
Phone: (805)498-2111 FAX (805)498-3804
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