LT3092 200mA 2-Terminal Programmable Current Source FEATURES DESCRIPTION n The LT®3092 is a programmable 2-terminal current source. It requires only two resistors to set an output current between 0.5mA and 200mA. A multitude of analog techniques lend themselves to actively programming the output current. The LT3092 is stable without input and output capacitors, offering high DC and AC impedance. This feature allows operation in intrinsically safe applications. n n n n n n n n n n Programmable 2-Terminal Current Source Maximum Output Current: 200mA Wide Input Voltage Range: 1.2V to 40V Input/Output Capacitors Not Required Resistor Ratio Sets Output Current Initial Set Pin Current Accuracy: 1% Reverse-Voltage Protection Reverse-Current Protection <0.001%/V Line Regulation Typical Current Limit and Thermal Shutdown Protection Available in 8-Lead SOT-23, 3-Lead SOT-223 and 8-Lead 3mm × 3mm DFN Packages APPLICATIONS n n n n n 2-Terminal Floating Current Source GND Referred Current Source Variable Current Source In-Line Limiter Intrinsic Safety Circuits The SET pin features 1% initial accuracy and low temperature coefficient. Current regulation is better than 10ppm/V from 1.5V to 40V. The LT3092 can operate in a 2-terminal current source configuration in series with signal lines. It is ideal for driving sensors, remote supplies, and as a precision current limiter for local supplies. Internal protection circuitry includes reverse-battery and reverse-current protection, current limiting and thermal limiting. The LT3092 is offered in the 8-lead TSOT-23, 3-lead SOT-223 and 8-lead 3mm × 3mm DFN packages. L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION Adjustable 2-Terminal Current Source SET Pin Current vs Temperature VIN – VOUT = 1.2V TO 40V 10.100 IN 10.075 SET PIN CURRENT (μA) LT3092 10μA + – SET OUT RSET ROUT 10.050 10.025 10.000 9.975 9.950 9.925 3092 TA01a 9.900 –50 –25 ISOURCE = 10µA • R SET ROUT 0 25 50 75 100 125 150 TEMPERATURE (°C) 3092 TA01b 3092fb 1 LT3092 ABSOLUTE MAXIMUM RATINGS (Note 1) All Voltages Relative to VOUT IN Pin Voltage Relative to SET, OUT ........................±40V SET Pin Current (Note 6) .....................................±15mA SET Pin Voltage (Relative to OUT, Note 6) ...............±10V Output Short-Circuit Duration .......................... Indefinite Operating Junction Temperature Range (Notes 2, 8) E, I Grades ......................................... –40°C to 125°C MP Grade........................................... –55°C to 125°C Storage Temperature Range................... –65°C to 150°C Lead Temperature (ST, TS8 Packages Only) Soldering, 10 sec .............................................. 300°C PIN CONFIGURATION TOP VIEW OUT 1 OUT 2 NC 3 SET 4 TOP VIEW 8 IN 9 7 IN TAB IS OUT 6 NC 5 NC DD PACKAGE 8-LEAD (3mm s 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 28°C/W, θJC = 10°C/W EXPOSED PAD (PIN 9) IS OUT, MUST BE SOLDERED TO OUT ON THE PCB. SEE THE APPLICATIONS INFORMATION SECTION. 3 IN 2 OUT 1 SET TOP VIEW NC 1 OUT 2 OUT 3 OUT 4 ST PACKAGE 3-LEAD PLASTIC SOT-223 TJMAX = 125°C, θJA = 24°C/W, θJC = 15°C/W TAB IS OUT, MUST BE SOLDERED TO OUT ON THE PCB. SEE THE APPLICATIONS INFORMATION SECTION. 8 IN 7 IN 6 NC 5 SET TS8 PACKAGE 8-LEAD PLASTIC TSOT-23 TJMAX = 125°C, θJA = 57°C/W, θJC = 15°C/W ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3092EDD#PBF LT3092EDD#TRPBF LFJD 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT3092IDD#PBF LT3092IDD#TRPBF LFJD 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT3092EST#PBF LT3092EST#TRPBF 3092 3-Lead Plastic SOT-223 –40°C to 125°C LT3092IST#PBF LT3092IST#TRPBF 3092 3-Lead Plastic SOT-223 –40°C to 125°C LT3092MPST#PBF LT3092MPST#TRPBF 3092MP 3-Lead Plastic SOT-223 –55°C to 125°C LT3092ETS8#PBF LT3092ETS8#TRPBF LTFJW 8-Lead Plastic SOT-23 –40°C to 125°C LT3092ITS8#PBF LT3092ITS8#TRPBF LTFJW 8-Lead Plastic SOT-23 –40°C to 125°C LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT3092EDD LT3092EDD#TR LFJD 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT3092IDD LT3092IDD#TR LFJD 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT3092EST LT3092EST#TR 3092 3-Lead Plastic SOT-223 –40°C to 125°C LT3092IST LT3092IST#TR 3092 3-Lead Plastic SOT-223 –40°C to 125°C LT3092MPST LT3092MPST#TR 3092MP 3-Lead Plastic SOT-223 –55°C to 125°C LT3092ETS8 LT3092ETS8#TR LTFJW 8-Lead Plastic SOT-23 –40°C to 125°C LT3092ITS8 LT3092ITS8#TR LTFJW 8-Lead Plastic SOT-23 –40°C to 125°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ 2 3092fb LT3092 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TJ = 25°C. (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS 10 10 10.1 10.2 μA μA 2 4 mV mV –0.1 –0.5 –2 nA mV 0.03 0.003 0.2 0.010 SET Pin Current ISET VIN = 2V, ILOAD = 1mA 2V ≤ VIN ≤ 40V, 1mA ≤ ILOAD ≤ 200mA l 9.9 9.8 Offset Voltage (VOUT – VSET) VOS VIN = 2V, ILOAD = 1mA VIN = 2V, ILOAD = 1mA l –2 –4 Current Regulation (Note 7) ΔISET ΔVOS ΔILOAD = 1mA to 200mA ΔILOAD = 1mA to 200mA l ΔISET ΔVOS ΔVIN = 2V to 40V, ILOAD = 1mA ΔVIN = 2V to 40V, ILOAD = 1mA Line Regulation nA/V mV/V Minimum Load Current (Note 3) 2V ≤ VIN ≤ 40V l 300 500 μA Dropout Voltage (Note 4) ILOAD = 10mA ILOAD = 200mA l l 1.22 1.3 1.45 1.65 V V Current Limit VIN = 5V, VSET = 0V, VOUT = –0.1V l 200 300 mA Reference Current RMS Output Noise (Note 5) 10Hz ≤ f ≤ 100kHz 0.7 nARMS Ripple Rejection f = 120Hz, VRIPPLE = 0.5VP-P, ILOAD = 0.1A, CSET = 0.1μF, COUT = 2.2μF f = 10kHz f = 1MHz 90 dB 75 20 dB dB Thermal Regulation ISET 10ms Pulse Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Unless otherwise specified, all voltages are with respect to VOUT. The LT3092E is tested and specified under pulse load conditions such that TJ ≅ TA. The LT3092E is 100% tested at TA = 25°C. Performance at –40°C and 125°C is assured by design, characterization, and correlation with statistical process controls. The LT3092I is guaranteed to meet all data sheet specifications over the full –40°C to 125°C operating junction temperature range. The LT3092MP is 100% tested and guaranteed over the –55°C to 125°C operating junction temperature range. Note 3: Minimum load current is equivalent to the quiescent current of the part. Since all quiescent and drive current is delivered to the output of the part, the minimum load current is the minimum current required to maintain regulation. 0.003 %/W Note 4: For the LT3092, dropout is specified as the minimum input-tooutput voltage differential required supplying a given output current. Note 5: Adding a small capacitor across the reference current resistor lowers output noise. Adding this capacitor bypasses the resistor shot noise and reference current noise (see the Applications Information section). Note 6: Diodes with series 1k resistors clamp the SET pin to the OUT pin. These diodes and resistors only carry current under transient overloads. Note 7: Current regulation is Kelvin-sensed at the package. Note 8: This IC includes overtemperature protection that protects the device during momentary overload conditions. Junction temperature exceeds the maximum operating junction temperature when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. 3092fb 3 LT3092 TYPICAL PERFORMANCE CHARACTERISTICS SET Pin Current SET Pin Current Distribution Offset Voltage (VOUT – VSET) 2.0 N = 1326 10.075 1.5 10.050 1.0 OFFSET VOLTAGE (mV) SET PIN CURRENT (μA) 10.100 10.025 10.000 9.975 9.950 9.925 9.900 –50 –25 0.5 0.0 –0.5 –1.0 –1.5 0 25 50 75 100 125 150 TEMPERATURE (°C) 3092 G01 10 10.20 9.90 10.10 SET PIN CURRENT DISTRIBUTION (μA) 9.80 –2.0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3092 G03 3092 G02 Offset Voltage Distribution Offset Voltage 1.00 N = 1326 IOUT = 1mA OFFSET VOLTAGE (mV) 0.75 0.50 0.25 0 –0.25 –0.50 –0.75 –2 0 –1 1 VOS DISTRIBUTION (mV) 2 –1.00 0 5 10 15 20 25 30 35 INPUT-TO-OUTPUT VOLTAGE (V) 3092 G05 3092 G04 Offset Voltage Current Regulation 20 50 10 CHANGE IN REFERENCE CURRENT WITH LOAD (nA) 100 OFFSET VOLTAGE (μV) 0 –50 –100 –150 –200 –250 –300 –350 –400 0 50 150 100 LOAD CURRENT (mA) 40 200 3092 G06 ΔIOUT = 1mA TO 200mA VIN – VOUT = 3V 0 –10 –20 –30 –40 –50 –60 –70 –80 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (oC) 3092 G07 3092fb 4 LT3092 TYPICAL PERFORMANCE CHARACTERISTICS Dropout Voltage Minimum Output Current 400 300 200 100 0 25 50 75 100 125 150 TEMPERATURE (°C) 3092 G08 DROPOUT VOLTAGE (VIN – VOUT) (V) DROPOUT VOLTAGE (VIN – VOUT) (V) 500 1.4 TJ = –55°C 1.2 TJ = 25°C 1.0 TJ = 125°C 0.8 0.6 0.4 0.2 0 0 25 50 75 100 125 150 175 200 LOAD CURRENT (mA) 1.2 ILOAD = 200mA 1.0 ILOAD = 100mA 0.8 0.6 0.4 0.2 0 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) 3092 G10 3092 G09 Current Limit Current Limit 500 400 450 350 400 300 CURRENT LIMIT (mA) CURRENT LIMIT (mA) 250 200 150 100 350 300 250 200 150 100 50 VIN = 7V VOUT = 0V 50 TJ = 25°C 0 0 –50 –25 0 2 6 8 10 4 INPUT-TO-OUTPUT DIFFERENTIAL VOLTAGE (V) 0 25 50 75 100 125 150 TEMPERATURE (°C) 3092 G12 3092 G11 Line Transient Response Line Transient Response 8 6 1mA CURRENT SOURCE 1.0 CONFIGURATION 0.5 0 0 –0.5 –1.0 0 10 20 30 40 50 60 70 80 90 100 TIME (μs) 3092 G13 10 8 10mA CURRENT SOURCE CONFIGURATION 6 4 10 5 2 0 –5 –10 0 OUTPUT CURRENT DEVIATION (mA) 1.5 2 OUTPUT CURRENT DEVIATION (mA) 4 INPUT VOLTAGE (V) 0 –50 –25 Dropout Voltage 1.4 1.6 INPUT VOLTAGE (V) MINIMUM OUTPUT CURRENT (μA) 600 10 20 30 40 50 60 70 80 90 100 TIME (μs) 3092 G14 3092fb 5 LT3092 TYPICAL PERFORMANCE CHARACTERISTICS Turn-On Response 6 INPUT VOLTAGE (V) INPUT VOLTAGE (V) Turn-On Response 8 1mA CURRENT SOURCE CONFIGURATION 4 2 0 0 0 5 2 15 0 10 5 0 10 15 20 25 30 35 40 45 50 TIME (μs) 10mA CURRENT SOURCE CONFIGURATION 4 0 10 15 20 25 30 35 40 45 50 TIME (μs) 3092 G15 Residual Output for Less Than Minimum Output Current 3092 G16 Output Impedance 1G 800 SET PIN = 0V VIN 600 100M VOUT VIN = 36V OUTPUT IMPEDANCE (Ω) 700 OUTPUT VOLTAGE (mV) 5 OUTPUT CURRENT (mA) 0.5 6 OUTPUT CURRENT (mA) 1.0 8 RTEST 500 VIN = 5V 400 300 200 ISOURCE = 1mA 10M ISOURCE = 10mA 1M 100k 100 10k ISOURCE = 100mA 1k 100 10 0 1 0 1000 RTEST (Ω) 2000 10 100 3092 G17 1k 10k 100k FREQUENCY (Hz) 1M 10M 3092 G18 Noise Spectral Density REFERENCE CURRENT NOISE SPECTRAL DENSITY (pA/√Hz) 100 10 1 0.1 0.01 10 100 1k 10k FREQUENCY (Hz) 100k 3092 G19 3092fb 6 LT3092 PIN FUNCTIONS (DD/ST/TS8) IN (Pins 7, 8/Pin 3/Pins 7, 8): Input. This pin supplies power to bias internal circuitry and supply output load current. For the device to operate properly and regulate, the voltage on this pin must be 1.2V to 1.4V above the OUT pin (depending on output load current—see the dropout voltage specifications in the Electrical Characteristics table). NC (Pins 3, 5, 6/NA/Pins 1, 6): No Connection. These pins have no connection to internal circuitry and may be tied to IN, OUT, GND or floated. OUT (Pins 1, 2/Pin 2/Pins 2, 3, 4): Output. This is the power output of the device. The minimum current source value to which the LT3092 can be set is 0.5mA or the device will not regulate. SET (Pin 4/Pin 1/Pin 5): Set. This pin is the error amplifier’s noninverting input and also sets the operating bias point of the circuit. A fixed 10μA current source flows out of this pin. Two resistors program IOUT as a function of the resistor ratio relative to 10μA. Output current range is 0.5mA to the maximum rated 200mA level. Exposed Pad/Tab (Pin 9/Tab/NA): Output. The Exposed Pad of the DFN package and the Tab of the SOT-223 package are tied internally to OUT. Tie them directly to the OUT pins (Pins 1, 2/Pin 2) at the PCB. The amount of copper area and planes connected to OUT determine the effective thermal resistance of the packages (see the Applications Information section). BLOCK DIAGRAM IN 10μA + – SET OUT 3092 BD 3092fb 7 LT3092 APPLICATIONS INFORMATION Introduction The LT3092 is a versatile IC that operates as a 2-terminal programmable current source with the addition of only two external resistors; no external bypass capacitors are needed for stability. The LT3092 is easy to use and has all the protection features expected in high performance products. Included are reverse-voltage protection, reverse-current protection, short-circuit protection and thermal shutdown with hysteresis. The LT3092 operates with or without input and output capacitors. The simplest current source application requires only two discrete resistors to set a constant output current up to 200mA. A variety of analog techniques lend themselves to regulating and varying the current source value. The device utilizes a precision “0” TC 10μA reference current source to program output current. This 10μA current source connects to the noninverting input of a power operational amplifier. The power operational amplifier provides a low impedance buffered output of the voltage on the noninverting input. Many application areas exist in which operation without input and output capacitors is advantageous. A few of these applications include sensitive circuits that cannot endure surge currents under fault or overload conditions and intrinsic safety applications in which safety regulations limit energy storage devices that may spark or arc. With a 10μA current source generating the reference that gains up to set output current, leakage paths to or from the SET pin can create errors in the reference and output currents. High quality insulation should be used (e.g., Teflon, Kel-F). The cleaning of all insulating surfaces to remove fluxes and other residues may be required. Surface coating may be necessary to provide a moisture barrier in high humidity environments. Minimize board leakage by encircling the SET pin and circuitry with a guard ring operated at a potential close to itself; tie the guard ring to the OUT pin. Guarding both sides of the circuit board is required. Bulk leakage reduction depends on the guard ring width. Ten nanoamperes of leakage into or out of the SET pin and its associated circuitry creates a 0.1% reference current error. Leakages of this magnitude, coupled with other sources of leakage, can cause significant offset voltage and reference current drift, especially over the possible operating temperature range. IN LT3092 10μA IOUT ≥ 0 . 5mA + – VSET = 10µA • R SET SET OUT IOUT = VSET 10µA • R SET = ROUT ROUT + VSET RSET ROUT – IOUT 3092 F01 Figure 1. Using the LT3092 as a Current Source Programming Output Current in 2-Terminal Current Source Mode Setting the LT3092 to operate as a 2-terminal current source is a simple matter. The 10μA reference current from the SET pin is used with one resistor to generate a small voltage, usually in the range of 100mV to 1V (200mV is a level that will help reject offset voltage, line regulation, and other errors without being excessively large). This voltage is then applied across a second resistor that connects from OUT to the first resistor. Figure 1 shows connections and formulas to calculate a basic current source configuration. Selecting RSET and ROUT In Figure 1, both resistors RSET and ROUT program the value of the output current. The question now arises: the ratio of these resistors is known, but what value should each resistor be? The first resistor to select is RSET. The value selected should generate enough voltage to minimize the error caused by the offset between the SET and OUT pins. A reasonable starting level is 200mV of voltage across RSET (RSET equal to 20k). Resultant errors due to offset voltage are a few percent. The lower the voltage across RSET becomes, the higher the error term due to the offset. 3092fb 8 LT3092 APPLICATIONS INFORMATION From this point, selecting ROUT is easy, as it is a straightforward calculation from RSET. Take note, however, resistor errors must be accounted for as well. While larger voltage drops across RSET minimize the error due to offset, they also increase the required operating headroom. Obtaining the best temperature coefficient does not require the use of expensive resistors with low ppm temperature coefficients. Instead, since the output current of the LT3092 is determined by the ratio of RSET to ROUT, those resistors should have matching temperature characteristics. Less expensive resistors made from the same material will provide matching temperature coefficients. See resistor manufacturers’ data sheets for more details. Stability and Frequency Compensation The LT3092 does not require input or output capacitors for stability in many current-source applications. Clean, tight PCB layouts provide a low reactance, well controlled operating environment for the LT3092 without requiring capacitors to frequency-compensate the circuit. The front page Typical Application circuit illustrates the simplicity of using the LT3092. Some current source applications will use a capacitor connected in parallel with the SET pin resistor to lower the current source’s noise. This capacitor also provides a soft-start function for the current source. This capacitor connection is depicted in Figure 7 (see the Quieting the Noise section). When operating with a capacitor across the SET pin resistor, external compensation is usually required to maintain stability and compensate for the introduced pole. The following paragraphs discuss methods for stabilizing the LT3092 for either this capacitance or other complex impedances that may be presented to the device. Linear Technology strongly recommends testing stability in situ with final components before beginning production. Although the LT3092’s design strives to be stable without any capacitors over a wide variety of operating conditions, it is not possible to test for all possible combinations of input and output impedances that the LT3092 will encounter. These impedances may include resistive, capacitive and inductive components and may be complex distributed networks. In addition, the current source’s value will differ between applications and its connection may be GND referenced, power supply referenced or floating in a signal line path. Linear Technology strongly recommends that stability be tested in situ for any LT3092 application. In LT3092 applications with long wires or PCB traces, the inductive reactance may cause instability. In some cases, adding series resistance to the input and output lines (as shown in Figure 2) may sufficiently dampen these possible high-Q lines and provide stability. The user must evaluate the required resistor values against the design’s headroom constraints. In general, operation at low output current levels (< 5mA) automatically requires higher values of programming resistors and may provide the necessary damping without additional series impedance. If the line impedances in series with the LT3092 are complex enough such that series damping resistors are not sufficient, a frequency compensation network may be necessary. Several options may be considered. LONG LINE REACTANCE/INDUCTANCE RSERIES IN LT3092 10μA + – SET OUT RSET ROUT RSERIES 3092 F02 LONG LINE REACTANCE/INDUCTANCE Figure 2. Adding Series Resistor Decouples and Dampens Long Line Reactances 3092fb 9 LT3092 APPLICATIONS INFORMATION Figure 3 depicts the simplest frequency compensation network as a single capacitor connected across the two terminals of the current source. In this case, either a capacitor with a value less than 1000pF, or greater than 1μF (ESR < 0.5Ω), may stabilize the circuit. Some applications may use the small value capacitor to stand off DC voltage, but allow the transfer of data down a signal line. For some applications, this capacitance range may be unacceptable or present a design constraint. One circuit example typifying this is an “intrinsically-safe” circuit in which an overload or fault condition potentially allows the capacitor’s stored energy to create a spark or arc. For applications in which a single capacitor is unacceptable, Figure 3 alternately shows a series RC network connected across the two terminals of the current source. This network has two benefits. First, it limits the potential discharge current of the capacitor under a fault condition, preventing sparks or arcs. Second, it bridges the gap between the upper bound of 1000pF for small capacitors to the lower bound of 1μF for large capacitors such that almost any value capacitor can be used. This allows the user greater flexibility for frequency compensating the loop and fine tuning the RC network for complex impedance networks. In many instances, a series RC network is the best solution for stabilizing the application circuit. Typical resistor values will range from 100Ω to about 5k, especially for capacitor values in between 1000pF and 1μF. Once again, Linear Technology strongly recommends testing stability in situ for any LT3092 application across all operating conditions, especially ones that present complex impedance networks at the input and output of the current source. If an application refers the bottom of the LT3092 current source to GND, it may be necessary to bypass the top of the current source with a capacitor to GND. In some cases, this capacitor may already exist and no additional capacitance is required. For example, if the LT3092 was used as a variable current source on the output of a power supply, the output bypass capacitance would suffice to provide LT3092 stability. Other applications may require the addition of a bypass capacitor. Once again, the same capacitor value requirements previously mentioned apply in that an upper bound of 1000pF exists for small values of capacitance, and a lower bound of 1μF (ESR < 0.5Ω) exists for large value capacitors. A series RC network may also be used as necessary, and depends on the application requirements. In some extreme cases, capacitors or series RC networks may be required on both the LT3092’s input and output to stabilize the circuit. Figure 4 depicts a general application using input and output capacitor networks, rather than an input-to-output capacitor. As the input of the current source tends to be high impedance, placing a capacitor on the input does not have the same effect as placing a VIN IN LT3092 RCOMP 10μA SET RSET 10μA + – CCOMP SET OUT ROUT 3092 F03 IN LT3092 CIN CCOMP OR + – RIN RSET OUT ROUT 3092 F04 IOUT ROUT COUT OR COUT Figure 3. Compensation From Input to Output of Current Source Provides Stability Figure 4. Input and/or Output Capacitors May Be Used for Compensation 3092fb 10 LT3092 APPLICATIONS INFORMATION capacitor on the lower impedance output, and the same restrictions do not apply. Capacitors in the range of 0.1μF to 1μF usually provide sufficient bypassing on the input, and the value of input capacitance may be increased without limit. If an application uses GND referred capacitors on the input or output (particularly the input), pay attention to the length of the lines powering and returning ground from the circuit. In the case where long power supply and return lines are coupled with low ESR input capacitors, application-specific voltage spikes, oscillations and reliability concerns may be seen. This is not an issue with LT3092 stability, but rather the low ESR capacitor forming a high-Q resonant tank circuit with the inductance of the input wires. Adding series resistance with the input of the LT3092, or with the input capacitor, often solves this. Resistor values of 0.1Ω to 1Ω are often sufficient to dampen this resonance. Give extra consideration to the use of ceramic capacitors. Ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior across temperature and applied voltage. The most common dielectrics used are specified with EIA temperature characteristic codes of Z5U, Y5V, X5R and X7R. The Z5U and Y5V dielectrics are good for providing high capacitances in a small package, but they tend to have strong voltage and temperature coefficients as shown in Figures 5 and 6. When used with a 5V regulator, a 16V 10μF Y5V capacitor can exhibit an effective value as low as 1μF to 2μF for the DC bias voltage applied and over the operating temperature range. The X5R and X7R dielectrics result in more stable characteristics and are more suitable for use as the output capacitor. The X7R type has better stability across temperature, while the X5R is less expensive and is available in higher values. Care still must be exercised when using X5R and X7R capacitors; the X5R and X7R codes only specify operating temperature range and maximum capacitance change over temperature. Capacitance change due to DC bias with X5R and X7R capacitors is better than Y5V and Z5U capacitors, but can still be significant enough to drop capacitor values below appropriate levels. Capacitor DC bias characteristics tend to improve as component case size increases, but expected capacitance at operating voltage should be verified. Voltage and temperature coefficients are not the only sources of problems. Some ceramic capacitors have a piezoelectric response. A piezoelectric device generates voltage across its terminals due to mechanical stress. In a ceramic capacitor the stress can be induced by vibrations in the system or thermal transients. 40 20 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10μF 20 CHANGE IN VALUE (%) CHANGE IN VALUE (%) 0 X5R –20 –40 –60 Y5V –80 –100 –20 –40 2 4 8 6 10 12 DC BIAS VOLTAGE (V) 14 16 3092 F05 Figure 5. Ceramic Capacitor DC Bias Characteristics Y5V –60 –80 0 X5R 0 BOTH CAPACITORS ARE 16V, 1210 CASE SIZE, 10μF –100 –50 –25 50 25 75 0 TEMPERATURE (°C) 100 125 3092 F06 Figure 6. Ceramic Capacitor Temperature Characteristics 3092fb 11 LT3092 APPLICATIONS INFORMATION Quieting the Noise Paralleling Devices When a reduction in the noise of the current source is desired, a small capacitor can be placed across RSET (CSET in Figure 7). Normally, the 10μA reference current source generates noise current levels of 2.7pA/√Hz (0.7nARMS over the 10Hz to 100kHz bandwidth). The SET pin resistor generates a spot noise equal to in = √4kT/R (k = Boltzmann’s constant, 1.38 • 10–23J/°K, and T is absolute temperature) which is RMS-summed with the noise generated by the 10μA reference current source. Placing a CSET capacitor across RSET (as shown in Figure 7) bypasses this noise current. Note that this noise reduction capacitor increases start-up time as a factor of the time constant formed by RSET • CSET. When using a capacitor across the SET pin resistor, the external pole introduced usually requires compensation to maintain stability. See the Stability and Frequency Compensation section for detailed descriptions on compensating LT3092 circuits. Obtain higher output current by paralleling multiple LT3092’s together. The simplest application is to run two current sources side by side and tie their inputs together and their outputs together, as shown in Figure 8. This allows the sum of the current sources to deliver more output current than a single device is capable of delivering. A curve in the Typical Performance Characteristics section depicts noise spectral density for the reference current over a 10Hz to 100kHz bandwidth. WEIGHT (oz) 10mil WIDTH 1 54.3 2 27.1 Trace resistance is measured in mΩ/in IN LT3092 RCOMP 10μA CCOMP OR + – CCOMP SET OUT CSET RSET ROUT 3092 F07 Figure 7. Adding CSET Lowers Current Noise Another method of paralleling devices requires fewer components and helps to share power between devices. Tie the individual SET pins together and tie the individual IN pins together. Connect the outputs in common using small pieces of PC trace as ballast resistors to promote equal current sharing. PC trace resistance in milliohms/ inch is shown in Table 1. Ballasting requires only a tiny area on the PCB. Table 1. PC Board Trace Resistance 20mil WIDTH 27.1 13.6 The worst-case room temperature offset, only ±2mV between the SET pin and the OUT pin, allows the use of very small ballast resistors. As shown in Figure 9, each LT3092 has a small 40mΩ ballast resistor, which at full output current gives better than 80% equalized sharing of the current. The external resistance of 40mΩ (20mΩ for the two devices in parallel) only adds about 8mV of output voltage compliance at an output of 0.4A. Of course, paralleling more than two LT3092’s yields even higher output current. Spreading the device on the PC board also spreads the heat. Series input resistors can further spread the heat if the input-to-output difference is high. Thermal Considerations The LT3092’s internal power and thermal limiting circuitry protects itself under overload conditions. For continuous normal load conditions, do not exceed the 125°C maximum junction temperature. Carefully consider all sources of thermal resistance from junction-to-ambient. This includes (but is not limited to) junction-to-case, case-to-heat sink 3092fb 12 LT3092 APPLICATIONS INFORMATION IOUT IN LT3092 IN LT3092 10μA 300Ω 10μA 300Ω + – + – SET OUT 20k OUT 1.33Ω SET 1.33Ω 20k 3092 F08 IOUT, 300mA Figure 8. Connect Two LT3092s for Higher Current IOUT LT3092 LT3092 IN 10μA IN + – SET 1V Rx 10μA + – 40mΩ* Rx = VIN(MAX ) • R 90 % 40mΩ* SET R 2.5Ω 50k 3092 F09 *40mΩ PC BOARD TRACE IOUT, 400mA Figure 9. Parallel Devices interface, heat sink resistance or circuit board-to-ambient as the application dictates. Consider all additional, adjacent heat generating sources in proximity on the PCB. Note that the Exposed Pad of the DFN package and the Tab of the SOT-223 package are electrically connected to the output (VOUT). Surface mount packages provide the necessary heat sinking by using the heat spreading capabilities of the PC board, copper traces and planes. Surface mount heat sinks, plated through-holes and solder filled vias can also spread the heat generated by power devices. The following tables list thermal resistance as a function of copper areas in a fixed board size. All measurements were taken in still air on a four-layer FR-4 board with 1oz solid internal planes and 2oz external trace planes with a total finished board thickness of 1.6mm. Junction-to-case thermal resistance is specified from the IC junction to the bottom of the case directly, or the bottom of the pin most directly, in the heat path. This is the lowest thermal resistance path for heat flow. Only proper device mounting ensures the best possible thermal flow from this area of the package to the heat sinking material. PCB layers, copper weight, board layout and thermal vias affect the resultant thermal resistance. Please reference JEDEC standard JESD51-7 for further information on high thermal conductivity test boards. Achieving low thermal resistance necessitates attention to detail and careful layout. 3092fb 13 LT3092 APPLICATIONS INFORMATION Demo circuit 1531A’s board layout using multiple inner VOUT planes and multiple thermal vias achieves 28°C/W performance for the DFN package. VOUT(MIN CONTINUOUS) = 11.4V (12V – 5%) IOUT = 200mA Table 2. DD Package, 8-Lead DFN COPPER AREA VIN(MAX CONTINUOUS) = 16.5 (15V + 10%) Power dissipation under these conditions equals: TOPSIDE* BACKSIDE BOARD AREA THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 2500mm2 2500mm2 2500mm2 25°C/W 1000mm2 2500mm2 2500mm2 25°C/W 225mm2 2500mm2 2500mm2 28°C/W TJ = TA + PTOTAL • θJA 100mm2 2500mm2 2500mm2 32°C/W TJ = 50°C + (1.02W • 30°C/W) = 80.6°C *Device is mounted on topside TOPSIDE* BACKSIDE BOARD AREA THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 2500mm2 2500mm2 2500mm2 54°C/W 1000mm2 2500mm2 2500mm2 54°C/W 225mm2 2500mm2 2500mm2 57°C/W 100mm2 2500mm2 2500mm2 63°C/W *Device is mounted on topside Table 4. ST Package, 3-Lead SOT-223 COPPER AREA Junction temperature equals: In this example, the junction temperature is below the maximum rating, ensuring reliable operation. Table 3. TS8 Package, 8-Lead SOT-23 COPPER AREA PTOTAL = (16.5 – 11.4V)(200mA) = 1.02W TOPSIDE* BACKSIDE BOARD AREA THERMAL RESISTANCE (JUNCTION-TO-AMBIENT) 2500mm2 2500mm2 2500mm2 20°C/W 1000mm2 2500mm2 2500mm2 20°C/W 225mm2 2500mm2 2500mm2 24°C/W 100mm2 2500mm2 2500mm2 29°C/W *Device is mounted on topside For further information on thermal resistance and using thermal information, refer to JEDEC standard JESD51, notably JESD51-12. Calculating Junction Temperature Example: Given an industrial factory application with an input voltage of 15V ±10%, an output voltage of 12V ±5%, an output current of 200mA and a maximum ambient temperature of 50°C, what would be the maximum junction temperature for a DFN package? Protection Features The LT3092 incorporates several protection features ideal for battery-powered circuits, among other applications. In addition to normal circuit protection features such as current limiting and thermal limiting, the LT3092 protects itself against reverse-input voltages, reverse-output voltages, and reverse OUT-to-SET pin voltages. Current limit protection and thermal overload protection protect the IC against output current overload conditions. For normal operation, do not exceed a junction temperature of 125°C. The thermal shutdown circuit’s typical temperature threshold is 165°C and has about 5°C of hysteresis. The LT3092’s IN pin withstands ±40V voltages with respect to the SET and OUT pins. Reverse-current flow, if OUT is greater than IN, is less than 1mA (typically under 100μA), protecting the LT3092 and sensitive loads. Clamping diodes and 1k limiting resistors protect the LT3092’s SET pin relative to the OUT pin voltage. These protection components typically only carry current under transient overload conditions. These devices are sized to handle ±10V differential voltages and ±15mA crosspin current flow without concern. The total circuit power equals: PTOTAL = (VIN – VOUT)(IOUT) The SET pin current is negligible and can be ignored. 3092fb 14 LT3092 TYPICAL APPLICATIONS Paralleling Current Sources for Higher Current IN LT3092 IN LT3092 Paralleling LT3092s with Ballast Resistor IN LT3092 IN LT3092 10μA 10μA 10μA 10μA + – + – + – + – SET OUT R2 SET R1 OUT R4 SET OUT SET OUT R1 40mΩ R3 R3 40mΩ 3092 TA02 ⎛ R2 R4 ⎞ IOUT = 10µA • ⎜ + ⎝ R1 R3 ⎟⎠ IOUT R4 2Ω R2 40.2k 3092 TA03 400mA High Voltage Current Source Decreasing Power Dissipation in LT3092 100mA Current Source 10μA 10μA D1 35V + – Rx + – OUT R4 20k R3 2Ω VMAX = ( VIN – VOUT )MAX Rx = OUT SET SET R2 20k IOUT ≥ 0 . 5mA IOUT = IN LT3092 IN LT3092 IN LT3092 VMAX 200mV • 90 % R1 R1 2Ω 200mV R1 3092 TA05 IOUT 100mA 10μA D2 35V + – + 200mV – Capacitor Adds Stability, But Limits Slew Rate SET OUT R2 20k R1 2Ω IN LT3092 3092 TA04 10μA IOUT 100mA C1 + – LIMIT I dV ≤ 90 % • OUT dt C1 OUT SET R2 20k R1 2Ω 3092 TA06 IOUT 100mA 3092fb 15 LT3092 TYPICAL APPLICATIONS Remote Temperature Sensor DAC Controlled Current Source IOUT = 0.5mA TO 100mA VIN IN LT3092 V+ IN LT3092 IN LT3092 10μA 10μA 10μA + – + – + – SET OUT 49.9k MURATA NCP15WF104F03RC 1% 100k Active Load SET DAC OUTPUT 0V TO 1V 49.9Ω SET OUT OUT 10k 10Ω 100Ω OUTPUT 3092 TA08 1mA INPUT IOUT 3092 TA09 LOAD 3092 TA07 Pulsed Current Source, Load to Ground Fully Floating Current Source Switches From 200mA to Quiescent Current VIN VIN IN LT3092 IN LT3092 10μA 10μA + – + – SET OUT SET OUT OPTO-FET 20k 1Ω 100k IOUT 200mA ON OFF 3092 TA11 4.99Ω VN2222LL LOAD NEC PS 7801-1A 200mA 3092 TA10 3092fb 16 LT3092 TYPICAL APPLICATIONS 2-Terminal AC Current Limiter Pulsed Current Source, Load to VIN VIN LOAD IOUT IN LT3092 LT3092 10μA 10μA + – IOUT + – SET OUT 20k 1Ω 20k IOUT R 0 . 2V IOUT IOUT ISET 3092 TA13 OFF ON 3092 TA12 High Accuracy Current Source Voltage Clamp VIN 10μA 10μA + – OUT 4.99Ω 10k SET 10k + – VOUT SET OUT 100k LT1634-1.25 10V 2N3906 3092 TA14 2N3904 10k IN LT3092 IN LT3092 10mA IOUT 124Ω 0.1% 3092 TA15 VIN – VOUT = 11V TRIP POINT 3092fb 17 LT3092 TYPICAL APPLICATIONS 2-Level Current Source VIN IN LT3092 10μA + – SET OUT 100k 4.99Ω 100k* 10V* VN2222LL* 10k* VOUT IOUT = 200mA, IF VIN – VOUT < 12V = 100mA, IF VIN – VOUT > 12V *CURRENT FOLDBACK CIRCUIT LIMITS THE LT3092 POWER DISSIPATION 3092 TA16 More Efficient Current Source 0.22μF VIN + – VIN BOOST 36V 33μH SW SHDN BIAS C3 47μF LT3470A 100Ω 10μA ZVP3306F FB GND IN LT3092 1nF + – 1k SET OUT 1Ω 20k 3092 TA17 IOUT 3092fb 18 LT3092 PACKAGE DESCRIPTION DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) R = 0.115 TYP 5 0.38 ± 0.10 8 0.675 ±0.05 3.5 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) 3.00 ±0.10 (4 SIDES) PACKAGE OUTLINE 1.65 ± 0.10 (2 SIDES) PIN 1 TOP MARK (NOTE 6) (DD) DFN 1203 0.25 ± 0.05 0.75 ±0.05 0.200 REF 0.50 BSC 4 0.25 ± 0.05 2.38 ±0.05 (2 SIDES) 1 0.50 BSC 2.38 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE ST Package 3-Lead Plastic SOT-223 (Reference LTC DWG # 05-08-1630) .248 – .264 (6.30 – 6.71) .129 MAX .114 – .124 (2.90 – 3.15) .059 MAX .264 – .287 (6.70 – 7.30) .248 BSC .130 – .146 (3.30 – 3.71) .039 MAX .059 MAX .181 MAX .033 – .041 (0.84 – 1.04) .0905 (2.30) BSC RECOMMENDED SOLDER PAD LAYOUT 10o – 16o .010 – .014 (0.25 – 0.36) 10o MAX .071 (1.80) MAX .090 BSC 10o – 16o .024 – .033 (0.60 – 0.84) .181 (4.60) BSC .012 (0.31) MIN .0008 – .0040 (0.0203 – 0.1016) ST3 (SOT-233) 0502 3092fb 19 LT3092 PACKAGE DESCRIPTION TS8 Package 8-Lead Plastic TSOT-23 (Reference LTC DWG # 05-08-1637) 0.52 MAX 2.90 BSC (NOTE 4) 0.65 REF 1.22 REF 1.4 MIN 3.85 MAX 2.62 REF 2.80 BSC 1.50 – 1.75 (NOTE 4) PIN ONE ID RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 0.22 – 0.36 8 PLCS (NOTE 3) 0.65 BSC 0.80 – 0.90 0.20 BSC 0.01 – 0.10 1.00 MAX DATUM ‘A’ 0.30 – 0.50 REF 0.09 – 0.20 (NOTE 3) 1.95 BSC TS8 TSOT-23 0802 NOTE: 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 1. DIMENSIONS ARE IN MILLIMETERS 6. JEDEC PACKAGE REFERENCE IS MO-193 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 3092fb 20 LT3092 REVISION HISTORY (Revision history begins at Rev B) REV DATE DESCRIPTION PAGE NUMBER B 12/09 Update Order Information 2 3092fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 21 LT3092 TYPICAL APPLICATIONS USB LED Driver Current Limiter for Remote Power VIN USB IN LT3092 IN LT3092 10μA 10μA + – + – SET SET OUT OUT 100k ADJUST LIMIT 1Ω 4.99Ω LDO 20k VOUT 200mA LED 3092 TA18 3092 TA19 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1761 100mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20μVRMS, VIN = 1.8V to 20V, ThinSOT™ Package LT1762 150mA, Low Noise LDO 300mV Dropout Voltage, Low Noise: 20μVRMS, VIN = 1.8V to 20V, MS8 Package LTC1844 150mA, Very Low Dropout LDO 80mV Dropout Voltage, Low Noise <30μVRMS, VIN = 1.6V to 6.5V, Stable with 1μF Output Capacitors, ThinSOT Package LT1962 300mA, Low Noise LDO 270mV Dropout Voltage, Low Noise: 20μVRMS, VIN = 1.8V to 20V, MS8 Package LT1964 200mA, Low Noise, Negative LDO 340mV Dropout Voltage, Low Noise 30μVRMS, VIN = –1.8V to –20V, ThinSOT Package LT3008 20mA, 45V, 3μA IQ Micropower LDO 280mV Dropout Voltage, Low IQ: 3μA, VIN = 2V to 45V, VOUT = 0.6V to 39.5V; ThinSOT and 2mm × 2mm DFN-6 Packages LT3009 20mA, 20V, 3μA IQ Micropower LDO 280mV Dropout Voltage, Low IQ: 3μA, VIN = 1.6V to 20V, VOUT = 0.6V to 19.5V; ThinSOT and SC70 Packages LT3020 100mA, Low Voltage VLDO Linear Regulator VIN: 0.9V to 10V, VOUT : 0.2V to 5V (Min), VDO = 0.15V, IQ = 120μA, Noise: <250μVRMS, Stable with 2.2μF Ceramic Capacitors, DFN-8, MS8 Packages LTC3025 300mA Micropower VLDO Linear Regulator VIN = 0.9V to 5.5V, Dropout Voltage: 45mV, Low Noise 80μVRMS, Low IQ: 54μA, 6-Lead 2mm × 2mm DFN Package LTC3035 300mA VLDO Linear Regulator with Charge Pump Bias Generator VIN = 1.7V to 5.5V, VOUT : 0.4V to 3.6V, Dropout Voltage: 45mV, IQ: 100μA, 3mm × 2mm DFN-8 LT3080/ LT3080-1 1.1A, Parallelable, Low Noise, Low Dropout Linear Regulator 300mV Dropout Voltage (2-Supply Operation), Low Noise: 40μVRMS, VIN: 1.2V to 36V, VOUT : 0V to 35.7V, Current-Based Reference with 1-Resistor VOUT Set; Directly Parallelable (No Op Amp Required), Stable with Ceramic Caps, TO-220, SOT-223, MSOP-8 and 3mm × 3mm DFN-8 Packages; LT3080-1 Version Has Integrated Internal Ballast Resistor LT3085 500mA, Parallelable, Low Noise, Low Dropout Linear Regulator 275mV Dropout Voltage (2-Supply Operation), Low Noise: 40μVRMS, VIN: 1.2V to 36V, VOUT : 0V to 35.7V, Current-based Reference with 1-Resistor VOUT Set; Directly Parallelable (No Op Amp Required), Stable with Ceramic Caps, MSOP-8 and 2mm × 3mm DFN-6 Packages LDO Current Sense Amplifiers LT6106 Low Cost, 36V High Side Current Sense Amplifier 36V (44V Max) Current Sense, Dynamic Range of 2000:1, 106dB of PSRR LT6107 High Temperature High Side Current Sense Amp in SOT-23 36V (44V Max) Current Sense, Dynamic Range of 2000:1, 106dB of PSRR, –55 to 150°C (MP-Grade) ThinSOT is a trademark of Linear Technology Corporation. 3092fb 22 Linear Technology Corporation LT 1209 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2009