Data Sheet

UBA2025
CFL power IC
Rev. 01 — 16 October 2009
Product data sheet
1. General description
The UBA2025 is a high voltage power IC intended to drive and control a Compact
Fluorescent Lamp (CFL). It contains a half bridge power circuit, an oscillator, and a control
circuit for starting up, preheating, ignition, lamp burning, and protection.
2. Features
n
n
n
n
n
n
n
n
n
Two internal 600 V, 3 Ω max NMOST half bridge powers
For steady state half bridge currents up to 280 mA
For ignition half bridge currents up to 1.5 A
Adjustable preheat and ignition time
Adjustable preheat current
Adjustable lamp power
Lamp temperature stress protection at higher mains voltages
Capacitive mode protection
Protection against too low a drive voltage for the power MOSFETs.
3. Applications
n 5 W to 25 W CFLs provided that the maximum junction temperature is not exceeded.
4. Ordering information
Table 1.
Ordering information
Type number
UBA2025T
Package
Name
Description
Version
SO16L
plastic small outline package; 16 leads; body width 7.5 mm
SOT162-1
UBA2025
NXP Semiconductors
CFL power IC
5. Block diagram
VS
RHV
6
IREF CF
14
11
CI
13
FS
15
5
BOOTSTRAP
T1
SUPPLY
OSCILLATOR
LEVEL
SHIFTER
HS
DRIVER
16
4
VDC
S1A
BANDGAP
REFERENCE
T2
CPAV
RS
Fig 1.
1
9
10
3
NON
OVERLAP
TIMING
SHUNT
CURRENT
MONITOR
LS
DRIVER
CONTROL
2
7
S1B
PGND
GLI
GLO
UBA2025
12
8
SGND
GND
014aaa936
Block diagram
UBA2025_1
Product data sheet
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Rev. 01 — 16 October 2009
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UBA2025
NXP Semiconductors
CFL power IC
6. Pinning information
6.1 Pinning
PGND
1
16 VDC
GLI
2
15 CI
S1B
3
14 RHV
S1A
4
FS
5
VS
6
11 IREF
GLO
7
10 RS
GND
8
9
UBA2025
13 CF
12 SGND
CPAV
014aaa923
Fig 2.
Pin assignment
6.2 Pin description
Table 2.
Pin description
Symbol
Pin
Description
PGND
1
power ground
GLI
2
LS gate power MOSFET, must be connected to GLO
S1B
3
half bridge point, must be connected to S1A
S1A
4
half bridge point, must be connected to S1B
FS
5
floating supply
VS
6
IC supply
GLO
7
LS driver output, must be connected to GLI
GND
8
diepad ground
CPAV
9
preheat and averaging capacitor
RS
10
current monitoring input
IREF
11
reference resistor
SGND
12
signal ground
CF
13
oscillator capacitor
RHV
14
start-up/feed forward input
CI
15
integrating capacitor
VDC
16
high voltage power input
UBA2025_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 16 October 2009
3 of 17
UBA2025
NXP Semiconductors
CFL power IC
7. Functional description
7.1 Introduction
The IC is an integrated circuit for electronically ballasted compact fluorescent lamps and
its derivatives, up to a nominal mains voltage of 230 V (RMS). It provides all the
necessary functions for proper preheat, ignition and on-state operation of the lamp.
Besides the control function, the IC provides the level shift and drive for the two internal
power MOSFETs.
7.2 Initial start-up
Initial start-up is achieved by charging CS9 (see Figure 6) with the current applied to
pin RHV. The start-up of the circuit is such that (see Figure 1) T2 shall be conductive and
T1 shall be non-conductive, in order to make sure that CBOOT gets charged. This start-up
state is reached for a supply voltage Vrst, this is the voltage level at pin VS at which the
circuit will be reset to the initial state and maintained until the low voltage supply (VVS)
reaches a value of Vstartup.
7.3 Oscillation
If the low voltage supply (VVS) has reached the value of Vstartup the circuit starts oscillating
in the preheat state. The internal oscillator is a current-controlled circuit which generates a
sawtooth waveform. The frequency of the sawtooth is determined by the capacitor CF and
the current out of pin CF (mainly set by RIREF). The sawtooth frequency is twice the
frequency of the signal across the load. The IC brings alternately the power MOSFETs
T1 and T2 into conduction with a duty cycle of approximately 50%. Figure 3 represents
the timing of the IC. The circuit block 'non-overlap' generates a non-overlap time tno when
T1 and T2 are not conducting. This is dependent on the reference current.
start-up
VCF
0
internal
clock
0
V(GT1-S1)
0
V(GT2)
tno
tno
0
time
mgs991
Fig 3.
Oscillator timing
7.4 Operation in preheat mode
The circuit starts oscillating at a frequency of approximately 2.5fbtm (108 kHz). The
frequency will gradually decrease until a defined value of the current through RSHUNT is
reached (see Figure 4). The slope of the decrease in frequency is determined by the
UBA2025_1
Product data sheet
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Rev. 01 — 16 October 2009
4 of 17
UBA2025
NXP Semiconductors
CFL power IC
capacitor connected to pin CI. The frequency during preheating will be approximately
90 kHz. This frequency is well above the resonant frequency of the load, which means
that the lamp is off. The load consists of L2, C5 and the electrode resistance only
(see Figure 6). The preheat time is determined by the capacitor connected to pin CPAV.
The circuit can be locked in the preheat state by connecting pin CPAV to ground. During
preheating the circuit monitors the load current by measuring the voltage drop over
external resistor RSHUNT at the end of conduction of T2 with decision level Vshunt. The
frequency is decreased as long as VRS > Vshunt. The frequency is increased for
VRS < Vshunt.
fstart
fbtm
preheat state
ignition
state
burn state
time
mgs992
Fig 4.
Operation in preheat mode
7.5 Ignition state
The RS current monitoring function changes from Vshunt regulation to capacitive mode
protection at the end of the preheat time. Normally this results in a further frequency
decrease down to the bottom frequency fbtm (approximately 43 kHz). The frequency
change per ms is lowered with respect to the frequency change in the preheat mode.
During the downward frequency sweep the circuit sweeps through the resonant frequency
of the load. A high voltage will then appear across the lamp. This voltage will normally
ignite the lamp.
7.6 Failure to ignite
Excessive current levels may occur when the lamp fails to ignite. The IC does not limit
these currents in any manner.
7.7 Transition to the burn state
Assuming that the lamp has ignited during the downward frequency sweep, the frequency
normally decreases to the bottom frequency. The IC can transit to the burn state in two
ways:
• In the event that the bottom frequency is not reached, the transition is made after
reaching the ignition time tign.
• As soon as the bottom frequency is reached.
The bottom frequency is determined by resistor RIREF and capacitor CF.
UBA2025_1
Product data sheet
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Rev. 01 — 16 October 2009
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UBA2025
NXP Semiconductors
CFL power IC
7.8 Feed forward frequency
Above a defined voltage level at pin VDC the oscillation frequency also depends on the
supply voltage of the half bridge (see Figure 5). The current for the current controlled
oscillator is in this feed forward range and is derived from the current through RHV (this is
similar to pin RHV current). The feed forward frequency is proportional to the average
value of the current (within its operating range) through RHV. The feed forward frequency
is clamped for currents beyond the operating range (i.e. between 1.0 mA and 1.6 mA). In
order to prevent feed forward of the ripple on the input voltage on pin VDC, the ripple is
filtered out. The capacitor connected to pin CPAV is used for this purpose. This pin is also
used in the preheat state and the ignition state for timing (tph and tign).
f
(kHz)
feed-forward
range
bottom
frequency
IRHV (mA)
mgs993
Fig 5.
Feed forward frequency
7.9 Capacitive mode
When the preheat mode is completed, the IC will protect the power circuit against losing
the zero voltage switching condition and getting too close to the capacitive mode of
operation. This is detected by monitoring the voltage across RSHUNT. If the voltage at
pin RS is below Vth(capm) the capacitive mode threshold voltage at the time of turn-on
of T2, then capacitive mode operation is assumed. Consequently, the frequency will be
increased as long as the capacitive mode is detected. The frequency decreases down to
the feed forward frequency if no capacitive mode is detected. Frequency modulation is
achieved via pin CI.
7.10 IC supply
Initially, the IC is supplied from the bus voltage VDC by the current through RHV. This
current charges the supply capacitor CS9 via an internal diode. As soon as VS exceeds
Vstartup, the circuit starts oscillating. After the preheat phase is finished, pin RHV is
connected to an internal resistor (RRHV); prior to this the pin is internally connected to
pin VS. The voltage level at pin RHV thus drops from (VS + Vd) to a voltage equal to the
RHV pin current × RRHV. The capacitor CS9 at pin VS will now be charged via the snubber
capacitor CS7. Excess charge is drained by an internal clamp that turns on at the clamp
voltage (Vclamp) on pin VS.
7.11 Minimum gate source voltage of T1 and T2
The high side driver is supplied via capacitor CBOOT. CBOOT is charged via the bootstrap
switch during the on-periods of T2. The IC stops oscillating at a voltage level Vstop. Given
a maximum charge consumption on the gate of T1 (G1) of 1 nC/V, this safeguards the
minimum drive voltages V(G1-S1) for the high side driver; see Table 3.
UBA2025_1
Product data sheet
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Rev. 01 — 16 October 2009
6 of 17
UBA2025
NXP Semiconductors
CFL power IC
Table 3.
Minimum gate voltages
Frequency
Voltage
< 75 kHz
8 V (min.)
75 kHz to 80 kHz
7 V (min.)
> 85 kHz
6 V (min.)
The drive voltage at gate of T2 (G2) will exceed the drive voltage of the high side driver.
7.12 Frequency and change in frequency
At any point in time during oscillation, the circuit will operate between fbtm and fstart. Any
change in frequency will be gradual, no steps in frequency will occur. Changes in
frequency caused by a change in voltage at pin CI, show a rather constant df/dt over the
entire frequency range. The following rates are realised (at a frequency of 85 kHz and a
100 nF connected to pin CI):
• For any increase in frequency the df/dt will be between 15 kHz/ms and 37.5 kHz/ms
• During preheat and normal operation: the df/dt for a decrease in frequency is between
−6 kHz/ms and −15 kHz/ms
• During the ignition phase: the df/dt for a decrease in frequency is between
−150 Hz/msand −375 Hz/ms.
7.13 Ground pins
Pin PGND and pin GND are the ground references of the IC with respect to the
application. Pin SGND provides a local ground reference for the components connected
to pins CPAV, CI, IREF and CF. Other external connections to pin SGND are not preferred.
The sum of currents flowing out of the pins CPAV, CI, IREF, CF and SGND must remain
zero at any time. Pin GND is internally connected to SGND.
7.14 Charge coupling
Due to parasitic capacitive coupling to the high voltage circuitry, all pins are exposed to a
repetitive charge injection. Given the typical application in figure 6, the pins IREF and CF
are sensitive to this charge injection. For the rating Qcoup a safe functional operation of the
IC is guaranteed, independent of the current level. Charge coupling at current levels below
50 µA will not interfere with the accuracy of the Vth(capm) and Vshunt levels. Charge coupling
at current levels below 20 µA will not interfere with the accuracy of any parameter.
UBA2025_1
Product data sheet
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Rev. 01 — 16 October 2009
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UBA2025
NXP Semiconductors
CFL power IC
8. Limiting values
Table 4.
Limiting values
Symbol
Parameter
Vi(VDC)
input voltage on pin VDC operating
Conditions
during 0.5 s
voltage on pin FS
VFS
Min
Max
Unit
-
556
V
-
600
V
operating, with respect to S1A and S1B
-
14
V
during 0.5 s, with respect to S1A and S1B
-
17
V
Iclamp
clamp current
during 0.5 s
-
35
mA
ID
drain current
on T1; pulsed; tp limited by Tj(max); T < Tj(max)
-
1.5
A
on T2; pulsed; tp limited by Tj(max); T < Tj(max)
-
1.5
A
VI
input voltage
on pin RS; transient of 50 ns
−2.5
+2.5
V
on pin RS; operating normaly
−1.5
+2.5
V
pins S1A and S1B with respect to GND
−4
+4
V/ns
SR
slew rate
Tamb
ambient temperature
−40
+150
°C
Tj
junction temperature
−40
+150
°C
Tstg
storage temperature
−55
+150
°C
Qcoup
coupling charge
−8
+8
pC
pins 1, 8, 9, 10, 11, 12, 13, 14, 15
-
3000
V
pin 4, 5, 6
-
1500
V
pin 7
-
1000
V
-
< 500
V
pins 1, 3, 4, 5, 6, 8, 9, 10, 11, 12, 13, 14, 15, 16
-
250
V
pin 2
-
200
V
pin 7
-
<125
V
VESD
electrostatic discharge
voltage
at pins IREF and CF; normal operation
human body model
[1]
pin 2, 3, 16
machine model
[1]
Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor.
[2]
Equivalent to discharging a 200 pF capacitor through a 0.75 µH coil and a 10 Ω resistor.
[2]
9. Thermal characteristics
Table 5.
Thermal characteristics
Symbol
Parameter
Conditions
Typ
Unit
Rth(j-a)
thermal resistance from
junction to ambient
in free air; SO16L package
80
K/W
UBA2025_1
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Rev. 01 — 16 October 2009
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UBA2025
NXP Semiconductors
CFL power IC
10. Characteristics
Table 6.
Characteristics
Tamb = 25 °C; voltage on pin VS = 11 V; VFS − S1A and S1B voltage= 11 V, GLI and GLO voltage measured with respect to
PGND; currents are positive when flowing into the IC; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
high voltage pins
-
-
10
µA
4.0
5.5
6.5
V
High voltage supply
Ileak
leakage current
Start-up state
Vrst
reset voltage
Vstartup
start-up voltage
11.35 11.95 12.55 V
Vstop
stop voltage
9.55
10.15 10.75 V
Vhys
hysteresis voltage
1.5
1.8
2.0
V
150
200
250
µA
0.7
0.8
1.0
V
0.2
0.3
0.4
V
on pin VS
[1]
Istb
standby current
V(RHV-VS)
voltage difference pin RHV RHV pin current = 1.0 mA
and pin VS
∆Vclamp(startup)
start-up clamp voltage
difference
Iclamp
clamp current
VS pin voltage < 17 V
-
14
35
mA
fstart
start frequency
CI pin voltage = 0 V
98
108
118
kHz
tg
conduction time
T1; T2; fstart = 108 kHz
-
3.2
-
µs
Ich
charge current
on pin CI; pin CI voltage = 0 V;
pin RS voltage = −0.3 V
38
44
50
µA
on pin CPAV; pin CPAV voltage = 1 V
-
6.0
-
µA
on pin CI; pin CI voltage = 0 V;
pin RS voltage = −0.9 V
79
93
107
µA
on pin CPAV; pin CPAV voltage= 1 V
-
5.95
-
µA
599
666
733
µs
-
2.5
-
V
−636
−600
−564
mV
0.8
1
1.2
µA
[2]
Preheat mode
Idch
discharge current
tph
preheat time
∆VM(CPAV)
peak voltage difference on
pin CPAV
measured during preheat timing
Vctrl
control voltage
at pin RS
[3]
Frequency sweep to ignition
Ich
charge current
on pin CI; CI pin voltage = 1.5 V; f = 85 kHz
fbtm
bottom frequency
pin CI voltage at clamp level
tign
ignition time
-
42.9
-
kHz
-
625
-
ms
Normal operation
fbtm
bottom frequency
Vctrl < 1 V
tg
conduction time
for T1 and T2; fbtm = 43 kHz
tno
non-overlap time
Itot
total current
Vctrl
control voltage
Vref
reference voltage
Ron
on-state resistance
for supply; f = 43 kHz
for capacitive mode control
half bridge power
UBA2025_1
Product data sheet
42.21 42.90 44.59 kHz
-
10.2
-
µs
1.05
1.4
1.75
µs
-
-
1.6
mA
[4]
0
20
40
mV
[5]
2.425 2.5
2.575 V
-
3
-
Ω
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 16 October 2009
9 of 17
UBA2025
NXP Semiconductors
CFL power IC
Table 6.
Characteristics …continued
Tamb = 25 °C; voltage on pin VS = 11 V; VFS − S1A and S1B voltage= 11 V, GLI and GLO voltage measured with respect to
PGND; currents are positive when flowing into the IC; unless otherwise specified.
Symbol
Parameter
Conditions
Ron(150)/Ron(25) on-state resistance ratio
(150 °C to 25 °C)
VFd(bs)
bootstrap diode forward
voltage
IFS = 5 mA
Min
Typ
Max
Unit
-
2.7
-
0.6
1.0
1.4
V
1.54
2.2
2.86
kΩ
1
mA
feed forward
Ri(RHV)
input resistance on pin
RHV
Ii(RHV)
input current on pin RHV
during normal operation
fff
feed forward frequency
pin RHV current = 0.75 mA
fff(ratio)
feed forward frequency
ratio
pin RHV current = 1 mA
Rs
series resistance
RCPAV
resistance on pin CPAV
[6]
0
60.4
63.6
66.15 kHz
80.3
84.5
88.2
0.9
1.0
1.1
CPAV switch; pin CPAV current = 100 µA
0.75
1.5
2.25
kΩ
used with CCPAV for averaging;
CPAV pin current = 10 µA
22.4
32
41.6
kΩ
pin RHV current = 1 mA
[7]
kHz
[1]
The start-up supply current is specified in a temperature (Tvj) range of 0 °C to 125 °C. For Tvj < 0 °C and Tvj > 125 °C
the start-up supply current is < 350 µA.
[2]
The clamp margin is defined as the voltage difference between turn-on of the clamp and start of oscillation. The clamp is in the off-state
at start of oscillation.
[3]
Data sampling of Vth(capm) is performed at the end of conduction of T2.
[4]
Data sampling of Vth(capm) is performed at the start of conduction of T2.
[5]
Within the allowed range of RIREF, defined as 30 kΩ +10%.
[6]
The input current at pin RHV may increase to 1.6 mA during voltage transient on pin VDC. Only for pin RHV currents beyond
approximately 550 mA the oscillator frequency is proportional to the pin RHV current.
[7]
The symmetry is best calculated using fff(ratio) where fff(ratio) = T1 total time divided by the T2 total time with the T1 total time the time
between turn-off of G2 and turn-off of G1, and the T2 total time the time between turn-off of G1 and turn-off of G2.
UBA2025_1
Product data sheet
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Rev. 01 — 16 October 2009
10 of 17
UBA2025
NXP Semiconductors
CFL power IC
11. Application information
11.1 Design equations
• Bottom frequency:
1
f btm = ----------------------------------------------------------------------------------------------------------- ( Hz )
2 × [ ( C f + C par ) × ( X 1 × R IREF – R int ) ] + t
• Feed forward frequency:
1
f ff = ------------------------------------------------------------------------------------------------------------------------- ( Hz )
× V ref × R HV
X
2
2 × ( C f + C par ) ×  ---------------------------------------- – R int + t

V i ( VDC )
Where:
– X1 = 3.68
– X2 = 22.28
– t = 0.4 µs
– Rint = 3 kΩ
– Cpar = 4.7 pF
– Vref = 2.5 V
– Vi(VDC) = 300 V (nominal)
– RHV = 560 KΩ (see Figure 6)
• Operating frequency = fbtm(max), fff(max), and fcm(max)
Where:
– fbtm = bottom frequency
– fff(max) = maximum feed forward frequency
– fcm(max) = maximum frequency due to capacitive mode detection
• Preheat time:
C CP
R ref
t ph = ------------------ × --------------- ( s )
150 nF 30 kΩ
• Ignition time:
15
t ign = ------ × t ph ( s )
16
• Non-overlap time:
R ref
t no = 1.4 µs × --------------30 kΩ
UBA2025_1
Product data sheet
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Rev. 01 — 16 October 2009
11 of 17
UBA2025
NXP Semiconductors
CFL power IC
11.2 Application diagram
L1
RHV
VDC
RHV
GLI
CI
DS1
C3
DS2
CI
GLO
CPAV
S1A
CCPAV
R1
230 V AC
L2
C2
S1B
CF
UBA2025
LAMP
CF
CBOOT
FS
C5
IREF
CS7
DS7
DS3
DS4
C4
VS
SGND
DS8
PGND GND
RS
CS9
− Vshunt +
RSHUNT
Fig 6.
RIREF
014aaa937
23 W CFL application diagram
Table 7.
23 W CFL application component values
Component type
Component
name
Value
Description
diodes
DS1-DS4
IN4007
bridge rectifier
DS7, DS8
IN4148
limiting and charge pump
R1
10 Ω
inrush or fusistor
RIREF
30 kΩ
reference
RHV
560 kΩ
start-up and feed forward frequency
RSHUNT
1.1 Ω
sensing (2 W)
L1
1.8 mH
input mains filter
L2
3 mH
resonant
C2
5.6 µH; 400 V
mains buffer
C3, C4
100 nF; 200 V
DC blocking
C5
3.9 nF; 630 V
resonant
CI
47 nF
integrating
CCPAV
100 nF
preheat and averaging
CF
100 pF
internal reference oscillator
CBOOT
100 nF; 400 V
bootstrap
CS7
150 pF; 400 V
charge pump and dv/dt limiting
resistors
inductors
capacitors
UBA2025_1
Product data sheet
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Rev. 01 — 16 October 2009
12 of 17
UBA2025
NXP Semiconductors
CFL power IC
Table 7.
23 W CFL application component values
Component type
Component
name
Value
Description
capacitor
CS9
100 nF
decoupling
CFL
E27 CFL
23 W
CFL E27 type, 23 W
IC
UBA2025T
SO16L, SOT162-1
control IC with integrated power MOSFETs
UBA2025_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 16 October 2009
13 of 17
UBA2025
NXP Semiconductors
CFL power IC
12. Package outline
SO16: plastic small outline package; 16 leads; body width 7.5 mm
SOT162-1
D
E
A
X
c
HE
y
v M A
Z
16
9
Q
A2
A
(A 3)
A1
pin 1 index
θ
Lp
L
8
1
e
detail X
w M
bp
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1)
E (1)
e
HE
L
Lp
Q
v
w
y
mm
2.65
0.3
0.1
2.45
2.25
0.25
0.49
0.36
0.32
0.23
10.5
10.1
7.6
7.4
1.27
10.65
10.00
1.4
1.1
0.4
1.1
1.0
0.25
0.25
0.1
0.01
0.019 0.013
0.014 0.009
0.41
0.40
0.30
0.29
0.05
0.419
0.043
0.055
0.394
0.016
inches
0.1
0.012 0.096
0.004 0.089
0.043
0.039
0.01
0.01
Z
(1)
0.9
0.4
0.035
0.004
0.016
θ
o
8
o
0
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
Fig 7.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT162-1
075E03
MS-013
JEITA
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Package outline SOT162-1 (SO16)
UBA2025_1
Product data sheet
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Rev. 01 — 16 October 2009
14 of 17
UBA2025
NXP Semiconductors
CFL power IC
13. Abbreviations
Table 8.
Abbreviations
Acronym
Description
CFL
Compact Fluorescent Lamp
NMOST
Negative Channel Metal-Oxide Semiconductor
MOSFET
Metal-Oxide-Semiconductor Field-Effect Transistors
LS
Low Side
14. Revision history
Table 9.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
UBA2025_1
20091016
Product data sheet
-
-
UBA2025_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 16 October 2009
15 of 17
UBA2025
NXP Semiconductors
CFL power IC
15. Legal information
15.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
15.3 Disclaimers
General — Information in this document is believed to be accurate and
reliable. However, NXP Semiconductors does not give any representations or
warranties, expressed or implied, as to the accuracy or completeness of such
information and shall have no liability for the consequences of use of such
information.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
Suitability for use — NXP Semiconductors products are not designed,
authorized or warranted to be suitable for use in medical, military, aircraft,
space or life support equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
NXP Semiconductors products in such equipment or applications and
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) may cause permanent
damage to the device. Limiting values are stress ratings only and operation of
the device at these or any other conditions above those given in the
Characteristics sections of this document is not implied. Exposure to limiting
values for extended periods may affect device reliability.
Terms and conditions of sale — NXP Semiconductors products are sold
subject to the general terms and conditions of commercial sale, as published
at http://www.nxp.com/profile/terms, including those pertaining to warranty,
intellectual property rights infringement and limitation of liability, unless
explicitly otherwise agreed to in writing by NXP Semiconductors. In case of
any inconsistency or conflict between information in this document and such
terms and conditions, the latter will prevail.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from national authorities.
15.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
16. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
UBA2025_1
Product data sheet
© NXP B.V. 2009. All rights reserved.
Rev. 01 — 16 October 2009
16 of 17
UBA2025
NXP Semiconductors
CFL power IC
17. Contents
1
2
3
4
5
6
6.1
6.2
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
8
9
10
11
11.1
11.2
12
13
14
15
15.1
15.2
15.3
15.4
16
17
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Pinning information . . . . . . . . . . . . . . . . . . . . . . 3
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
Functional description . . . . . . . . . . . . . . . . . . . 4
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Initial start-up . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Oscillation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Operation in preheat mode . . . . . . . . . . . . . . . . 4
Ignition state . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Failure to ignite . . . . . . . . . . . . . . . . . . . . . . . . . 5
Transition to the burn state . . . . . . . . . . . . . . . . 5
Feed forward frequency . . . . . . . . . . . . . . . . . . 6
Capacitive mode . . . . . . . . . . . . . . . . . . . . . . . . 6
IC supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Minimum gate source voltage of T1 and T2 . . . 6
Frequency and change in frequency. . . . . . . . . 7
Ground pins . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Charge coupling . . . . . . . . . . . . . . . . . . . . . . . . 7
Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 8
Thermal characteristics. . . . . . . . . . . . . . . . . . . 8
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Application information. . . . . . . . . . . . . . . . . . 11
Design equations . . . . . . . . . . . . . . . . . . . . . . 11
Application diagram . . . . . . . . . . . . . . . . . . . . 12
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15
Legal information. . . . . . . . . . . . . . . . . . . . . . . 16
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Contact information. . . . . . . . . . . . . . . . . . . . . 16
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2009.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 16 October 2009
Document identifier: UBA2025_1