AN-1044 APPLICATION NOTE One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Programming the AD5932 for Frequency Sweep and Single Frequency Outputs by Liam Riordan INTRODUCTION because it performs the same function as the INTERRUPT pin. Typically, this is followed by a serial loading of all the required scan parameters. The DAC output remains at midscale until a frequency scan is started using the CTRL pin. This application note details how to program the output of the AD5932 to sweep frequency from 1 MHz to 10 MHz. Then, when the user has discovered the strongest frequency point on the spectrum, the part can be selected to only transmit a sine wave at that particular frequency. To set up the part in sweep mode, the following registers must be written to: POWERING UP THE AD5932 • • • • The AD5932 is powered up in an undefined state. The registers (control and frequency) contain invalid data and must be set to a known value by the user. The control register should be the first register to be programmed because this sets up the part. Note that a write to the control register automatically resets the internal state machines and provides an analog output of midscale Control register × 1 Start frequency registers (FSTART) × 2 Frequency increment (or delta frequency) register (Δf) × 1 Number of increments register (NINCR) × 1 FUNCTIONAL BLOCK DIAGRAM DVDD CAP/2.5V DGND INTERRUPT STANDBY AGND AVDD AD5932 REGULATOR VCC 2.5V BUFFER SYNCOUT BUFFER MSBOUT MCLK SYNC INCREMENT CONTROLLER CTRL DATA 24-BIT PIPELINED DDS CORE INCR FREQUENCY CONTROLLER /24 10-BIT DAC VOUT DATA AND CONTROL FSYNC SCLK CONTROL REGISTER ON-BOARD REFERENCE FULL-SCALE CONTROL COMP 08425-001 SERIAL INTERFACE SDATA Figure 1. Rev. A | Page 1 of 4 AN-1044 Application Note TABLE OF CONTENTS Introduction ...................................................................................... 1 Programming the AD5932 in Sweep Mode...............................3 Powering Up the AD5932................................................................ 1 Programming the AD5932 for Single Frequency Output........4 Functional Block Diagram .............................................................. 1 REVISION HISTORY 11/10—Rev. 0 to Rev. A Changes to Table 1, Start Frequency Section, and Frequency Increment Section............................................................................. 3 8/09—Revision 0: Initial Version Rev. A | Page 2 of 4 Application Note AN-1044 Therefore, for the FSTART LSB, the following data (Frame II) is loaded: PROGRAMMING THE AD5932 IN SWEEP MODE Control Register The first register to write to after powering up the AD5932 is the 16-bit control register. 1100 1110 1011 1000 Writing the following code (Frame I) to the control register sets the part to sweep mode (see Table 1): 1101 0000 0101 0001 0000 1111 1111 1111 The Δf register is a 23-bit register that requires two 16-bit writes to be programmed. The direction of the increment is determined by the address bits (see Table 3). For the FSTART MSB, the following code (Frame III) is loaded: Table 1. Description of Bits in the Control Register Bit D15 to D12 D11 Value 0 Function Address bits 1 D10 D9 D8 D7 D6 D5 1 1 1 1 1 1 D4 D3 D2 D1 D0 1 1 1 1 1 FSTART becomes a two-write operation, both MSB and LSB loaded DAC enabled Sine wave selected MSBOUT pin enabled Reserved Reserved Increments triggered externally through CTRL pin Reserved SYNCOUT pin toggles at the end of a sweep SYNCOUT pin toggles at the end of a sweep Reserved Reserved Frequency Increment Table 3. Δf Register Bits Start Frequency The next two bytes in the sequence are the FSTART registers, both MSB and LSB (see Table 2). D15 0 0 D14 0 0 D13 1 1 D12 0 1 0 0 1 1 D11 D10 to D0 12 LSBs of ∆f [11:0] 0 11 MSBs of Δf [22:12] 1 11 MSBs of Δf [22:12] For an increment of 0.1 MHz, the same method is used to calculate the increment size. M= f OUT × 2 n f MCLK where: fOUT = 0.1 MHz. M = 0x8312. Therefore, for an increasing increment sweep, the LSB (Frame IV) of the Δf register is 0010 0011 0001 0010 Table 2. FSTART Registers D15 1 1 D14 1 1 D13 0 0 D12 0 1 The MSB (Frame V) of the Δf register is D11 to D0 12 LSBs of FSTART [11:0] 12 MSBs of FSTART [23:12] 00110 000 0000 1000 To generate a 1 MHz start frequency, the following equation defines the code to be loaded: M= f OUT × 2 n f MCLK where: fOUT = 1 MHz, the output frequency of AD5932. fMCLK = 50 MHz, the MCLK frequency. n = 24 bits, the resolution of the on-chip accumulator. M= f OUT × 2 n f MCLK Scan Direction N/A Positive Δf (FSTART + Δf ) Negative Δf (FSTART − Δf ) = 335,544 = 0x51EB8 This hexadecimal value must be separated into the FSTART MSB and FSTART LSB. 0x51EB8 = 0101 0001 1110 1011 1000 Rev. A | Page 3 of 4 AN-1044 Application Note Number of Increments (NINCR) Increment Interval The end frequency is calculated by multiplying the frequency increment value (Δf) by the number of frequency increments, NINCR. This is a 12-bit data register with four address bits, as shown in Table 4, where the maximum number of increments is 4095. This is the last register that can be loaded. However, in the control register, the external increment control is selected; therefore, this register does not need to be written to. Refer to the AD5932 data sheet for further details. Table 4. NINCR Data Bits D11 to D0 0000 0000 0010 0000 0000 0011 0000 0000 0100 … 1111 1111 1110 1111 1111 1111 Number of Increments Two frequency increments. This is the minimum number of frequency increments. Three frequency increments. Four frequency increments. … 4094 frequency increments. 4095 frequency increments. To calculate the stop frequency, use the following equation: fSTOP = FSTART + NINCR × Δf To obtain a stop frequency of 10 MHz with an FSTART of 1 MHz and a Δf of 0.1 MHz, 90 increments are needed. In the auto-increment mode, a single pulse at the CTRL pin starts and executes the frequency scan. In the external increment mode, the CTRL pin also starts the scan, but the frequency increment interval is determined by the time interval between sequential low-to-high transitions on the CTRL pin. PROGRAMMING THE AD5932 FOR SINGLE FREQUENCY OUTPUT Once the sweep is complete and the user measures the optimum frequency tone, for example, 2.5 MHz, it is possible to select this frequency value and transmit continuously. Load 2.5 MHz to the FSTART register and then load to output by driving the CTRL pin high. Make no further low-to-high transitions on the CTRL pin so that the optimum frequency is available on the AD5932 VOUT pin continuously. 90 decimal = 5A = 0101 1010 Therefore, for the NINCR register, load the following data (Frame VI): 0001 0000 0101 1010 ©2009–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. AN08425-0-11/10(A) Rev. A | Page 4 of 4