NCV8668 D

NCV8668
Very Low Iq 150 mA LDO
Regulator with Window
Watchdog, Enable and
Reset
The NCV8668 is 150 mA LDO regulator with integrated window
watchdog and reset functions dedicated for microprocessor
applications. Its robustness allows NCV8668 to be used in severe
automotive environments. Very low quiescent current as low as 38 mA
typical makes it suitable for applications permanently connected to
battery requiring very low quiescent current with or without load. The
Enable function can be used for further decrease of quiescent current
down to 1 mA.
The NCV8668 contains protection functions as current limit and
thermal shutdown.
•
•
•
VBAT
V in
C in
0.1 mF
V out
NCV8668
RO
EN
V8668ZZXXG
AWLYWW
1
SOIC−14
CASE 751A
1
8
SOIC−8
D SUFFIX
CASE 751A
1
668ZZX
ALYW
G
8
8
668ZZX
AYWWG
G
1
SOIC−8 EP
CASE 751AC
1
ZZ
= Timing, Reset Threshold,
Watchdog Control Options*
XX,X
= Voltage Options
= 5 V (XX = 50, X = 5)
= 3.3 V (XX = 33, X = 3)
A
= Assembly Location
WL, L = Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G = Pb−Free Package
*See APPLICATION INFORMATION Section.
Body Control Module
Instruments and Clusters
Occupant Protection and Comfort
Powertrain
OFF ON
14
14
1
Output Voltage Options: 3.3 V and 5 V
Output Voltage Accuracy: $1.5% (TJ = 25°C to 125°C)
Output Current up to 150 mA
Very Low Quiescent Current: Typ 38 mA (max 43 mA)
Very Low Dropout Voltage
Enable Function
Microprocessor Compatible Control Functions:
♦ Reset with Adjustable Power−on Delay
♦ Window Watchdog
Wide Input Voltage Operation Range: up to 40 V
Protection Features:
♦ Current Limitation
♦ Reverse Output Current
♦ Thermal Shutdown
These are Pb−Free Devices
Typical Applications
•
•
•
•
MARKING
DIAGRAMS
8
Features
•
•
•
•
•
•
•
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ORDERING INFORMATION
Vout
See detailed ordering and shipping information in the package
dimensions section on page 15 of this data sheet.
VDD
C out
2.2 mF
Microprocessor
RESET
WDI
I/O
WM1
WM2
I/O
I/O
GND
Figure 1. Application Schematic
© Semiconductor Components Industries, LLC, 2010
October, 2010 − Rev. 2
1
Publication Order Number:
NCV8668/D
NCV8668
Vin
Vout
*
Driver with
Current
Limit
RO
Thermal
Shutdown
WDI
RESET
GENERATOR
and
WINDOW
WATCHDOG
Vref
WM1
WM2
Enable
EN
GND
* 5 V OPTION ONLY
RO
GND
GND
GND
GND
WM 2
WM 1
1
14
EN
Vin
GND
GND
GND
Vout
WDI
Figure 2. Simplified Block Diagram
1
8
RO
1
EN
RO
8
EN
GND
Vin
GND
Vin
WM 2
Vout
WM 2
Vout
WM 1
WDI
WM 1
WDI
SOIC−8 EP
SOIC−8
SOIC−14
Figure 3. Pin Connections
(Top View)
PIN FUNCTION DESCRIPTION
Pin No.
SOIC−14
Pin No.
SOIC−8
Pin No.
SOIC−8 EP
Pin
Name
1
1
1
RO
2, 3, 4, 5, 10,
11, 12
2
2
GND
Power Supply Ground.
For SOIC−14
− connect pin 2 and 3 to GND
− connect pin 4−5 and 10−12 to heatsink area with GND potential
6
3
3
WM2
Watchdog Mode Bit 2; Watchdog and Reset mode selection. Connect to Vout
or GND.
7
4
4
WM1
Watchdog Mode Bit 1; Watchdog and Reset mode selection. Connect to Vout
or GND.
8
5
5
WDI
Watchdog Input; Trigger Input for Watchdog pulses. When not used, connect
to Vout or GND.
9
6
6
Vout
Regulated Output Voltage. Connect 2.2 mF capacitor with ESR < 100 W to
ground.
13
7
7
Vin
Positive Power Supply Input. Connect 0.1 mF capacitor to ground.
14
8
8
EN
Enable Input; low level disables the IC.
EPAD
GND
Exposed Pad is Connected to Ground
Description
Reset Output. 30 kW internal Pull−Up resistor connected to Vout. (Open Drain
output for 2.5 V, 2.6 V, and 3.3 V voltage options) RO goes Low when Vout
drops by more than 7% from nominal.
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2
NCV8668
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Min
Max
−0.3
−
40
45
Iin
−5
−
Output Voltage (Note 2)
Vout
−0.3
5.5
V
Output Current
Iout
−3
Current Limited
mA
Enable Input Voltage Range
DC
Transient, t < 100 ms
VEN
−0.3
−
40
45
Enable Input Current Range
IEN
−1
1
Reset Output Voltage (Note 3)
VRO
−0.3
5.5
V
Reset Output Current
IRO
−3
3
mA
Watchdog Input Voltage
VWDI
−0.3
5.5
V
Watchdog Mode 1 Voltage
VWM1
−0.3
5.5
V
Watchdog Mode 1 Current
IWM1
−5
5
mA
Watchdog Mode 2 Voltage
VWM2
−0.3
5.5
V
Watchdog Mode 2 Current
Input Voltage (Note 1)
DC
Transient, t < 100 ms
Vin
Input Current
Unit
V
mA
V
mA
IWM2
−5
5
mA
Junction Temperature
TJ
−40
150
°C
Storage Temperature
TSTG
−55
150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. The Output voltage must not exceed the Input voltage.
3. The Reset Output voltage must not exceed the Output voltage.
ESD CAPABILITY (Note 4)
Symbol
Min
Max
Unit
ESD Capability, Human Body Model
ESDHBM
−2
2
kV
ESD Capability, Machine Model
ESDMM
−200
200
V
Symbol
Min
Max
Unit
Lead Temperature Soldering
Reflow (SMD Styles Only), Pb−Free Versions (Note 5)
TSLD
−
265 peak
°C
Moisture Sensitivity Level
MSL
Rating
4. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (JS−001−2010)
ESD Machine Model tested per AEC−Q100−003 (EIA/JESD22−A115)
LEAD SOLDERING TEMPERATURE AND MSL (Note 5)
Rating
(SOIC−14, SOIC−8)
(SOIC−8EP)
1
2
5. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
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3
−
NCV8668
THERMAL CHARACTERISTICS (Note 6)
Rating
Symbol
Value
Thermal Characteristics, SOIC−14 (Note 6)
Thermal Resistance, Junction−to−Air (Note 7)
Thermal Reference, Junction−to−Lead4 (Note 7)
RqJA
RYJL
95
18.2
Thermal Characteristics, SOIC−8 (Note 6)
Thermal Resistance, Junction−to−Air (Note 7)
Thermal Reference, Junction−to−Lead4 (Note 7)
RqJA
RYJL
132
49.2
Thermal Characteristics, SOIC−8 EP (Note 6)
Thermal Resistance, Junction−to−Air (Note 7)
Thermal Reference, Junction−to−Lead4 (Note 7)
Thermal Reference, Junction−to−Pad (Note 7)
RqJA
RYJL4
RYJPad
80
28.5
14.8
Unit
°C/W
°C/W
°C/W
6. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
7. Values based on copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate.
RECOMMENDED OPERATING RANGES (Note 8)
Rating
Symbol
Min
Max
Unit
Input Voltage (Note 9)
Vin
4.5
40
V
Junction Temperature
TJ
−40
150
°C
8. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
9. Minimum Vin = 4.5 V or (Vout + VDO), whichever is higher.
ELECTRICAL CHARACTERISTICS
Vin = 13.2 V, Cin = 0.1 mF, Cout = 2.2 mF, for typical values TJ = 25°C, for min/max values TJ = −40°C to 150°C; unless otherwise noted.
(Notes 10 and 11)
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
3.2505
4.925
(−1.5%)
3.3
5.0
3.3495
5.075
(+1.5%)
3.234
3.234
4.9
4.9
(−2%)
3.3
3.3
5.0
5.0
3.366
3.366
5.1
5.1
(+2%)
3.234
4.9
(−2%)
3.3
5.0
3.366
5.1
(+2%)
Regline
−20
0
20
mV
Regload
−40
10
40
mV
−
−
225
300
450
600
2.2
−
1
−
−
−
−
100
100
REGULATOR OUTPUT
Output Voltage (Accuracy %)
3.3 V
5.0 V
Output Voltage (Accuracy %)
3.3 V
5.0 V
TJ = 25°C to 125°C
Vin = 4.5 V to 16 V, Iout = 0.1 mA to 100 mA
Vin = 5.5 V to 16 V, Iout = 0.1 mA to 100 mA
Vin = 4.5 V to 40 V, Iout = 0.1 mA to 100 mA
Vin = 4.5 V to 16 V, Iout = 0.1 mA to 150 mA
Vin = 5.55 V to 40 V, Iout = 0.1 mA to 100 mA
Vin = 5.7 V to 16 V, Iout = 0.1 mA to 150 mA
Output Voltage (Accuracy %)
3.3 V
5.0 V
TJ = −40°C to 125°C
Vin = 4.5 V to 28 V, Iout = 0 mA
Vin = 5.5 V to 28 V, Iout = 0 mA
Line Regulation
5.0 V
3.3 V
Vin = 5.5 V to 28 V, Iout = 5 mA
Vin = 4.5 V to 28 V, Iout = 5 mA
Load Regulation
Iout = 0.1 mA to 150 mA
Dropout Voltage (Note 12)
5.0 V
Output Capacitor for Stability (Note 13)
Vout
Vout
Vout
VDO
Iout = 100 mA
Iout = 150 mA
Cout
ESR
Iout = 5 mA to 150 mA
Iout = 0 mA to 5 mA
V
V
V
mV
mF
W
W
10. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area.
11. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [TJ. Low duty
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
12. Measured when output voltage falls 100 mV below the regulated voltage at Vin = 13.2 V. If Vout < 5 V, then VDO = Vin – Vout. Maximum dropout voltage value is limited by minimum input voltage Vin = 4.5 V recommended for guaranteed operation at maximum output current.
13. Values based on design and/or characterization.
14. Recommended for typical trigger time. TWD = tCW + 1/2 * tOW
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NCV8668
ELECTRICAL CHARACTERISTICS
Vin = 13.2 V, Cin = 0.1 mF, Cout = 2.2 mF, for typical values TJ = 25°C, for min/max values TJ = −40°C to 150°C; unless otherwise noted.
(Notes 10 and 11)
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
IDIS
−
−
1
mA
−
−
38
−
43
44
Disable and Quiescent Current
Disable Current
Quiescent Current (Iq = Iin – Iout)
VEN = 0 V,TJ < 85°C
Iout = 100 mA, TJ = 25°C
Iout = 100 mA, TJ v 125°C
Iq
mA
Current Limit Protection
Current Limit
Vout = 0.96 x Vout_nom
ILIM
205
−
525
mA
Short Circuit Current Limit
Vout = 0 V
ISC
205
−
525
mA
Vout_rev
−
2
5.5
V
PSRR
−
60
−
dB
3
−
−
−
−
0.8
−
−
3
0.5
5
1
Reverse Output Current Protection
Reverse Output Current Protection
VEN = 0 V, Iout = −1 mA
PSRR
Power Supply Ripple Rejection (Note 13) f = 100 Hz, 0.5Vpp
Enable Thresholds
Vth(EN)
Enable Input Threshold Voltage
Logic High
Logic Low
Enable Input Current
Logic High
Logic Low
VEN = 5 V
VEN = 0 V, TJ < 85°C
IEN_ON
IEN_OFF
V
mA
Window Watchdog
Watchdog Mode Bit 1 Threshold Voltage
Voltage Increasing, Logic High
3.3 V
5.0 V
Voltage Decreasing, Logic Low
VWM1,H
VWM1,L
Watchdog Mode Bit 2 Threshold Voltage
Voltage Increasing, Logic High
3.3 V
5.0 V
Voltage Decreasing, Logic Low
VWM2,H
VWM2,L
Watchdog Input WDI Threshold Voltage
Voltage Increasing, Logic High
3.3 V
5.0 V
Voltage Decreasing, Logic Low
Watchdog Input WDI Current
Logic High
Logic Low
VWDI,H
VWDI,H = 5 V
VWDI,L = 0 V, TJ < 85 °C
V
−
−
0.8
−
−
−
2.65
4.0
−
V
−
−
0.8
−
−
−
2.65
4.0
−
V
VWDI,L
−
−
0.8
−
−
−
2.65
4.0
−
IWDI,H
IWDI,L
−
−
3
0.5
4
1
mA
Watchdog Sampling Time
Fast:
Slow:
WM2 = L
WM1 = L AND WM2 = H
tsam
0.4
0.8
0.5
1.0
0.6
1.2
ms
Ignore Window Time
Fast:
Slow:
WM2 = L
WM1 = L AND WM2 = H
tIW
25.6
51.2
32.0
64.0
38.4
76.8
ms
Open Window Time
Fast:
Slow:
WM2 = L
WM1 = L AND WM2 = H
tOW
25.6
51.2
32.0
64.0
38.4
76.8
ms
Closed Window Time
Fast:
Slow:
WM2 = L
WM1 = L AND WM2 = H
tCW
25.6
51.2
32.0
64.0
38.4
76.8
ms
10. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area.
11. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [TJ. Low duty
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
12. Measured when output voltage falls 100 mV below the regulated voltage at Vin = 13.2 V. If Vout < 5 V, then VDO = Vin – Vout. Maximum dropout voltage value is limited by minimum input voltage Vin = 4.5 V recommended for guaranteed operation at maximum output current.
13. Values based on design and/or characterization.
14. Recommended for typical trigger time. TWD = tCW + 1/2 * tOW
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NCV8668
ELECTRICAL CHARACTERISTICS
Vin = 13.2 V, Cin = 0.1 mF, Cout = 2.2 mF, for typical values TJ = 25°C, for min/max values TJ = −40°C to 150°C; unless otherwise noted.
(Notes 10 and 11)
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
WM2 = L
WM1 = L AND WM2 = H
tWD
−
−
48
96
−
−
ms
Window Watchdog
Window Watchdog Trigger Time
(Note 14)
Fast:
Slow:
Watchdog Deactivation Current
Threshold
3.3 V
5.0 V
Iout decreasing
Vin > 4.5 V
Vin > 5.5 V
Watchdog Activating Current Threshold
3.3 V
5.0 V
Iout increasing
Vin > 4.5 V
Vin > 5.5 V
Iout_WD_OFF
mA
0.5
0.5
−
−
−
−
−
−
2
2
5
5
−
3.8
4.2
90
90
93
93
96
96
−
2.0
−
1.3
1.75
−
−
−
−
VROL
−
0.15
0.25
V
Reset Output High Voltage
5.0 V
VROH
4.5
−
−
V
Reset High Level Leakage Current
3.3 V
IROLK
−
−
1
mA
Integrated Reset Pull Up Resistor
5.0 V
RRO
15
30
50
kW
tRD
12.8
25.6
16
32
19.2
38.4
ms
tRR
16
25
38
ms
Thermal Shutdown Temperature
(Note 13)
TSD
150
175
195
°C
Thermal Shutdown Hysteresis (Note 13)
TSH
−
25
−
°C
Iout_WD_ON
mA
Reset Output RO
Input Voltage Reset Threshold
3.3 V
Vin decreasing, Vout > VRT
Output Voltage Reset Threshold
3.3 V
5.0 V
Vout decreasing
Vin > 4.5 V
Vin > 5.5 V
VRT
Reset Hysteresis
VRH
Maximum Reset Sink Current
3.3 V
5.0 V
Vout = 3 V, VRO = 0.25 V
Vout = 4.5 V, VRO = 0.25 V
Reset Output Low Voltage
Vout > 1 V, IRO < 200 mA
Reset Delay Time
Vin_RT
Fast: WM1 = L AND WM2 = L
Slow:WM1 = H OR (WM1 = L AND WM2 = H)
Reset Reaction Time (See Figure 24)
IRomax
V
%Vout
%Vout
mA
THERMAL SHUTDOWN
10. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area.
11. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [TJ. Low duty
cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
12. Measured when output voltage falls 100 mV below the regulated voltage at Vin = 13.2 V. If Vout < 5 V, then VDO = Vin – Vout. Maximum dropout voltage value is limited by minimum input voltage Vin = 4.5 V recommended for guaranteed operation at maximum output current.
13. Values based on design and/or characterization.
14. Recommended for typical trigger time. TWD = tCW + 1/2 * tOW
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NCV8668
TYPICAL CHARACTERISTICS
200
Vin = 13.2 V
Iout = 100 mA
39
38
Iq, QUIESCENT CURRENT (mA)
Iq, QUIESCENT CURRENT (mA)
40
37
36
35
34
33
32
31
30
−40 −20
0
20
40
60
80
100 120
Iout = 0 mA
TJ = 25°C
150
100
50
0
140 160
0
5
10
Figure 4. Quiescent Current vs Temperature
38
37
Vout, OUTPUT VOLTAGE (V)
Iq, QUIESCENT CURRENT (mA)
30
35
40
5.10
−40°C
36
150°C
35
34
25°C
33
32
31
0
25
50
75
100
125
Vin = 13.2 V
Iout = 100 mA
5.05
5.00
4.95
4.90
−40 −20
150
0
20
40
60
80
100 120
140 160
TJ, JUNCTION TEMPERATURE (°C)
Iout, OUTPUT CURRENT (mA)
Figure 6. Quiescent Current vs Output Current
Figure 7. Output Voltage vs Temperature
(5 V option)
6
600
VDO, DROPOUT VOLTAGE (mV)
Iout = 1 mA
Vout, OUTPUT VOLTAGE (V)
25
Vin = 13.2 V
39
5
TJ = 25°C
4
3
2
1
0
20
Figure 5. Quiescent Current vs Input Voltage
(5 V option)
40
30
15
Vin, INPUT VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
0
1
2
3
4
5
6
7
500
400
200
25°C
100
−40°C
0
8
150°C
300
0
25
50
75
100
125
Iout, OUTPUT CURRENT (mA)
Vin, INPUT VOLTAGE (V)
Figure 8. Output Voltage vs Input Voltage
(5 V option)
Figure 9. Dropout Voltage vs Output Current
(5 V option)
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150
NCV8668
TYPICAL CHARACTERISTICS
400
700
600
ILIM, ISC, CURRENT LIMIT (mA)
VDO, DROPOUT VOLTAGE (mV)
800
150 mA
500
400
300
100 mA
200
100
0
−40 −20
0
20
40
60
80
100 120
300
200
ILIM @ Vout = 4.8 V (5 V option)
100
0
140 160
0
5
10
15
20
25
30
35
40
Vin, INPUT VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 10. Dropout vs Temperature
(5 V option)
Figure 11. Current Limit vs. Input Voltage
400
100
Vin = 13.2 V
ESR, STABILITY REGION (W)
ILIM, ISC, CURRENT LIMIT (mA)
TJ = 25°C
ISC @ Vout = 0 V
350
ISC @ Vout = 0 V
300
ILIM @ Vout = 4.8 V (5 V option)
250
200
−40 −20
0
20
40
60
80
100 120
10
1
Stable Region
0.1
0.01
140 160
Vin = 13.2 V
TJ = −40°C to 150°C
CLOAD = 2.2 mF − 100 mF
Unstable
Region
1
10
TJ, JUNCTION TEMPERATURE (°C)
Figure 13. Cout ESR Stability Region vs Output
Current
TJ = 25°C
Vin = 13.2 V
Cout = 10 mF
trise/fall = 1 ms (Iout)
150 mA
Iout
(100 mA/div)
Vin
(1 V/div)
TJ = 25°C
Iout = 1 mA
Cout = 10 mF
trise/fall = 1 ms (Vin)
12.2 V
0.1 mA
5.14 V
Vout
(100 mV/div)
5.1 V
Vout
(50 mV/div)
1000
Iout, OUTPUT CURRENT (mA)
Figure 12. Current Limit vs. Temperature
14.2 V
100
5V
4.97 V
4.82 V
TIME (100 ms/div)
TIME (20 ms/div)
Figure 14. Line Transients
(5 V option)
Figure 15. Load Transients
(5 V option)
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NCV8668
TYPICAL CHARACTERISTICS
100
TJ = 25°C
VEN = Vin
Rout = 5 kW
TJ = 25°C
Vin = 13.2 V ±0.5 Vpp
Cout = 2.2 mF
Iout = 0.1 mA
90
80
70
PSRR (dB)
Vin
(5 V/div)
Vout
(5 V/div)
60
50
40
30
20
10
VRO
(5 V/div)
0
10
100
TIME (100 ms/div)
Figure 16. Power Up/Down Response
(5 V option)
5000
4000
IDIS, DISABLE CURRENT (mA)
NOISE DENSITY (nV/√Hz)
100000
4
TJ = 25°C
Vin = 13.2 V
Cout = 2.2 mF
Iout = 150 mA
3000
2000
1000
0
10
1000
100
10000
Vin = 13.2 V
VEN = 0 V
3
2
1
0
−40 −20
100000
0
20
40
60
80
100 120
140 160
TJ, JUNCTION TEMPERATURE (°C)
f, FREQUENCY (Hz)
Figure 18. Noise vs. Frequency
(5 V option)
Figure 19. Disable Current vs Temperature
4
50
IEN, ENABLE CURRENT (mA)
VEN = 0 V
IDIS, DISABLE CURRENT (mA)
10000
Figure 17. PSRR vs. Frequency
(5 V option)
6000
3
150°C
2
125°C
1
85°C
0
1000
f, FREQUENCY (Hz)
0
5
10
15
20
25
30
35
40
25°C
30
−40°C
20
10
0
40
150°C
Vin = 13.2 V
0
Vin, INPUT VOLTAGE (V)
5
10
15
20
25
30
35
VEN, ENABLE VOLTAGE (V)
Figure 20. Disable Current vs. Input Voltage
Figure 21. Enable Current vs. Enable Voltage
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9
40
NCV8668
TYPICAL CHARACTERISTICS
18
Vin = 13.2 V
tRD, RESET DELAY TIME (ms)
VRT, RESET THRESHOLD (V)
4.80
4.75
4.70
4.65
4.60
−40 −20
0
20
40
60
80
100 120
140 160
Vin = 13.2 V
Reset Mode = FAST
17
16
15
14
−40 −20
TJ, JUNCTION TEMPERATURE (°C)
0
20
40
60
80
100 120
140 160
TJ, JUNCTION TEMPERATURE (°C)
Figure 22. Reset Threshold vs Temperature
(5 V option)
Figure 23. Reset Delay Time vs Temperature
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10
NCV8668
TYPICAL CHARACTERISTICS
Vin
t
Vout
< tRR
VRT+ VRhys
VRT
t
VRO
tRR
tRD
VROH
VROL
t
Figure 24. Reset Function and Timing Diagram
Trigger
Reset &
Disabled
Watchdog
Long
Open
Window
No Trigger
Reset
Trigger
WD_ON
WD_ON
No Trigger
WD_OFF or
Iout < Iout_WD_OFF
WD_OFF or
Iout < Iout_WD_OFF
WD_ON or
Iout > Iout_WD_ON
Ignore
Window
WD_OFF or
Iout < Iout_WD_OFF
Trigger
Disabled
Watchdog
WD_OFF or
Iout < Iout_WD_OFF
WD_OFF or
Iout < Iout_WD_OFF
No Trigger
Open
Window
Closed
Window
Trigger
WM1
L
L
H
H
WM2
L
H
L
H
Window Watchdog Mode
FAST
SLOW
FAST
OFF
Reset Mode
FAST
SLOW
SLOW
SLOW
Figure 25. Window Watchdog State Diagram, Watchdog and Reset Modes
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NCV8668
TYPICAL CHARACTERISTICS
Vin
t
Vout
VRT+V Rhys
VRT
t
Iout
Iout_WD_OFF
VRO
t RD
t RD
Iout_WD_ON
t RD
t
t RD
t RR
VROH
VROL
WINDOW
IW
VWDI
t OW
t IW tmax=4xt OW t CW
1st
LONG
OW
CW OW
Don‘t Care
during IW
OW
t
t WD
IW
1st
LONG
OW
CW
Missing Pulse
during OW
IW
1st
LONG
OW
Pulse
during CW
CW
IW
1st
LONG
OW
Current Controled
WD −Turn off
CW OW
IW
t
Normal
Operation
t
Figure 26. Window Watchdog Signal Diagram
Closed window
Open window
Watchdog
trigger signal
Open window
WDI
Valid
WDI
WDI
Not valid
WDI
t ECW
Closed window
t EOW
Watchdog decoder sample point
Figure 27. Valid WDI trigger signal
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12
NCV8668
DEFINITIONS
General
Current Limit and Short Circuit Current Limit
All measurements are performed using short pulse low duty
cycle techniques to maintain junction temperature as close
as possible to ambient temperature.
Current Limit is value of output current by which output
voltage drops below 96% of its nominal value. Short Circuit
Current Limit is output current value measured with output
of the regulator shorted to ground.
Output Voltage
PSRR
The output voltage parameter is defined for specific
temperature, input voltage and output current values or
specified over Line, Load and Temperature ranges.
Power Supply Rejection Ratio is defined as ratio of output
voltage and input voltage ripple. It is measured in decibels
(dB).
Line Regulation
The change in output voltage for a change in input voltage
measured for specific output current over operating ambient
temperature range.
Line Transient Response
Load Regulation
Load Transient Response
The change in output voltage for a change in output current
measured for specific input voltage over operating ambient
temperature range.
Typical output voltage overshoot and undershoot response
when the output current is excited with a given slope
between low−load and high−load conditions.
Dropout Voltage
Thermal Protection
The input to output differential at which the regulator output
no longer maintains regulation against further reductions in
input voltage. It is measured when the output drops 100 mV
below its nominal value. The junction temperature, load
current, and minimum input supply requirements affect the
dropout level.
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated at typically 175°C,
the regulator turns off. This feature is provided to prevent
failures from accidental overheating.
Quiescent Currents
The power dissipation level is maximum allowed power
dissipation for particular package or power dissipation at
which the junction temperature reaches its maximum
operating value, whichever is lower.
Typical output voltage overshoot and undershoot response
when the input voltage is excited with a given slope.
Maximum Package Power Dissipation
Quiescent Current (Iq) is the difference between the input
current (measured through the LDO input pin) and the
output current.
APPLICATIONS INFORMATION
decoupling value is 2.2 mF and can be augmented to fulfill
stringent load transient requirements. The regulator works
with ceramic chip capacitors as well as tantalum devices.
Larger values improve noise rejection and load regulation
transient response.
The NCV8668 regulator is self−protected with internal
thermal shutdown and internal current limit. Typical
characteristics are shown in Figures 4 to 27.
Input Decoupling (Cin)
A ceramic or tantalum 0.1 mF capacitor is recommended
and should be connected close to the NCV8668 package.
Higher capacitance and lower ESR will improve the overall
line and load transient response.
If extremely fast input voltage transients are expected then
appropriate input filter must be used in order to decrease
rising and/or falling edges below 50 V/ms for proper
operation. The filter can be composed of several capacitors
in parallel.
Enable Operation
The Enable pin will turn the regulator on or off. The
threshold limits are covered in the electrical characteristics
table in this data sheet.
Reset Operation
A reset signal is provided on the Reset Output (RO) pin to
provide feedback to the microprocessor of an out of
regulation condition. The timing diagram of reset function
is shown in Figure 24. This is in the form of a logic signal on
RO. Output voltage conditions below the RESET threshold
cause RO to go low. The RO integrity is maintained down
to VOUT = 1.0 V. The Reset Output (RO) circuitry includes
Output Decoupling (Cout)
The NCV8668 is a stable component and does not require
a minimum Equivalent Series Resistance (ESR) for the
output capacitor. Stability region of ESR versus Output
Current is shown in Figure 13. The minimum output
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NCV8668
affect the rate of junction temperature rise for the part. When
the NCV8668 has good thermal conductivity through the
PCB, the junction temperature will be relatively low with
high power applications. The maximum dissipation the
NCV8668 can handle is given by:
a pull−up resistor (30 kW) internally connected to the output
(VOUT). No external pull−up is necessary.
For voltage option 3.3 V RO is open drain output and
external pull−up resistor is required.
Reset signal is also generated in case when input voltage
decreases below its minimum operating limit (4.5 V). The
Input Voltage Reset Threshold is typically 3.8 V. This
applies only to voltage options with nominal value below
minimum operating input voltage (3.3 V).
P D(MAX) +
ƪTJ(MAX) * TAƫ
(eq. 1)
R qJA
Since TJ is not recommended to exceed 150°C, then the
NCV8668 soldered on 645 mm2, 1 oz copper area, FR4 can
dissipate up to 1.3 W for SOIC−14 package when the
ambient temperature (TA) is 25°C. See Figure 28 for RqJA
versus PCB area. The power dissipated by the NCV8668 can
be calculated from the following equations:
Window Watchdog Operation
The watchdog slow, fast or off state is set by pins WM1
and WM2 (see table in Figure 25). The timing values used
in this description refer to typ. Values when WM1 and WM2
are connected to GND (fast watchdog and reset timing). The
state diagram of the window watchdog (WWD) and the
watchdog and reset mode selection table is shown in
Figure 25. The WWD timing is shown in Figure 26. After
power−on, the reset output signal at the RO pin
(microprocessor reset) is kept LOW for the reset delay time
tRD (16 ms). RO signal transition from LOW to HIGH
triggers the ignore window (IW) with duration of tIW
(32 ms). During this window the signal at the WDI pin is
ignored. When IW ends a long open window with maximum
duration of (128 ms, tmax = 4xtOW) is started. When a valid
trigger signal is detected during long open window, a closed
window (CW) with duration of tCW (32 ms) is initialized
immediately. WDI signal transition from HIGH to LOW is
taken as a trigger. As valid trigger two HIGH samples
followed by two LOW samples (with sampling time tsam =
0.5 ms) have to be present before end of the long window.
Valid WDI trigger signal is shown in Figure 27. When CW
ends a standard open window (OW) with maximum duration
of tOW (32 ms) is initiated immediately. The OW ends
immediately when valid trigger appears at WDI input. For
normal operation the microprocessor timing of WDI pulses
must be stable and correspond to tWD. A reset signal is
generated (RO goes LOW) if there is no valid trigger
(missing pulse at WDI pin) during OW or if a pre−trigger
occurs during the CW (unexpected pulse at WDI pin).
P D + V inǒI [email protected] outǓ ) I outǒV in * V outǓ
(eq. 2)
or
V in(MAX) +
P D(MAX) ) ǒV out
I outǓ
(eq. 3)
I out ) I q
RqJA, THERMAL RESISTANCE (°C/W)
140
SOIC−14
130
120
110
100
PCB 1 oz Cu
90
PCB 2 oz Cu
80
0
100
200
300
400
500
600
700
COPPER HEAT SPREADER AREA (mm2)
Figure 28. Thermal Resistance vs PCB Copper Area
Hints
Thermal Considerations
Vin and GND printed circuit board traces should be as
wide as possible. When the impedance of these traces is
high, there is a chance to pick up noise or cause the regulator
to malfunction. Place external components, especially the
output capacitor, as close as possible to the NCV8668, and
make traces as short as possible.
As power in the NCV8668 increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient temperature
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14
NCV8668
ORDERING INFORMATION
Device
Vout
tRD
Fast/
Slow
IW/OW/CW
Time Fast/
Slow
1st LOW
Time Fast/
Slow
VRT
Output
Current
WW ON/
OFF
Marking
Package
Shipping†
NCV8668ABD250R2G
5.0 V
16 /
32 ms
32 / 64 ms
128 /
256 ms
93%
Yes
V8668AB50G
SOIC−14
(Pb−Free)
2500 / Tape &
Reel
NCV8668ABD150R2G
5.0 V
16 /
32 ms
32 / 64 ms
128 /
256 ms
93%
Yes
668AB5
SOIC−8
(Pb−Free)
2500 / Tape &
Reel
NCV8668ABPD50R2G
5.0 V
16 /
32 ms
32 / 64 ms
128 /
256 ms
93%
Yes
668AB5
SOIC−8
EPAD
(Pb−Free)
2500 / Tape &
Reel
NCV8668ABPD33R2G
3.3 V
16 /
32 ms
32 / 64 ms
128 /
256 ms
93%
Yes
668AB3
SOIC−8
EPAD
(Pb−Free)
2500 / Tape &
Reel
NCV8668ABD133R2G
3.3 V
16 /
32 ms
32 / 64 ms
128 /
256 ms
93%
Yes
668AB3
SOIC−8
(Pb−Free)
2500 / Tape &
Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NOTE: Contact factory for other package, output voltage, timing and reset threshold options
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15
NCV8668
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AJ
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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16
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
NCV8668
PACKAGE DIMENSIONS
SOIC−8 EP
CASE 751AC−01
ISSUE B
2X
D
E1
2X
0.10 C D
EXPOSED
PAD
5
ÉÉÉ
ÉÉÉ
PIN ONE
LOCATION
DETAIL A
D
A
8
1
5
F
8
G
E
h
2X
4
4
0.20 C
e
1
BOTTOM VIEW
8X b
0.25 C A-B D
B
A
0.10 C
A2
8X
b1
GAUGE
PLANE
0.10 C
SEATING
PLANE
SIDE VIEW
A1
ÇÇ
ÉÉ
ÉÉ
ÇÇ
ÉÉ
ÇÇ
ÉÉ
c
H
A
A
END VIEW
TOP VIEW
C
NOTES:
1. DIMENSIONS AND TOLERANCING PER
ASME Y14.5M, 1994.
2. DIMENSIONS IN MILLIMETERS (ANGLES
IN DEGREES).
3. DIMENSION b DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE
0.08 MM TOTAL IN EXCESS OF THE “b”
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
4. DATUMS A AND B TO BE DETERMINED
AT DATUM PLANE H.
0.10 C A-B
L
0.25
(L1)
DETAIL A
q
c1
(b)
SECTION A−A
SOLDERING FOOTPRINT*
2.72
0.107
1.52
0.060
7.0
0.275
Exposed
Pad
4.0
0.155
2.03
0.08
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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17
DIM
A
A1
A2
b
b1
c
c1
D
E
E1
e
L
L1
F
G
h
q
MILLIMETERS
MIN
MAX
1.35
1.75
0.00
0.10
1.35
1.65
0.31
0.51
0.28
0.48
0.17
0.25
0.17
0.23
4.90 BSC
6.00 BSC
3.90 BSC
1.27 BSC
0.40
1.27
1.04 REF
2.24
3.20
1.55
2.51
0.25
0.50
0_
8_
NCV8668
PACKAGE DIMENSIONS
SOIC−14
CASE 751A−03
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
−A−
14
8
−B−
P 7 PL
0.25 (0.010)
M
7
1
G
−T−
D 14 PL
0.25 (0.010)
T B
S
A
DIM
A
B
C
D
F
G
J
K
M
P
R
J
M
K
M
F
R X 45 _
C
SEATING
PLANE
B
M
S
SOLDERING FOOTPRINT*
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337 0.344
0.150 0.157
0.054 0.068
0.014 0.019
0.016 0.049
0.050 BSC
0.008 0.009
0.004 0.009
0_
7_
0.228 0.244
0.010 0.019
7X
7.04
14X
1.52
1
14X
0.58
1.27
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
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Phone: 81−3−5773−3850
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18
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCV8668/D