TC664 DATA SHEET (02/05/2013) DOWNLOAD

TC664/TC665
SMBus™ PWM Fan Speed Controllers With
Fan Fault Detection
Features
Description
• Temperature Proportional Fan Speed for Reduced
Acoustic Noise and Longer Fan Life
• FanSense™ Protects against Fan Failure and
Eliminates the Need for 3-wire Fans
• Over Temperature Detection (TC665)
• Efficient PWM Fan Drive
• Provides RPM Data
• 2-Wire SMBus™-Compatible Interface
• Supports Any Fan Voltage
• Software Controlled Shutdown Mode for "Green"
Systems
• Supports Low Cost NTC/PTC Thermistors
• Space Saving 10-Pin MSOP Package
• Temperature Range: -40°C to +85ºC
The TC664/TC665 devices are PWM mode fan speed
controllers with FanSense technology for use with
brushless DC fans. These devices implement temperature proportional fan speed control which lowers
acoustic fan noise and increases fan life. The voltage
at VIN (Pin 1) represents temperature and is typically
provided by an external thermistor or voltage output
temperature sensor. The PWM output (VOUT) is
adjusted between 30% and 100%, based on the voltage at VIN. The PWM duty cycle can also be programmed via SMBus to allow fan speed control without
the need for an external thermistor. If VIN is not connected, the TC664/TC665 will start driving the fan at a
default duty cycle of 39.33%. See Section 4.3, "Fan
Startup", for more details).
Applications
•
•
•
•
•
•
•
Personal Computers & Servers
LCD Projectors
Datacom & Telecom Equipment
Fan Trays
File Servers
Workstations
General Purpose Fan Speed Control
An over-temperature condition is indicated when the
voltage at VIN exceeds 2.6 V (typical). The TC664/
TC665 devices indicate this by setting OTF(bit 5<X>) in
the Status Register to a '1'. The TC665 device also
pulls the FAULT line low during an over-temperature
condition.
Package Type
10-Pin MSOP
VIN 1
10 VDD
CF 2
TC664
TC665
9
VOUT
8
SENSE
SCLK
3
SDA
4
7
NC
GND
5
6
FAULT
 2002-2013 Microchip Technology Inc.
In normal fan operation, a pulse train is present at the
SENSE pin (Pin 8). The TC664/TC665 use these
pulses to calculate the fan revolutions per minute
(RPM). The fan RPM data is used to detect a worn out,
stalled, open or unconnected fan. An RPM level below
the user-programmable threshold causes the TC664/
TC665 to assert a logic low alert signal (FAULT). The
default threshold value is 500 RPM. Also, if this condition occurs, FF (bit 0<0>) in the Status Register will also
be set to a ‘1’.
The TC664/TC665 devices are available in a 10-Pin
MSOP package and consume 150 µA during operation. The devices can also enter a low-power shutdown
mode (5 µA, typ.) by setting the appropriate bit in the
Configuration Register. The operating temperature
range for these devices is -40°C to +85ºC.
DS21737B-page 1
TC664/TC665
Functional Block Diagram
TC664/TC665
–
VIN
–
VOTF
+
Note
OTF
VDD
+
+
Control
Logic
VOUT
Start-up
Timer
FAULT
–
CF
VMIN
Clock
Generator
Missing
Pulse
Detect

SCLK
SDA
50 k
SENSE
–
Serial Port
Interface
100 mV (typ.)
NC
GND
Note: OTF condition applies for the TC665 device only.
DS21737B-page 2
 2002-2013 Microchip Technology Inc.
TC664/TC665
1.0
ELECTRICAL
CHARACTERISTICS
PIN FUNCTION TABLE
Name
Function
Absolute Maximum Ratings *
VIN
Analog Input
VDD..................................................................................6.5 V
CF
Analog Output
Input Voltages .................................... -0.3 V to (VDD + 0.3 V)
SCLK
Serial Clock Input
Output Voltages .................................. -0.3 V to (VDD + 0.3 V)
SDA
Serial Data In/Out (Open Drain)
Storage temperature .....................................-65°C to +150°C
GND
Ground
Ambient temp. with power applied ................-40°C to +125°C
FAULT
Digital (Open Drain) Output
Maximum Junction Temperature, TJ ............................. 150°C
NC
No Connection
ESD protection on all pins 4 kV
*Notice: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may
affect device reliability.
SENSE
Analog Input
VOUT
Digital Output
VDD
Power Supply Input
ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise noted, all limits are specified for VDD = 3.0 V to 5.5 V, -40°C <TA < +85°C.
Parameters
Sym
Min
Supply Voltage
VDD
3.0
—
5.5
V
Operating Supply Current
IDD
—
150
300
µA
Pins 8, 9 Open
IDDSHDN
—
5
10
µA
Pins 8, 9 Open
VOUT Rise Time
tR
—
—
50
µsec
IOH = 5 mA, Note 1
VOUT Fall Time
tF
—
—
50
µsec
IOL = 1 mA, Note 1
Sink Current at VOUT Output
IOL
1.0
—
—
mA
VOL = 10% of VDD
Source Current at VOUT Output
IOH
5.0
—
—
mA
VOH = 80% of VDD
F
26
30
34
Hz
CF = 1 µF
VIN Input Voltage for 100% PWM duty-cycle
VC(MAX)
2.45
2.6
2.75
V
VC(MAX) - VC(MIN)
VCRANGE
1.25
1.4
1.55
V
—
10M
—

IIN
-1.0
—
+1.0
µA
VTHSENSE
80
100
120
mV
VOL
—
—
0.3
V
tFAULT
—
2.4
—
sec
-15
—
+15
%
RPM > 1600
Note 2
Shutdown Mode Supply Current
Typ
Max
Units
Conditions
VOUT PWM Output
PWM Frequency
VIN Input
VIN Input Resistance
VIN Input Leakage Current
VDD = 5.0 V
SENSE Input
SENSE Input Threshold Voltage with
Respect to GND
FAULT Output
FAULT Output LOW Voltage
FAULT Output Response Time
IOL = 2.5 mA
Fan RPM-to-Digital Output
Fan RPM ERROR
2-Wire Serial Bus Interface
Logic Input High
VIH
2.1
—
—
V
Logic Input Low
VIL
—
—
0.8
V
Logic Output Low
VOL
—
—
0.4
V
IOL = 3 mA
Note 1
Input Capacitance SDA, SCLK
I/O Leakage Current
SDA Output Low Current
CIN
—
10
15
pF
ILEAK
-1.0
—
+1.0
µA
IOLSDA
6
—
—
mA
VOL = 0.6 V
Note 1: Not production tested, ensured by design, tested during characterization.
2: For 5.0 V < VDD  5.5 V, the limit for VIH = 2.2 V.
 2002-2013 Microchip Technology Inc.
DS21737B-page 3
TC664/TC665
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise noted, all parameters apply at VDD = 3.0 V to 5.5 V
Parameters
Symbol
Min
Typ
Max
Units
Conditions
Temperature Ranges:
Specified Temperature Range
TA
-40
—
+85
°C
Operating Temperature Range
TA
-40
—
+125
°C
Storage Temperature Range
TA
-65
—
+150
°C
JA
—
113
—
°C/W
Thermal Package Resistances:
Thermal Resistance, 10 Pin MSOP
TIMING SPECIFICATIONS
Electrical Characteristics: Unless otherwise noted, all limits are specified for VDD = 3.0 V to 5.5 V,
-40°C <TA < +85°C
Parameters
Sym
Min
Typ
Max
Units
Conditions
SMBus Interface (See Figure 1-1)
Serial Port Frequency
fSC
0
—
100
Low Clock Period
tLOW
4.7
—
—
µsec Note 1
High Clock Period
tHIGH
4.7
—
—
µsec Note 1
tR
—
—
1000
nsec Note 1
SCLK and SDA Rise Time
SCLK and SDA Fall Time
Start Condition Setup Time
kHz
Note 1
tF
—
—
300
nsec Note 1
tSU(START)
4.7
—
—
µsec Note 1
SCLK Clock Period Time
tSC
10
—
—
µsec Note 1
Start Condition Hold Time
tH(START)
4.0
—
—
µsec Note 1
Data in SetupTime to SCLK
High
tSU-DATA
250
—
—
nsec Note 1
Data in Hold Time after SCLK
Low
tH-DATA
300
—
—
nsec Note 1
Stop Condition Setup Time
tSU(STOP)
4.0
—
—
µsec Note 1
Bus Free Time Prior to New
Transition
tIDLE
4.7
—
µsec Note 1 and Note 2
Note 1: Not production tested, ensured by design, tested during characterization.
2: Time the bus must be free before a new transmission can start.
DS21737B-page 4
 2002-2013 Microchip Technology Inc.
TC664/TC665
SMBus Write Timing Diagram
A
B
tLOW tHIGH
C
D
E F
G
H
I
J
K
M
L
SCLK
SDA
tSU(START) tH(START)
tSU-DATA
tH-DATA
tSU(STOP)tIDLE
F = Acknowledge Bit Clocked into Master
G = MSB of Data Clocked into Slave
H = LSB of Data Clocked into Slave
I = Slave Pulls SDA Line Low
A = Start Condition
B = MSB of Address Clocked into Slave
C = LSB of Address Clocked into Slave
D = R/W Bit Clocked into Slave
E = Slave Pulls SDA Line Low
J = Acknowledge Clocked into Master
K = Acknowledge Clock Pulse
L = Stop Condition, Data Executed by Slave
M = New Start Condition
SMBus Read Timing Diagram
A
B
tLOW tHIGH
C
D
E F
G
H
I
J
K
SCLK
SDA
tSU(START) tH(START)
tSU-DATA
tSU(STOP)
A = Start Condition
E = Slave Pulls SDA Line Low
I = Acknowledge Clock Pulse
B = MSB of Address Clocked into Slave
F = Acknowledge Bit Clocked into Master
J = Stop Condition
C = LSB of Address Clocked into Slave
G = MSB of Data Clocked into Master
K = New Start Condition
D = R/W Bit Clocked into Slave
H = LSB of Data Clocked into Master
FIGURE 1-1:
tIDLE
Bus Timing Data.
 2002-2013 Microchip Technology Inc.
DS21737B-page 5
TC664/TC665
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
14
180
Pins 8 and 9 Open
175
VOL = 0.1VDD
VDD = 5.5 V
VDD = 3.0 V
IDD (µA)
165
160
155
150
145
140
Sink Current (mA)
12
170
VDD = 5.5 V
10
8
VDD = 5.0 V
6
VDD = 4.0 V
4
135
VDD = 3.0 V
2
130
-40
-25
-10
5
20
35
50
65
80
95
-40
110 125
-25
-10
5
Temperature (°C)
IDD vs. Temperature.
FIGURE 2-4:
Temperature.
9.000
50
8.000
45
35
50
65
80
95
110 125
PWM, Sink Current vs.
IOL = 2.5 mA
VDD = 3.0 V
7.000
Fault VOL (mV)
Shutdown I DD (µA)
FIGURE 2-1:
20
Temperature (°C)
VDD = 5.5 V
6.000
5.000
4.000
VDD = 3.0 V
3.000
40
35
30
VDD = 5.0 V
25
VDD = 5.5 V
VDD = 4.0 V
20
2.000
1.000
15
-40 -25 -10
5
20
35
50
65
80
95
110 125
-40
-25
-10
5
Temperature (ºC)
FIGURE 2-2:
Temperature.
20
35
50
65
80
95
110 125
Temperature (ºC)
IDD Shutdown vs.
Fault VOL vs. Temperature.
FIGURE 2-5:
32
CF = 1.0 µF
Source Current (mA)
VOH = 0.8VDD
30
VDD = 5.5 V
25
20
VDD = 5.0 V
VDD = 4.0 V
15
VDD = 3.0 V
10
5
PWM Frequency (Hz)
35
31
VDD = 5.5 V
30
VDD = 3.0 V
29
28
27
-40
-25
-10
5
20
35
50
65
80
95
110 125
-40
-25
Temperature (°C)
FIGURE 2-3:
Temperature.
DS21737B-page 6
PWM, Source Current vs.
-10
5
20
35
50
65
80
95
110 125
Temperature (ºC)
FIGURE 2-6:
Temperature.
PWM Frequency vs.
 2002-2013 Microchip Technology Inc.
TC664/TC665
50
10
VOL = 0.4 V
8
40
VDD = 5.5 V
VDD = 5.0 V
35
30
RPM Error (%)
SDA IOL (mA)
CF = 1.0 uF
9
45
6
5
VDD = 3.0 V
4
3
2
VDD = 4.0 V
25
7
VDD = 5.0 V
1
VDD = 3.0 V
20
VDD = 5.5 V
0
-40
-25
-10
5
20
35
50
65
80
95
110 125
-40
-25
-10
5
20
FIGURE 2-7:
SDA IOL vs. Temperature.
FIGURE 2-10:
Temperature.
2.620
2.605
2.600
VDD = 5.0 V
2.595
2.590
VDD = 4.0 V
2.585
2.580
VDD = 3.0 V
VTHSENSE Hysteresis (mV)
2.610
VCMax (V)
50
65
80
95
110 125
95
110 125
RPM %error vs.
45
VDD = 5.5 V
2.615
2.575
40
35
VDD = 3.0V
30
VDD = 5.5V
25
20
-40 -25 -10
5
20
35
50
65
80
95
110 125
-40
-25
-10
5
Temperature (ºC)
FIGURE 2-8:
VCMAX vs. Temperature.
1.195
VDD = 5.5 V
VDD = 5.0 V
1.190
VDD = 4.0 V
1.185
1.180
-40 -25 -10
5
20
35
50
65
80
95
110 125
VCMIN vs. Temperature.
 2002-2013 Microchip Technology Inc.
50
65
80
150
140
130
VDD = 3.0 V
120
VDD = 5.0 V
110
100
90
80
-40
-25
-10
Temperature (ºC)
FIGURE 2-9:
35
FIGURE 2-11:
Sense Threshold
(VTHSENSE) Hysteresis vs. Temperature.
SDA & SCLK Hysteresis (mV)
VDD = 3.0 V
1.200
20
Temperature (ºC)
1.205
VCMIN (V)
35
Temperature (ºC)
Temperature (ºC)
5
20
35
50
65
80
95
110 125
Temperature (ºC)
FIGURE 2-12:
Temperature.
SDA, SCLK Hysteresis vs.
DS21737B-page 7
TC664/TC665
3.0
PIN FUNCTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
Name
Function
3.6
Analog Input (SENSE)
Fan current pulses are detected at this pin. These
pulses are counted and used in the calculation of the
fan RPM.
3.7
Digital Output (VOUT)
VIN
Analog Input
CF
Analog Output
This active high complimentary output drives the base
of an external transistor or the gate of a MOSFET.
SCLK
Serial Clock Input
3.8
SDA
Serial Data In/Out (Open Drain)
GND
Ground
FAULT
Digital (Open Drain) Output
NC
No Connection
SENSE
Analog Input
VOUT
Digital Output
VDD
Power Supply Input
3.1
Power Supply Input (VDD)
The VDD pin with respect to GND provides power to the
device. This bias supply voltage may be independent of
the fan power supply.
Analog Input (VIN)
A voltage range of 1.62 V to 2.6 V (typical) on this pin
drives an active duty-cycle of 30% to 100% on the
VOUT pin.
3.2
Analog Output (CF)
Positive terminal for the PWM ramp generator timing
capacitor. The recommended CF is 1 µF for 30 Hz
PWM operation.
3.3
SMBus Serial Clock Input (SCLK)
Clocks data into and out of the TC664/TC665. See
Section 5.0 for more information on the serial interface.
3.4
Serial Data (Bi-directional) (SDA)
Serial data is transferred on the SMBus in both directions using this pin. See Section 5.0 for more information on the serial interface.
3.5
Digital (Open Drain) Output
(FAULT)
When the fan’s RPM falls below the user-set RPM
threshold (or OTF occurs with TC665), a logic low
signal is asserted.
DS21737B-page 8
 2002-2013 Microchip Technology Inc.
TC664/TC665
4.0
DEVICE OPERATION
can be set to provide a predictive fan failure feature.
This feature can be used to give a system warning and,
in many cases, help to avoid a system thermal shutdown condition. The fan RPM data and threshold registers are available over the SMBus interface which
allows for complete system control.
The TC664/TC665 devices allow you to control, monitor and communicate (via SMBus) fan speed for 2-wire
and 3-wire DC brushless fans. By pulse width modulating (PWM) the voltage across the fan, the TC664/
TC665 controls fan speed according to the system temperature.The goal of temperature proportional fan
speed control is to reduce fan power consumption,
increase fan life and reduce system acoustic noise.
With the TC664/TC665 devices, fan speed can be controlled by the analog input VIN or the SMBus interface,
allowing for high system flexibility.
The TC664/TC665 devices are identical in every
aspect except for how they indicate an over-temperature condition. When VIN voltage exceeds 2.6 V (typical), both devices will set OTF (bit 5<X>) in the Status
Register to a '1'. The TC665 will additionally pull the
FAULT output low during an over-temperature
condition.
The TC664/TC665 devices also measure and monitor
fan revolutions per minute (RPM). A fan’s speed (RPM)
is a measure of its health. As a fan’s bearings wear out,
the fan slows down and eventually stops (locked rotor).
By monitoring the fan’s RPM level, the TC664/TC665
devices can detect open, shorted, unconnected and
locked rotor fan conditions. The fan speed threshold
+5 V
+12 V
C2
1 µF
R1
FAN
NTC Thermistor
100 k @ 25°C
34.8 k
10
1
C1
0.01 µF
R2
VIN
VDD
VOUT
715 
14.7 k
2
CF
CF
SENSE
8
1.0 µF
RSCLK +5 V
20 k
CSENSE
0.1 µF
TC664
TC665
NC
RSENSE
7
3
SCLK
+5 V
PIC®
Microcontroller
RISO
9
+5 V
RFAULT
4
FAULT
SDA
RSDA
6
20 k
GND
5
20 k
Note: Refer to Table 7-1 for RSENSE value.
FIGURE 4-1:
Typical Application Circuit.
 2002-2013 Microchip Technology Inc.
DS21737B-page 9
TC664/TC665
4.1
Fan Speed Control Methods
T
The speed of a DC brushless fan is proportional to the
voltage across it. For example, if a fan’s rating is
5000 RPM at 12 V, it’s speed would be 2500 RPM at
6 V. This, of course, will not be exact, but should be
close.
There are two main methods for fan speed control. The
first is pulse width modulation (PWM) and the second
is linear. Using either method the total system power
requirement to run the fan is equal. The difference
between the two methods is where the power is consumed.
The following example compares the two methods for
a 12 V, 120 mA fan running at 50% speed. With 6 V
applied across the fan, the fan draws an average current of 68 mA. Using a linear control method, there is
6V across the fan and 6V across the drive element.
With 6 V and 68 mA, the drive element is dissipating
410 mW of power. Using the PWM approach, the fan is
modulated at a 50% duty cycle, with most of the 12 V
being dropped across the fan. With 50% duty cycle, the
fan draws an RMS current of 110 mA and an average
current of 72 mA. Using a MOSFET with a 1  RDS(on)
(a fairly typical value for this low current) the power dissipation in the drive element would be: 12 mW (Irms2 *
RDS(on)). Using a standard 2N2222A NPN transistor
(assuming a Vce-sat of 0.8 V), the power dissipation
would be 58 mW (Iavg* Vce-sat).
The PWM approach to fan speed control causes much
less power dissipation in the drive element. This allows
smaller devices to be used and will not require any special heatsinking to get rid of the power being dissipated
in the package.
The other advantage to the PWM approach is that the
voltage being applied to the fan is always near 12 V.
This eliminates any concern about not supplying a high
enough voltage to run the internal fan components
which is very relevant in linear fan speed control.
4.2
PWM Fan Speed Control
The TC664/TC665 devices implement PWM fan speed
control by varying the duty cycle of a fixed frequency
pulse train. The duty cycle of a waveform is the on time
divided by the total period of the pulse. For example,
given a 100 Hz waveform (10 msec.) with an on time of
5.0 msec., the duty cycle of this waveform is 50%
(5.0 msec./10.0 msec.). An example of this is shown in
Figure 4-2.
DS21737B-page 10
Ton
Toff
D = Duty Cycle
D = Ton / T
FIGURE 4-2:
Waveform.
T = Period
T = 1/F
F = Frequency
Duty Cycle Of A PWM
The TC664/TC665 devices generate a pulse train with
a typical frequency of 30 Hz (CF = 1 µF). The duty cycle
can be varied from 30% to 100%. The pulse train generated by the TC664/TC665 devices drives the gate of
an external N-channel MOSFET or the base of an NPN
transistor (Figure 4-3). See Section 7.5 for more information on output drive device selection.
12 V
FAN
VDD
D
TC664 VOUT
TC665
G
Qdrive
S
GND
FIGURE 4-3:
PWM Fan Drive.
By modulating the voltage applied to the gate of the
MOSFET Qdrive, the voltage applied to the fan is also
modulated. When the VOUT pulse is high, the gate of
the MOSFET is turned on, pulling the voltage at the
drain of Qdrive to zero volts. This places the full 12 V
across the fan for the Ton period of the pulse. When the
duty cycle of the drive pulse is 100% (full on, Ton = T),
the fan will run at full speed. As the duty cycle is
decreased (pulse on time “Ton” is lowered), the fan will
slow down proportionally. With the TC664/TC665
devices, the duty cycle can be controlled through the
analog input pin (VIN), or through the SMBus interface,
by using the Duty-Cycle Register. See Section 4.5 for
more details on duty cycle control.
 2002-2013 Microchip Technology Inc.
TC664/TC665
4.3
Fan Startup
Often overlooked in fan speed control is the actual
startup control period. When starting a fan from a nonoperating condition (fan speed is zero RPM), the
desired PWM duty cycle or average fan voltage can not
be applied immediately. Since the fan is at a rest position, the fan’s inertia must be overcome to get it started.
The best way to accomplish this is to apply the full rated
voltage to the fan for one second. This will ensure that
in all operating environments, the fan will start and
operate properly.
4.5
Power Up or Release
from SHDN
Duty Cycle Control (VIN and DutyCycle Register)
The duty cycle of the VOUT PWM drive signal can be
controlled by either the VIN analog input pin or by the
Duty-Cycle Register, which is accessible via the
SMBus interface. The control method is selectable via
DUTYC (bit 5<0>) of the Configuration Register. The
default state is for VIN control. If VIN control is selected
and the VIN pin is open, the PWM duty cycle will default
to 39.33%. The duty cycle control method can be
changed at any time via the SMBus interface.
VIN is an analog input pin. A voltage in the range of
1.62 V to 2.6 V (typical) at this pin commands a 30% to
100% duty cycle on the VOUT output, respectively. If the
voltage at VIN falls below the 1.62 V level, the duty
cycle will not go below 30%. The relationship between
the voltage at VIN and the PWM duty cycle is shown in
Figure 4-5.
100
90
80
Duty Cycle (%)
The TC664/TC665 devices implement this fan control
feature without any user programming. During a power
up or release from shutdown condition, the TC664/
TC665 devices force the VOUT output to a 100% duty
cycle, turning the fan full on for one second (CF =
1.0 µF). Once the one second period is over, the
TC664/TC665 devices will look to see if SMBus or VIN
control has been selected in the Configuration Register
(DUTYC bit 5<0>). Based on this register, the device
will choose which input will control the VOUT duty cycle.
Duty cycle control based on VIN is the default state. If
VIN control is selected and the VIN pin is open (nothing
is connected to the VIN pin), then the TC664/TC665 will
default to a duty cycle of 39.33%. This sequence is
shown in Figure 4-4. This integrated one second
startup feature will ensure the fan starts up every time.
linear. If a frequency of 15 Hz is desired, a capacitor
value of 2.0 µF should be used. The frequency should
be kept in the range of 15 Hz to 35 Hz. See Section 7.2
for more details.
70
60
50
40
30
20
One Second Pulse
10
0
1
Select SMBus
NO
Default PWM: 39.33%
YES
YES
SMBus PWM Duty
Cycle Control
VIN Open?
NO
VIN PWM Duty
Cycle Control
FIGURE 4-4:
4.4
Power-up Flow Chart.
PWM Drive Frequency (CF)
As previously discussed, the TC664/TC665 devices
operate with a fixed PWM frequency. The frequency of
the PWM drive output (VOUT) is set by a capacitor at the
CF pin. With a 1 µF capacitor at the CF pin, the typical
drive frequency is 30 Hz. This frequency can be raised,
by decreasing the capacitor value, or lowered, by
increasing the capacitor value. The relationship
between the capacitor value and the PWM frequency is
 2002-2013 Microchip Technology Inc.
1.2
1.4
1.6
1.8
2
2.2
2.4
2.6
2.8
Input Voltage (VIN)
FIGURE 4-5:
PWM Duty Cycle vs. Input
Voltage, VIN (Typical).
For the TC665 device, if the voltage at VIN exceeds the
2.6 V (typical) level, an over temperature fault indication will be given by asserting a low at the FAULT output
and setting OTF (bit 5<X>) in the Status Register to a
‘1’.
A thermistor network or any other voltage output thermal sensor can be used to provide the voltage to the
VIN input. The voltage supplied to the VIN pin can actually be thought of as a temperature. For example, the
circuit shown in Figure 4-6 represents a typical solution
for a thermistor based temperature sensing network.
See Section 7.3 for more details.
DS21737B-page 11
TC664/TC665
This method of control allows for more sophisticated
algorithms to be implemented by utilizing microcontrollers or microprocessors in the system. In this way,
multiple system temperatures can be taken into
account for determining the necessary fan speed.
+5 V
NTC Thermistor
100 k @ 25°C
R1
34.8 k
VIN
C1
0.01 µF
R2
14.7 k
GND
FIGURE 4-6:
Network.
TC664
TC665
NTC Thermistor Sensor
The second method for controlling the duty cycle of the
PWM output (VOUT) is via the SMBus interface. In order
to control the PWM duty cycle via the SMBus, DUTYC
(bit 5<0>) of the Configuration Register (Register 6.3)
must be set to a ‘1’. This tells the TC664/TC665 device
that the duty cycle should be controlled by the Duty
Cycle Register. Next, the Duty Cycle Register must be
programmed to the desired value. The Duty Cycle Register is a 4 Bit read/write register that allows duty cycles
from 30% to 100% to be programmed. Table 4-1 shows
the binary codes for each possible duty cycle.
TABLE 4-1:
DUTY-CYCLE REGISTER
(DUTY-CYCLE) 4-BITS,
READ/WRITE
Duty-Cycle Register (Duty Cycle)
D(3)
D(2)
D(1)
D(0)
0
0
0
0
30%
0
0
0
1
34.67%
0
0
1
0
39.33% (default for VIN
open and when SMBus
is not selected)
0
0
1
1
44%
0
1
0
0
48.67%
0
1
0
1
53.33%
0
1
1
0
58%
0
1
1
1
62.67%
1
0
0
0
67.33%
1
0
0
1
72%
1
0
1
0
76.67%
1
0
1
1
81.33%
1
1
0
0
86%
1
1
0
1
90.67%
1
1
1
0
95.33%
1
1
1
1
100%
DS21737B-page 12
Duty-Cycle
As shown in Table 4-1, the duty cycle has more of a
step function look than did the VIN control approach.
Because the step changes in duty cycle are small, they
are rarely audibly noticeable, especially when the fans
are integrated into the system.
4.6
PWM Output (VOUT)
The VOUT pin is designed to drive a low cost NPN transistor or N-channel MOSFET as the low side switching
element in the system, as is shown in Figure 4-7. The
switching element is used to turn the fan on and off at
the PWM duty cycle commanded by the VOUT output
This output has complementary drive (pull up and pull
down) and is optimized for driving NPN transistors or
N-channel MOSFETs (see typical characteristic curves
for sink and source current capability of the VOUT drive
stage).
The external device needs to be chosen to fit the voltage and current rating of the fan in a particular application (Refer to Section 7.5 Output Drive Device
Selection). NPN transistors are often a good choice for
low current fans. If a NPN transistor is chosen, a base
current limiting resistor should be used. When using a
MOSFET as the switching element, it is sometimes a
good idea to have a gate resistor to help slow down the
turn on and turn off of the MOSFET. As with any switching waveform, fast rising and falling edges can
sometimes lead to noise problems.
As previously stated, the VOUT output will go to 100%
duty cycle during power up and release from shutdown
conditions. The VOUT output only shuts down when
commanded to do so via the Configuration Register
(SDM (bit 0<0>)). Even when a locked rotor condition
is detected, the VOUT output will continue to pulse at
the programmed duty cycle.
4.7
Sensing Fan Operation (SENSE)
The TC664/TC665 devices also feature Microchip’s
proprietary FanSense technology. During normal fan
operation, commutation occurs as each pole of the fan
is energized. The fan current pulses created by the fan
commutation are sensed using a low value current
sense resistor in the ground return leg of the fan circuit.
The voltage pulses across the sense resistor are then
AC coupled through a capacitor to the SENSE pin of
the TC664/TC665 device. These pulses are utilized for
calculating the RPM of the fan. The threshold voltage
for the SENSE pin is 100 mV (typical). The peak of the
voltage pulse at the SENSE pin must exceed the
100 mV (typical) threshold in order for the pulse to be
counted in the fan RPM measurement.
 2002-2013 Microchip Technology Inc.
TC664/TC665
See Section 7.4 for more details on selecting the
appropriate current sense resistor and coupling
capacitor values.
4.8
Fan Fault Threshold and
Indication (FAULT)
For the TC664/TC665 devices, a fault condition exists
whenever a fan’s sensed RPM level falls below the
user programmable threshold. The RPM threshold
value for fan fault detection is set in the FAN_FAULT
Register (8-bit, read/write).
FAN
RISO
VOUT
TC664
TC665
SENSE
CSENSE
RSENSE
GND
FIGURE 4-7:
Fan Current Sensing.
By selecting FPPR (bits 2-1<01>) in the Configuration
Register, the TC664/TC665 devices can be programmed to calculate RPM data for fans with 1, 2, 4 or
8 current pulses per rotation. The default state
assumes a fan with 2 pulses per rotation.
The measured RPM data is then stored in the RPMOUTPUT (RPM) Register. This register is a 9-Bit read
only register which stores RPM data with 25 RPM resolution. By setting RES (bit 6<0>) of the Configuration
Register to a ‘1’, the RPM data can be read with
25 RPM resolution. If this bit is left in the default state
of '0', the RPM data will only be readable with resolution of 50 RPMs, which represents 8-bit data.
The RPM threshold represents the fan speed at which
the TC664/TC665 devices will indicate a fan fault. This
threshold can be set at lower levels to indicate fan
locked rotor conditions, or set to higher levels to give
indications for predictive fan failure. It is recommended
that the RPM threshold be at least 10% lower than the
minimum fan speed which occurs at the lowest duty
cycle set point. The default value for the fan RPM
threshold is 500 RPM. If the fan's sensed RPM is less
than the fan fault threshold for 2.4 seconds (typical), a
fan fault condition is indicated.
When a fault condition, due to low fan RPM, occurs, a
logic low is asserted at the FAULT output and the FF
(bit 0<0>) in the Status Register is set to '1'. The FAULT
output and the fault bit in the Status Register can be
reset by setting FFCLR (bit 7<0>) in the Configuration
Register to a '1'.
For the TC665 device, a fault condition is also indicated
when an Over Temperature Fault condition occurs.
This condition occurs when the VOUT duty cycle
exceeds the 100% value, indicating that no additional
cooling capability is available. For this condition, a logic
low is asserted at the FAULT output and OTF (bit 5<X>)
of the Status Register, the over temperature fault indicator, is set to a ‘1’ (The TC664 also indicates an over
temperature condition via the OTF bit in the status register). If the duty cycle then decreases below 100%, the
FAULT output will be released and OTF (bit 5<X>) of
the Status Register will be reset to ‘0’.
The maximum fan RPM reading is 12775 RPM. If this
value is exceeded, a counter overflow bit in the Status
Register is set. RCO (bit 3<0>) in the Status Register
represents the RPM counter overflow bit for the RPMOUTPUT Register. This bit will automatically be reset
to zero if the fan RPM reading has been below the maximum value of 12775 RPM for 2.4 seconds.
4.9
See Table 6-1 for RPM and Status Register command
byte assignments.
The TC664/TC665 devices can be put into a low power
shutdown mode by setting SDM (bit 0<0>) in the Configuration Register to a ‘1’ (this bit is the shutdown bit).
When the TC664/TC665 devices are in shutdown
mode, all functions except for the SMBus interface are
suspended. During this mode of operation, the TC664
and TC665 devices will draw a typical supply current of
only 5 µA. Normal operation will resume as soon as Bit
0 in the Configuration Register is reset to ‘0’.
Low Power Shutdown Mode
Some applications may have operating conditions
where fan cooling is not required as a result of low
ambient temperature or light system load. During these
times it may be desirable to shut the fans down to save
power and reduce system noise.
When the TC664/TC665 devices are brought out of a
shutdown mode by resetting SDM (bit 0<0>) in the
Configuration Register, all of the registers, except for
the Configuration and FAN_FAULT Registers assume
 2002-2013 Microchip Technology Inc.
DS21737B-page 13
TC664/TC665
their default power up states. The Configuration Register and the FAN_FAULT Register maintain the states
they were in prior to the device being put into the shutdown mode. Since these are the registers which control
the parts operation, the part does not have to be reprogrammed for operation when it comes out of shutdown
mode.
4.10
SMBus Interface (SCLK & SDA)
The TC664/TC665 feature an industry standard, 2-wire
serial interface with factory-set addresses. By communicating with the TC664/TC665 device's registers,
functions like PWM duty cycle, low power shutdown
mode and fan RPM threshold can be controlled. Critical
information, such as fan fault, over temperature and fan
RPM, can also be obtained via the device data registers. The available data and control registers make the
TC664/TC665 devices very flexible and easy to use. All
of the available registers are detailed in Section 6.0.
4.11
SMBus Slave Address
The slave address of the TC664/TC665 devices is
0011 011. This is a fixed address. This address is different from industry-standard digital temperature sensors (like the TCN75) and, therefore, allows the TC664/
TC665 to be utilized in systems in conjunction with
these components. Please contact Microchip
Technology if alternate addresses are required.
DS21737B-page 14
 2002-2013 Microchip Technology Inc.
TC664/TC665
5.0
SERIAL COMMUNICATION
5.1
SMBus 2-Wire Interface
5.1.1
DATA TRANSFER
• Data transfer may be initiated only when the bus
is not busy.
• During data transfer, the data line must remain
stable whenever the clock line is HIGH. Changes
in the data line while the clock line is HIGH will be
interpreted as a START or STOP condition.
The TC664/TC665 support a bi-directional 2-Wire bus
and data transmission protocol. The serial protocol
sequencing is illustrated in Figure 1-1. Data transfers
are initiated by a start condition (START), followed by a
device address byte and one or more data bytes. The
device address byte includes a Read/Write selection
bit. Each access must be terminated by a Stop Condition (STOP). A convention call Acknowledge (ACK)
confirms the receipt of each byte. Note that SDA can
only change during periods when SCLK is LOW (SDA
changes while SCLK is HIGH are reserved for Start and
Stop conditions). All bytes are transferred MSB (most
significant bit) first.
Accordingly, the following Serial Bus conventions have
been defined.
5.1.2
The Serial Clock Input (SCLK) and the bi-directional
data port (SDA) form a 2-wire bi-directional serial port
for communicating with the TC664/TC665. The following bus protocols have been defined:
TABLE 5-1:
TC664/TC665 SERIAL BUS
CONVENTIONS
Term
Description
Transmitter
The device sending data to the bus.
Receiver
The device receiving data from the
bus.
Master
The device which controls the bus: initiating transfers (START), generating
the clock and terminating transfers
(STOP).
Slave
The device addressed by the master.
Start
A unique condition signaling the
beginning of a transfer indicated by
SDA falling (High to Low) while SCLK
is high.
Stop
A unique condition signaling the end
of a transfer indicated by SDA rising
(Low to High) while SCLK is high.
ACK
A Receiver acknowledges the receipt
of each byte with this unique condition. The Receiver pulls SDA low during SCLK high of the ACK clock-pulse.
The Master provides the clock pulse
for the ACK cycle.
Busy
Communication is not possible
because the bus is in use.
NOT Busy
When the bus is idle, both SDA and
SCLK will remain high.
Data Valid
The state of SDA must remain stable
during the high period of SCLK in
order for a data bit to be considered
valid. SDA only changes state while
SCLK is low during normal data transfers. (See START and STOP conditions)
 2002-2013 Microchip Technology Inc.
MASTER/SLAVE
The device that sends data onto the bus is the transmitter and the device receiving data is the receiver. The
bus is controlled by a master device which generates
the serial clock (SCLK), controls the bus access and
generates the START and STOP conditions. The
TC664/TC665 always work as a slave device. Both
master and slave devices can operate as either transmitter or receiver, but the master device determines
which mode is activated.
5.1.3
START CONDITION (START)
A HIGH to LOW transition of the SDA line while the
clock (SCLK) is HIGH determines a START condition.
All commands must be preceded by a START condition.
5.1.4
ADDRESS BYTE
Immediately following the Start Condition, the host
must transmit the address byte to the TC664/TC665.
The 7-bit SMBus address for the TC664/TC665 is
0011 011. The 7-bit address transmitted in the serial
bit stream must match for the TC664/TC665 to respond
with an Acknowledge (indicating the TC664/TC665 is
on the bus and ready to accept data). The eighth bit in
the Address Byte is a Read-Write Bit. This bit is a ‘1’ for
a read operation or ‘0’ for a write operation. During the
first phase of any transfer, this bit will be set = 0 to indicate that the command byte is being written.
5.1.5
STOP CONDITION (STOP)
A LOW to HIGH transition of the SDA line while the
clock (SCLK) is HIGH determines a STOP condition.
All operations must be ended with a STOP condition.
5.1.6
DATA VALID
The state of the data line represents valid data when,
after a START condition, the data line is stable for the
duration of the HIGH period of the clock signal.
DS21737B-page 15
TC664/TC665
The data on the line must be changed during the LOW
period of the clock signal. There is one clock pulse per
bit of data. Each data transfer is initiated with a START
condition and terminated with a STOP condition. The
number of the data bytes transferred between the
START and STOP conditions is determined by the
master device and is unlimited.
5.1.7
period of the acknowledge related clock pulse. Setup
and hold times must be taken into account. During
reads, a master device must signal an end of data to
the slave by not generating an acknowledge bit on the
last byte that has been clocked out of the slave. In this
case, the slave (TC664/TC665) will leave the data line
HIGH to enable the master device to generate the
STOP condition.
ACKNOWLEDGE (ACK)
5.2
Each receiving device, when addressed, is obliged to
generate an acknowledge bit after the reception of
each byte. The master device must generate an extra
clock pulse, which is associated with this acknowledge
bit.
The TC664/TC665 devices communicate with three
standard SMBus protocols. These are the write byte,
read byte and receive byte. The receive byte is a shortened method for reading from or writing to a register
which had been selected by the previous read or write
command. These transmission protocols are shown in
Figures 5-1, 5-2 and 5-3.
The device that acknowledges has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable LOW during the HIGH
S
ADDRESS
WR
ACK
7 Bits
S
DATA
ACK
P
8 Bits
Data Byte: data goes
into the register set
by the command byte.
SMBus Protocol: Write Byte Format.
ADDRESS
WR
ACK
7 Bits
ACK
8 Bits
ADDRESS
RD
ACK
7 Bits
FIGURE 5-2:
COMMAND
Command Byte: selects
which register you are
writing to.
DATA
NACK
P
8 Bits
Slave Address:
repeated due to change
in data flow direction.
S
ACK
Command Byte: selects
which register you are
writing to.
Slave Address
S
COMMAND
8 Bits
Slave Address
FIGURE 5-1:
SMBus Protocols
Data Byte: reads from
the register set by the
command byte.
SMBus Protocol: Read Byte Format.
ADDRESS
7 Bits
DATA
NACK
P
Data Byte: reads data from
the register commanded by
the last Read Byte or Write
Byte transmission
SMBus Protocol: Receive Byte Format.
S = Start Condition
P = Stop Condition
Shaded = Slave Transmission
DS21737B-page 16
ACK
8 Bits
Slave Address
FIGURE 5-3:
RD
ACK = Acknowledge = 0
NACK = Not Acknowledged = 1
WR = Write = 0
RD = Read = 1
 2002-2013 Microchip Technology Inc.
TC664/TC665
6.0
REGISTER SET
The TC664/TC665 devices contain 7 registers that provide a variety of data and functionality control to the
outside system. These registers are listed in Table 6-1.
TABLE 6-1:
Of key importance is the command byte information,
which is needed in the read and write protocols to
select the individual registers.
COMMAND BYTE ASSIGNMENTS
Register
Command
Read
Write
POR Default State
RPM
0000 0000
X
—
0 0000 0000
FAN_FAULT
0000 0010
X
X
0000 1010
Fan Fault Threshold
CONFIG
0000 0100
X
X
0000 1010
Configuration
STATUS
0000 0101
X
—
00X0 0X00
Status. See Section 6.4, Status Register explanation of X
DUTY_CYCLE
0000 0110
X
X
0000 0010
Fan Speed Duty Cycle
MFR_ID
0000 0111
X
—
0101 0100
Manufacturer Identification
VER_ID
0000 1000
X
—
0000 00XX
Version Identification:
(XX = ‘10’ TC664, XX = ‘11’ TC665)
6.1
RPM-OUTPUT Register (RPM)
As discussed in Section 4.7, fan current pulses are
detected at the SENSE input of the TC664/TC665
device. The current pulse information is used to calculate the fan RPM. The fan RPM data is then written to
the RPM register. RPM is a 9-bit register that provides
the RPM information in 50 RPM (8-bit) or 25 RPM (9bit) increments. This is selected via RES (bit 6<0>) in
REGISTER 6-1:
Function
RPM Output
the Configuration Register, with ‘0’ = 50 RPM and
‘1’ = 25 RPM. The default state is zero (50 RPM). The
maximum fan RPM value that can be read is
12775 RPM. If this value is exceeded, RCO (bit 3<0>)
in the Status Register will be set to a '1' to indicate that
a counter overflow of the RPM Register has occurred.
Register 6-1 shows the RPM output register 9-bit format.
RPM OUTPUT REGISTER (RPM)
D(8)
D(7)
D(6)
D(5)
D(4)
D(3)
D(2)
D(1)
D(0)
RPM
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
25
0
0
0
0
0
0
0
1
0
50
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
1
1
1
1
1
1
1
1
0
12750
1
1
1
1
1
1
1
1
1
12775
 2002-2013 Microchip Technology Inc.
DS21737B-page 17
TC664/TC665
6.2
FAN_FAULT Threshold Register
(FAN_FAULT)
If the measured fan RPM (stored in the RPM Register)
drops below the value that is set in the Fan Fault Register for more than 2.4 sec, FF (bit 0<0>) in the Status
Register will be set to a '1' and the FAULT output will be
pulled low. See Register 6-2 for the Fan Fault
Threshold Register 8-bit format.
The FAN_FAULT Threshold Register is used to set the
fan fault threshold level for the fan. The Fan Fault
Threshold Register is an 8-bit read/writable register
that allows the fan fault RPM threshold to be set in 50
RPM increments. The default setting for the Fan Fault
Register is 500 RPM (0000 1010). The maximum set
point value is 12750 RPM.
REGISTER 6-2:
FAN FAULT THRESHOLD REGISTER (FAN_FAULT)
D(7)
D(6)
D(5)
D(4)
D(3)
D(2)
D(1)
D(0)
RPM
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
50
0
0
0
0
0
0
1
0
100
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
1
1
1
1
1
1
1
0
12700
1
1
1
1
1
1
1
1
12750
DS21737B-page 18
 2002-2013 Microchip Technology Inc.
TC664/TC665
6.3
CONFIGURATION REGISTER
(CONFIG)
The Configuration Register is an 8-bit, read/writable,
multi-function control register. This register allows the
user to clear fan faults, select RPM resolution, select
REGISTER 6-3:
VOUT duty cycle (fan speed) control method, select the
fan current pulses per rotation for the fan (for fan RPM
calculation) and put the TC664/TC665 device into a
shutdown mode to reduce power consumption. See
Register 6-3 below for the Configuration Register bit
descriptions.
CONFIGURATION REGISTER (CONFIG)
R/W-0
FFCLR
R/W-0
RES
R/W-0
U-0
U-1
R/W-0
R/W-1
R/W-0
DUTYC
—
—
FPPR
FPPR
SDM
bit 7
bit 0
bit 7
FFCLR: Fan Fault Clear
1 = Clear Fan Fault, this will reset the Fan Fault bit in the Status Register and the FAULT output.
0 = Normal Operation (default)
bit 6
RES: Resolution Selection for RPM Output Register
1 = RPM Output Register (RPM) will be set for 25 RPM (9-bit) resolution.
0 = RPM Output Register (RPM) will be set for 50 RPM (8-bit) resolution. (default)
bit 5
DUTYC: Duty-Cycle Control Method
1 = The VOUT duty-cycle will be controlled via the SMBus interface. The value for the VOUT
duty-cycle will be taken from the duty-cycle register (DUTY_CYCLE).
0 = The VOUT duty-cycle will be controlled via the VIN analog input pin. The VOUT duty-cycle
value will be between 30% and 100% for VIN values between 1.62 V and 2.6 V typical. If
the VIN pin is open when this mode is selected, the VOUT duty-cycle will default to 39.33%.
(default)
bit 4
Unimplemented: Read as '0'
bit 3
Unimplemented: Read as '1'
bit 2-1
FPPR: Fan Pulses Per Rotation
The TC664/TC665 device uses this setting to understand how many current pulses per revolution the fan should have. It then uses this as part of the calculation for the fan RPM value for
the RPM Register. See Section 7.7 for application information on determining your fan’s
number of current pulses per revolution.
00 = 1
01 = 2 (default)
10 = 4
11 = 8
bit 0
SDM: Shutdown Mode
1 = Shutdown Mode. See Section 4.9 for more information on low power shutdown mode.
0 = Normal Operation. (default)
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit
-n = Value at POR
’1’ = Bit is set
’0’ = Bit is cleared
 2002-2013 Microchip Technology Inc.
x = Bit is unknown
DS21737B-page 19
TC664/TC665
6.4
STATUS REGISTER (STATUS)
The Status Register provides all the information about
what is going on within the TC664/TC665 devices. Fan
fault information, VIN status, RPM counter overflow
REGISTER 6-4:
and over temperature indication are all available in the
Status Register. The Status Register is an 8-bit Read
only register with bits 1, 4, 6 and 7 unused. See
Register 6-4 below for the bit descriptions.
STATUS REGISTER (STATUS)
U-0
U-0
R-X
U-0
R-0
R-X
U-X
R-0
—
—
OTF
—
RCO
VSTAT
—
FF
bit 7
bit 0
bit 7-6
Unimplemented: Read as ‘0’
bit 5
OTF: Over Temperature Fault Condition
For the TC664/TC665 device, this bit is set to the proper state immediately at startup and is
therefore treated as an unknown (X). If VIN is greater than the threshold required for 100% duty
cycle on VOUT (2.6 V typical), then the bit will be set to a ‘1’. If it is less than the threshold, the
bit will be set to ‘0’. This is determined at power-up.
1 = Over temperature condition has occurred.
0 = Normal operation, VIN is less than 2.6 V.
bit 4
Unimplemented: Read as ‘0’
bit 3
RCO: RPM Counter Overflow
1 = Fault condition. The maximum RPM reading of 12775 RPM in register RPM has been
exceeded. This bit will automatically reset to zero when the RPM reading comes back into
range.
0 = Normal operation. RPM reading is within limits (default).
bit 2
VSTAT: VIN Input Status
For the TC664/TC665 devices, the VIN pin status is checked immediately at power-up. If no
external thermistor or voltage output network is connected (VIN is open), this bit is set to a ‘1’.
If an external network is detected, this bit is set to ‘0’. If the VIN pin is open and SMBus operation
has not been selected in the Configuration Register, the VOUT duty cycle will default to 39.33%.
1 = VIN is open.
0 = Normal operation. Voltage present at VIN.
bit 1
Unimplemented: Read as ‘unknown’
bit 0
FF: Fan Fault
1 = Fault Condition. The value for fan RPM in the RPM Register has fallen below the value set
in the FAN_FAULT Threshold Register. The speed of the fan is too low and a fault condition is being indicated. The FAULT output will be pulled low at the same time. This fault bit
can be cleared using the Fan Fault Clear bit (FFCLR (bit 7<0>)) in the Configuration Register.
0 = Normal Operation (default).
Legend:
DS21737B-page 20
R = Readable bit
W = Writable bit
U = Unimplemented bit
-n = Value at POR
’1’ = Bit is set
’0’ = Bit is cleared
x = Bit is unknown
 2002-2013 Microchip Technology Inc.
TC664/TC665
6.5
DUTY-CYCLE Register
(DUTY_CYCLE)
The DUTY_CYCLE register is a 4-bit read/writable register used to control the duty cycle of the VOUT output.
The controllable duty cycle range via this register is
30% to 100%, with programming steps of 4.67%.This
method of duty cycle control is mainly used with the
SMBus interface. However, if the VIN method of duty
cycle control has been selected (or defaulted to), and
the VIN pin is open, the duty cycle will go to the default
setting for this register, which is 0010 (39.33%). The
duty cycle settings are shown in Register 6-5.
REGISTER 6-5:
DUTY-CYCLE REGISTER
(DUTY_CYCLE)
D(3)
D(2)
D(1)
D(0)
Duty-Cycle
0
0
0
0
30%
0
0
0
1
34.67%
0
0
1
0
39.33% (default for VIN
open and when SMBus
is not selected)
0
0
1
1
44%
0
1
0
0
48.67%
0
1
0
1
53.33%
0
1
1
0
58%
0
1
1
1
62.67%
1
0
0
0
67.33%
1
0
0
1
72%
1
0
1
0
76.67%
1
0
1
1
81.33%
1
1
0
0
86%
1
1
0
1
90.67%
1
1
1
0
95.33%
1
1
1
1
100%
 2002-2013 Microchip Technology Inc.
6.6
Manufacturer’s Identification
Register (MFR_ID)
This register allows the user to identify the manufacturer of the part. The MFR_ID register is an 8-bit Read
only register. See Register 6-6 for the Microchip manufacturer ID.
REGISTER 6-6:
MANUFACTURER’S
IDENTIFICATION
REGISTER (MFR_ID)
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
0
1
0
1
0
1
0
0
6.7
Version ID Register (VER_ID)
This register is used to indicate which version of the
device is being used, either the TC664 or the TC665.
This register is a simple 2-bit Read only register.
REGISTER 6-7:
D[1]
VERSION ID REGISTER
(VER_ID)
D[0] Version
1
0
TC664
1
1
TC665
DS21737B-page 21
TC664/TC665
7.0
APPLICATIONS INFORMATION
7.1
Connecting to the SMBus
SDA SCLK
PIC16F876
Microcontroller
The SMBus is an open collector bus, requiring pull-up
resistors connected to the SDA and SCLK lines. This
configuration is shown in Figure 7-1.
24LC01
EEPROM
TC664/TC665
Fan Speed
Controller
PIC®
Microcontroller
VDD
R
R
SDA
SCLK
FIGURE 7-2:
Range for R: 13.2 kto 46 k for VDD = 5.0 V
FIGURE 7-1:
SMBus.
TCN75
Temperature
Sensor
TC664/TC665
Pull-up Resistors On
The number of devices connected to the bus is limited
only by the maximum rise and fall times of the SDA and
SCLK lines. Unlike I2C specifications, SMBus does not
specify a maximum bus capacitance value. Rather, the
SMBus specification calls out that the maximum current
through the pull-up resistor be 350 µA (minimum,
100 µA, is also specified). Therefore, the value of the
pull-up resistors will vary depending on the system’s
bias voltage, VDD. Minimizing bus capacitance is still
very important as it directly effects the rise and fall times
of the SDA and SCLK lines. The range for pull-up resistor values for a 5 V system are shown in Figure 7-1.
Although SMBus specifications only require the SDA
and SCLK lines to pull down 350 µA, with a maximum
voltage drop of 0.4 V, the TC664/TC665 devices have
been designed to meet a maximum voltage drop of
0.4 V with 3 mA of current. This allows lower values of
pull-up resistors to be used, which will allow higher bus
capacitance. If this is to be done, all devices on the bus
must be able to meet the same pull down current
requirements as well.
A possible configuration using multiple devices on the
SMBus is shown in Figure 7-2.
7.2
Multiple Devices on SMBus.
Setting the PWM Frequency
The PWM frequency of the VOUT output is set by the
capacitor value attached to the CF pin. The PWM frequency will be 30 Hz (typical) for a 1 µF capacitor. The
relationship between frequency and capacitor value is
linear, making alternate frequency selections easy.
As stated in previous sections, the PWM frequency
should be kept in the range of 15 Hz to 35 Hz. This will
eliminate the possibility of having audible frequencies
when varying the duty cycle of the fan drive.
A very important factor to consider when selecting the
PWM frequency for the TC664/TC665 devices is the
RPM rating of the selected fan and the minimum duty
cycle that you will be operating at. For fans that have a
full speed rating of 3000 RPM or less, it is desirable to
use a lower PWM frequency. A lower PWM frequency
allows for a longer time period to monitor the fan current pulses. The goal is to be able to monitor at least
two fan current pulses during the on time of the VOUT
output.
Example: Your system design requirement is to operate the fan at 50% duty cycle when ambient temperatures are below 20°C. The fan full speed RPM rating is
3000 RPM and has four current pulses per rotation. At
50% duty cycle, the fan will be operating at approximately 1500 RPM.
EQUATION
60  1000
Time for one revolution (msec.) = ------------------------ = 40
1500
If one fan revolution occurs in 40 msec, then each fan
pulse occurs 10 msec apart. In order to detect two fan
current pulses, the on time of the VOUT pulse must be
at least 20 msec. With the duty cycle at 50%, the total
period of one cycle must be at least 40 msec, which
makes the PWM frequency 25 Hz. For this example, a
PWM frequency of 20 Hz is recommended. This would
define a CF capacitor value of 1.5 µF.
DS21737B-page 22
 2002-2013 Microchip Technology Inc.
TC664/TC665
7.3
Temperature Sensor Design
As discussed in previous sections, the VIN analog input
has a range of 1.62 V to 2.6 V (typical), which represents a duty cycle range on the VOUT output of 30% to
100%, respectively. The VIN voltages can be thought of
as representing temperatures. The 1.62 V level is the
low temperature at which the system only requires 30%
fan speed for proper cooling. The 2.6 V level is the high
temperature, for which the system needs maximum
cooling capability, so the fan needs to be at 100%
speed.
One of the simplest ways of sensing temperature over
a given range is to use a thermistor. By using an NTC
thermistor as shown in Figure 7-3, a temperature variant voltage can be created.
VDD
V DD  R 2
V  t1  = --------------------------------------RTEMP  t1  + R 2
V DD  R 2
V  t2  = --------------------------------------RTEMP  t2  + R 2
In order to solve for the values of R1 and R2, the values
for VIN, and the temperatures at which they are to
occur, need to be selected. The variables, t1 and t2,
represent the selected temperatures. The value of the
thermistor at these two temperatures can be found in
the thermistor data sheet. With the values for the
thermistor and the values for VIN, you now have two
equations from which the values for R1 and R2 can be
found.
Example: The following design goals are desired:
• Duty Cycle = 50% (VIN = 1.9 V) with Temperature
(t1) = 30°C
• Duty Cycle = 100% (VIN = 2.6 V) with Temperature (t2) = 60°C
IDIV
Rt
EQUATION
R1
VIN
R2
Using a 100 k thermistor (25°C value), we look up the
thermistor values at the desired temperatures:
• Rt = 79428  @ 30°C
• Rt = 22593  @ 60°C
Substituting these numbers into the given equations,
we come up with the following numbers for R1 and R2.
There are many values that can be chosen for the NTC
thermistor. There are also thermistors that have a linear
resistance, instead of logarithmic, which can help to
eliminate R1. If less current draw from VDD is desired,
then a larger value thermistor should be chosen. The
voltage at the VIN pin can also be generated by a voltage output temperature sensor device. The key is to
get the desired VIN voltage to system (or component)
temperature relationship.
The following equations apply to the circuit in
Figure 7-3.
 2002-2013 Microchip Technology Inc.
140000
4.000
120000
3.500
VIN Voltage
2.500
80000
2.000
60000
NTC Thermistor
100K @ 25ºC
40000
20000
1.500
VIN (V)
3.000
100000
1.000
0.500
RTEMP
0
90
10
80
70
60
50
0.000
40
0
30
Figure 7-3 represents a temperature dependent voltage divider circuit. Rt is a conventional NTC thermistor,
R1 and R2 are standard resistors. R1 and Rt form a parallel resistor combination that will be referred to as
RTEMP (RTEMP = R1 * Rt/ R1 + Rt). As the temperature
increases, the value of Rt decreases and the value of
RTEMP will decrease with it. Accordingly, the voltage at
VIN increases as temperature increases, giving the
desired relationship for the VIN input. The purpose of
R1 is to help linearize the response of the sensing network. Figure 7-4 shows an example of this.
• R1 = 34.8 k
• R2 = 14.7 k
20
Temperature Sensing
Network Resistance (:)
FIGURE 7-3:
Circuit.
Temperature (ºC)
FIGURE 7-4:
How Thermistor Resistance,
VIN, And RTEMP Vary With Temperature.
Figure 7-4 graphs three parameters versus temperature. They are Rt, R1 in parallel with Rt, and VIN. As
described earlier, you can see that the thermistor has a
logarithmic resistance variation. When put in parallel
with R1, though, the combined resistance becomes
more linear, which is the desired effect. This gives us
the linear looking curve for VIN.
DS21737B-page 23
TC664/TC665
7.4
FanSense Network (RSENSE &
CSENSE)
The network comprised of RSENSE and CSENSE allows
the TC664/TC665 devices to detect commutation of the
fan motor. RSENSE converts the fan current into a voltage. CSENSE AC couples this voltage signal to the
SENSE pin. The goal of the SENSE network is to provide a voltage pulse to the SENSE pin that has a minimum amplitude of 120 mV. This will ensure that the
current pulse caused by the fan commutation is recognized by the TC664/TC665 device.
A 0.1 µF ceramic capacitor is recommended for
CSENSE. Smaller values will require larger sense resistors be used. Using a 0.1 µF capacitor results in reasonable values for RSENSE. Figure 7-5 illustrates a
typical SENSE network.
TABLE 7-1:
RSENSE VS. FAN CURRENT
Nominal Fan Current
(mA)
RSENSE (ohm)
50
9.1
100
4.7
150
3.0
200
2.4
250
2.0
300
1.8
350
1.5
400
1.3
450
1.2
500
1.0
Figure 7-6 shows some typical waveforms for the fan
current and the voltage at the Sense pins.
FAN
RISO
VOUT
715 
CSENSE
SENSE
(0.1 µF typical)
Note:
RSENSE
See Table 7-1 for RSENSE value.
FIGURE 7-5:
Typical Sense Network.
The value of RSENSE will change with the current rating
of the fan. A key point is that the current rating of the
fan specified by the manufacturer may be a worst case
rating. The actual current drawn by the fan may be
lower than this rating. For the purpose of setting the
value for RSENSE, the operating fan current should be
measured.
Table 7-1 shows values of RSENSE according to the
nominal operating current of the fan. The fan currents
are average values. If the fan current falls between two
of the values listed, use the higher resistor value.
FIGURE 7-6:
Typical Fan Current and
Sense Pin Waveforms.
7.5
Output Drive Device Selection
The TC664/TC665 devices are designed to drive two
external NPN transistors or two external N-channel
MOSFETs as the fan speed modulating elements.
These two arrangements are shown in Figure 7-7. For
lower current fans, NPN transistors are a very economical choice for the fan drive device. It is recommended
that, for higher current fans (500 mA and above), MOSFETs be used as the fan drive device. Table 7-2 provides some possible part numbers for use as the fan
drive element.
When using an NPN transistor as the fan drive element, a base current limiting resistor must be used.
This is shown in Figure 7-7.
When using MOSFETs as the fan drive element, it is
very easy to turn the MOSFETs on and off at very high
rates. Because the gate capacitances of these small
DS21737B-page 24
 2002-2013 Microchip Technology Inc.
TC664/TC665
MOSFETs are very low, the TC664/TC665 devices can
charge and discharge them very quickly leading to very
fast edges. Of key concern is the turn-off edge of the
MOSFET. Since the fan motor winding is essentially an
inductor, when the MOSFET is turned off, the current
that was flowing through the motor wants to continue to
flow. If the fan does not have internal clamp diodes
around the windings of the motor, there is no path for
this current to flow through and the voltage at the drain
of the MOSFET may rise until the drain to source rating
of the MOSFET is exceeded. This will most likely cause
the MOSFET to go into avalanche mode. Since there is
very little energy in this occurrence, it will probably not
fail the device, but it would be a long term reliability
issue. The following is recommended:
• Ask how the fan is designed. If the fan has clamp
diodes internally, you will not experience this
problem. If the fan does not have internal clamp
diodes, it is a good idea to put one externally
(Figure 7-8). You can also put a resistor between
VOUT and the gate of the MOSFET, which will help
slow down the turn-off and limit this condition.
VDD
VDD
FAN
FAN
RBASE
VOUT
Q1
Q1
VOUT
RSENSE
RSENSE
GND
GND
a) Single Bipolar Transistor
FIGURE 7-7:
TABLE 7-2:
Device
MMBT2222A
MPS2222A
MPS6602
b) N-Channel MOSFET
Output Drive Device Configurations.
FAN DRIVE DEVICE SELECTION TABLE (NOTE 2)
Package
Max Vbe sat /
Vgs(V)
Min hfe
Vce/VDS
Fan Current
(mA)
Suggested
Rbase (ohms)
SOT-23
1.2
50
40
150
800
TO-92
1.2
50
40
150
800
TO-92
1.2
50
40
500
301
SI2302
SOT-23
2.5
NA
20
500
Note 1
MGSF1N02E
SOT-23
2.5
NA
20
500
Note 1
SI4410
SO-8
4.5
NA
30
1000
Note 1
SI2308
SOT-23
4.5
NA
60
500
Note 1
Note 1: A series gate resistor may be used in order to control the MOSFET turn-on and turn-off times.
2: These drive devices are suggestions only. Fan currents listed are for individual fans.
 2002-2013 Microchip Technology Inc.
DS21737B-page 25
TC664/TC665
The first piece of information required is the fan's full
speed RPM rating. The fan RPM rating can then be
converted to give the time for one revolution using the
following equation:
FAN
EQUATION
60  1000
Time for one revolution (msec.) = -----------------------Fan RPM
Q1
The fan current can now be monitored over this time
period. The number of pulses occurring in this time
period is the fan's "Current Pulses per Rotation" rating
which is needed in order to accurately read fan RPM.
RSENSE
Example: The full speed fan RPM rating is 8200 RPM.
From this, the time for one fan revolution is calculated
to be 7.3 msec, using the previously discussed equation. Using a current probe, the fan current can be monitored as the fan is operating at full speed. Figure 7-9
shows the fan current pulses for this example. The
7.44 msec window, marked by the cursors, is very near
the 7.3 msec calculated above and is within the tolerance of the fan ratings. Four current pulses occur within
this 7.44 msec time frame. Given this information,
FPPR (bits 2-1<01>) in the Configuration Register
should be set to '10' to indicate 4 current pulses per
revolution.
VOUT
GND
Q1 - N-Channel MOSFET
FIGURE 7-8:
off.
7.6
Clamp Diode For Fan Turn-
Bias Supply Bypassing and Noise
Filtering
The bias supply (VDD) for the TC664/TC665 devices
should be bypassed with a 1 µF ceramic capacitor. This
capacitor will help supply the peak currents that are
required to drive the base/gate of the external fan drive
devices.
As the VIN pin controls the duty cycle in a linear fashion,
any noise on this pin can cause duty cycle jittering. For
this reason, the VIN pin should be bypassed with a
0.01 µF capacitor.
In order to keep fan noise off of the TC664/TC665
device ground, individual ground returns for the TC664/
TC665 and the low side of the fan current sense resistor should be used.
7.7
Determining Current Pulses Per
Revolution of Fans
There are many different fan designs available in the
marketplace today. The motor designs can vary and,
along with it, the number of current pulses in one fan
revolution. In order to correctly measure and communicate the fan speed, the TC664/TC665 devices must
be programmed for the proper number of fan current
pulses per revolution. This is done by setting the FPPR
bit in the Configuration Register to the proper values
(see Section 6.3 for settings). A fan's current pulses
per revolution can be determined in the following
manner.
DS21737B-page 26
FIGURE 7-9:
Revolution Fan.
7.8
Four Current Pulses Per
How to Eliminate False Current
Pulse Sensing
During the PWM mode of operation, some fans will
generate an extra current pulse. This pulse occurs
when the external drive device is turned on and is, in
most cases, caused by the fan's electronics that control
the fan motor. This pulse does not represent true fan
current and needs to be blanked out. This is particularly
important for detecting a fan in a locked rotor condition.
 2002-2013 Microchip Technology Inc.
TC664/TC665
Figure 7-10 shows the voltage pulse at the Sense pin,
which is caused by the fan's "extra" current pulse
during PWM output turn-on.
FAN
TC664
TC665
VOUT
RISO
CSLOW
(0.1 µF
typical)
Sense Pin Voltage
"Extra Pulse"
SENSE
CSENSE
(0.1 µF typical)
VOUT PWM
RSENSE
GND
FIGURE 7-10:
Extra Pulse at Sense Pin.
This problem occurs mainly with fans that have a current waveshape like the one shown in Figure 7-9. For
configurations where an NPN transistor is being used
as the external drive device, the typical Rsense and
CSENSE scheme can continue to be used to sense the
fan current pulses. In order to eliminate the extra current pulse, a slow down capacitor can be placed from
the base of the transistor to ground. A 0.1 µF capacitor
is appropriate in most cases. This arrangement is
shown in Figure 7-11. This capacitor will help to slow
down the turn-on edge of the transistor and reduce the
amplitude of the extra current pulse.
For configurations using an N-channel MOSFET as the
drive device, the slow down capacitor does not fix all
conditions and the current sensing scheme must be
changed. Since the current for this type of fan always
returns to zero, the coupling capacitor, CSENSE, is not
needed. Instead, it will be replaced by an R-C configuration to eliminate the voltage pulse generated by the
extra current pulse. This new sensing configuration is
shown in Figure 7-12. The values of the resistor/capacitor combination should be adjusted so that the voltage
pulse generated by the extra current pulse is smoothed
and is not registered by the TC664/TC665 as a true fan
current pulse. Typical values for RSLOW and CSLOW
are 1 k and 1000 pF, respectively.
 2002-2013 Microchip Technology Inc.
FIGURE 7-11:
Capacitor.
Transistor Drive with CSLOW
FAN
TC664
TC665
VOUT
RSLOW
(1 k typical)
SENSE
CSLOW
(1000 pF
typical)
RSENSE
GND
FIGURE 7-12:
FET Drive with RSLOW/
CSLOW Sense Scheme.
DS21737B-page 27
TC664/TC665
8.0
PACKAGING INFORMATION
8.1
Package Marking Information
10-Pin MSOP Device
1
2
3
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS21737B-page 28
10
TC664E
TC665E
YWWNNN
9
8
4
7
5
6
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
 2002-2013 Microchip Technology Inc.
TC664/TC665
8.2
Taping Form
Component Taping Orientation for 10-Pin MSOP Devices
User Direction of Feed
PIN 1
W
P
Standard Reel Component Orientation
for TR Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size:
Package
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
12 mm
8 mm
2500
13 in.
10-Pin MSOP
8.3
Package Information
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
10-Pin MSOP
PIN 1
.122 (3.10) .201 (5.10)
.114 (2.90) .183 (4.65)
.012 (0.30)
.006 (0.15)
.122 (3.10)
.114 (2.90)
.043 (1.10)
MAX.
.020 (0.50)
.006 (0.15)
.002 (0.05)
.009 (0.23)
.005 (0.13)
6 MAX.
.028 (0.70)
.016 (0.40)
Dimensions: inches (mm)
 2002-2013 Microchip Technology Inc.
DS21737B-page 29
TC664/TC665
9.0
REVISION HISTORY
Revision B (January 2013)
Added a note to the package outline drawing.
DS21737B-page 30
 2002-2013 Microchip Technology Inc.
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DS21737B-page 31
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4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21737B-page 32
 2002-2013 Microchip Technology Inc.
TC664/TC665
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
Device:
X
/XX
Temperature
Range
TC664:
TC664T:
TC665:
TC665T:
Package
PWM Fan Speed Controller w/Fault Detection
PWM Fan Speed Controller w/Fault Detection
(Tape and Reel)
PWM Fan Speed Controller w/Fault Detection
PWM Fan Speed Controller w/Fault Detection
(Tape and Reel)
Temperature Range:
E
Package:
UN = Plastic Micro Small Outline (MSOP), 10-lead
Examples:
a)
TC664EUN: PWM Fan Speed Controller w/
Fault Detection
b)
TC664EUNTR: PWM Fan Speed Controller
w/Fault Detection (Tape and Reel)
c)
TC665EUN: PWM Fan Speed Controller w/
Fault Detection
d)
TC665EUNTR: PWM Fan Speed Controller
w/Fault Detection (Tape and Reel)
= -40C to +85C
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.
2.
Your local Microchip sales office
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
 2002-2013 Microchip Technology Inc.
DS21737B-page33
TC664/TC665
NOTES:
DS21737B-page 34
 2002-2013 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2002-2013, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620768952
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
 2002-2013 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS21737B-page 35
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Japan - Osaka
Tel: 81-6-6152-7160
Fax: 81-6-6152-9310
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Cleveland
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Hangzhou
Tel: 86-571-2819-3187
Fax: 86-571-2819-3189
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
China - Hong Kong SAR
Tel: 852-2943-5100
Fax: 852-2401-3431
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
China - Shenzhen
Tel: 86-755-8864-2200
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-213-7828
Fax: 886-7-330-9305
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
DS21737B-page 36
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Japan - Tokyo
Tel: 81-3-6880- 3770
Fax: 81-3-6880-3771
11/29/12
 2002-2013 Microchip Technology Inc.