TC642B/TC647B PWM Fan Speed Controllers With Minimum Fan Speed, Fan Restart and FanSense™ Technology for Fault Detection Features Description • Temperature-Proportional Fan Speed for Acoustic Noise Reduction and Longer Fan Life • Efficient PWM Fan Drive • 3.0V to 5.5V Supply Range: - Fan Voltage Independent of TC642B/TC647B Supply Voltage - Supports any Fan Voltage • FanSense™ Fault Detection Circuit Protects Against Fan Failure and Aids System Testing • Shutdown Mode for "Green" Systems • Supports Low Cost NTC/PTC Thermistors • Over-Temperature Indication (TC642B only) • Fan Auto-Restart • Space-Saving 8-Pin MSOP Package The TC642B/TC647B devices are new versions of the existing TC642/TC647 fan speed controllers. These devices are switch mode, fan speed controllers that incorporate a new fan auto-restart function. Temperature-proportional speed control is accomplished using pulse width modulation. A thermistor (or other voltage output temperature sensor) connected to the VIN input supplies the required control voltage of 1.20V to 2.60V (typical) for 0% to 100% PWM duty cycle. Minimum fan speed is set by a simple resistor divider on the VMIN input. An integrated Start-Up Timer ensures reliable motor start-up at turn-on, coming out of shutdown mode or following a transient fault. A logic-low applied to VMIN (pin 3) causes fan shutdown. Applications • • • • • • Personal Computers & Servers LCD Projectors Datacom & Telecom Equipment Fan Trays File Servers General Purpose Fan Speed Control Package Types MSOP, PDIP, SOIC VIN 1 CF 2 VMIN 3 GND 4 TC642B TC647B 8 VDD 7 VOUT 6 FAULT 5 SENSE 2002-2013 Microchip Technology Inc. The TC642B and TC647B also feature Microchip Technology's proprietary FanSense™ technology for increasing system reliability. In normal fan operation, a pulse train is present at SENSE (pin 5). A missingpulse detector monitors this pin during fan operation. A stalled, open or unconnected fan causes the TC642B/ TC647B device to turn the VOUT output on full (100% duty cycle). If the fault persists (a fan current pulse is not detected within a 32/f period), the FAULT output goes low. Even with the FAULT output low, the VOUT output is on full during the fan fault condition in order to attempt to restart the fan. FAULT is also asserted if the PWM reaches 100% duty cycle (TC642B only), indicating that maximum cooling capability has been reached and a possible overheating condition exists. The TC642B and TC647B devices are available in 8-pin plastic MSOP, SOIC and PDIP packages. The specified temperature range of these devices is -40 to +85ºC. DS21756C-page 1 TC642B/TC647B Functional Block Diagram TC642B/TC647B VOTF VIN VDD Note Control Logic CF 3xTPWM Timer Clock Generator VMIN VSHDN DS21756C-page 2 VOUT Start-up Timer Missing Pulse Detect 10 k GND Note: The VOTF comparator is for the TC642B device only. FAULT SENSE 70 mV (typ) 2002-2013 Microchip Technology Inc. TC642B/TC647B 1.0 ELECTRICAL CHARACTERISTICS PIN FUNCTION TABLE Name Absolute Maximum Ratings † Function VIN Analog Input Supply Voltage (VDD) .......................................................6.0V CF Analog Output Input Voltage, Any Pin................(GND - 0.3V) to (VDD +0.3V) VMIN Analog Input Operating Temperature Range ....................- 40°C to +125°C GND Ground Maximum Junction Temperature, TJ ........................... +150°C SENSE Analog Input ESD Protection on all pins ........................................... > 3 kV FAULT Digital (Open-Drain) Output † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. VOUT Digital Output VDD Power Supply Input ELECTRICAL SPECIFICATIONS Electrical Specifications: Unless otherwise specified, all limits are specified for -40°C < TA < +85°C, VDD = 3.0V to 5.5V. Parameters Sym Min Supply Voltage VDD 3.0 — 5.5 V Supply Current, Operating IDD — 200 400 µA Pins 6, 7 Open, CF = 1 µF, VIN = VC(MAX) IDD(SHDN) — 30 — µA Pins 6, 7 Open, CF = 1 µF, VMIN = 0.35V Sink Current at VOUT Output IOL 1.0 — — mA VOL = 10% of VDD Source Current at VOUT Output IOH 5.0 — — mA VOH = 80% of VDD VC(MAX) 2.45 2.60 2.75 V Supply Current, Shutdown Mode Typ Max Units Conditions VOUT Output VIN, VMIN Inputs Input Voltage at VIN or VMIN for 100% PWM Duty Cycle Over-Temperature Indication Threshold VOTF VC(MAX) + 20 mV V For TC642B Only Over-Temperature Indication Threshold Hysteresis VOTF-HYS 80 mV For TC642B Only VC(MAX) - VC(MIN) VC(SPAN) 1.3 VMIN VC(MAX) VC(SPAN) Voltage Applied to VMIN to Ensure Shutdown Mode VSHDN — Voltage Applied to VMIN to Release Shutdown Mode VREL Minimum Speed Threshold Hysteresis on VSHDN, VREL VIN, VMIN Input Leakage 1.4 1.5 V VC(MAX) V — VDD x 0.13 V VDD x 0.19 — — V VHYST — 0.03 x VDD — V IIN - 1.0 — +1.0 µA Note 1 fPWM 26 30 34 Hz CF = 1.0 µF VDD = 5V Pulse-Width Modulator PWM Frequency Note 1: 2: Ensured by design, tested during characterization. For VDD < 3.7V, tSTARTUP and tMP timers are typically 13/f. 2002-2013 Microchip Technology Inc. DS21756C-page 3 TC642B/TC647B ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Specifications: Unless otherwise specified, all limits are specified for -40°C < TA < +85°C, VDD = 3.0V to 5.5V. Parameters Sym Min Typ Max Units Conditions SENSE Input Threshold Voltage with Respect to GND VTH(SENSE) 50 70 90 mV Blanking time to ignore pulse due to VOUT turn-on tBLANK — 3.0 — µsec Output Low Voltage VOL — — 0.3 V Missing Pulse Detector Timer tMP — 32/f — sec Note 2 tSTARTUP — 32/f — sec Note 2 tDIAG — 3/f — sec SENSE Input FAULT Output Start-Up Timer Diagnostic Timer Note 1: 2: IOL = 2.5 mA Ensured by design, tested during characterization. For VDD < 3.7V, tSTARTUP and tMP timers are typically 13/f. TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise noted, all parameters apply at VDD = 3.0V to 5.5V Parameters Symbol Min Typ Max Units Specified Temperature Range TA -40 Operating Temperature Range TA -40 — +85 °C — +125 Storage Temperature Range TA °C -65 — +150 °C Conditions Temperature Ranges: Thermal Package Resistances: Thermal Package Resistance, 8-Pin MSOP JA — 200 — °C/W Thermal Package Resistance, 8-Pin SOIC JA — 155 — °C/W Thermal Package Resistance, 8-Pin PDIP JA — 125 — °C/W DS21756C-page 4 2002-2013 Microchip Technology Inc. TC642B/TC647B TIMING SPECIFICATIONS tSTARTUP VOUT FAULT SENSE FIGURE 1-1: TC642B/TC647B Start-Up Timing. 33.3 msec (CF = 1 µF) tDIAG tMP tMP VOUT FAULT SENSE FIGURE 1-2: Fan Fault Occurrence. tMP VOUT FAULT Minimum 16 pulses SENSE FIGURE 1-3: Recovery From Fan Fault. 2002-2013 Microchip Technology Inc. DS21756C-page 5 TC642B/TC647B C2 1 µF C1 0.1 µF + - VDD 8 R1 + - VIN 1 C3 0.1 µF VIN VDD K3 VOUT R6 7 + R2 + - VMIN 3 C4 0.1 µF VMIN VDD TC642B TC647B R5 K4 FAULT 6 + - 2 CF GND K1 C7 .01 µF K2 C6 1 µF 4 C8 0.1 µF Current limited voltage source SENSE R4 5 R3 Current limited voltage source VSENSE (pulse voltage source) C5 0.1 µF Note: C5 and C7 are adjusted to get the necessary 1 µF value. FIGURE 1-4: DS21756C-page 6 TC642B/TC647B Electrical Characteristics Test Circuit. 2002-2013 Microchip Technology Inc. TC642B/TC647B 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, VDD = 5V, TA = +25°C. 30.50 Pins 6 & 7 Open CF = 1 µF 160 Oscillator Frequency (Hz) 165 VDD = 5.5V IDD (µA) 155 150 145 VDD = 3.0V 140 135 130 CF = 1.0PF VDD = 3.0V 30.00 VDD = 5.5V 29.50 29.00 28.50 125 -40 -25 -10 5 20 35 50 65 80 95 -40 -25 -10 110 125 5 FIGURE 2-1: IDD vs. Temperature. FIGURE 2-4: Temperature. 16 35 50 80 95 110 125 PWM Frequency vs. Pins 6 & 7 Open CF = 1 µF 165 VDD = 5.0V 160 12 TA = +125ºC TA = +90ºC 155 VDD = 5.5V VDD = 4.0V IDD (µA) 10 8 VDD = 3.0V 6 150 145 TA = -5ºC 140 4 135 2 TA = -40ºC 130 0 125 0 50 100 150 200 250 300 350 400 450 500 550 600 3 3.5 4 VOL (mV) FIGURE 2-2: VOL. 4.5 5 5.5 VDD (V) PWM Sink Current (IOL) vs. IDD vs. VDD. FIGURE 2-5: 16 30 14 IDD Shutdown (µA) VDD = 5.0V 12 IOH (mA) 65 170 14 IOL (mA) 20 Temperature (ºC) Temperature (ºC) VDD = 4.0V 10 VDD = 5.5V 8 VDD = 3.0V 6 4 24 VDD = 3.0V 21 18 2 0 VDD = 5.5V 27 Pins 6 & 7 Open VMIN = 0V 15 0 100 200 300 400 500 600 700 800 -40 -25 VDD - VOH (mV) FIGURE 2-3: vs. VDD-VOH. PWM Source Current (IOH) 2002-2013 Microchip Technology Inc. -10 5 20 35 50 65 80 95 110 125 Temperature (ºC) FIGURE 2-6: Temperature. IDD Shutdown vs. DS21756C-page 7 TC642B/TC647B Note: Unless otherwise indicated, VDD = 5V, TA = +25°C. 70 74.0 IOL = 2.5 mA 73.5 VDD = 3.0V 50 VDD = 4.0V 40 30 VDD = 5.0V VDD = 5.5V 20 VDD = 3.0V 73.0 VTH(SENSE) (mV) FAULT VOL (mV) 60 VDD = 4.0V 72.5 72.0 71.5 VDD = 5.5V 71.0 VDD = 5.0V 70.5 70.0 10 69.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 Temperature (ºC) FIGURE 2-7: Temperature. 20 35 50 65 80 95 110 125 Temperature (ºC) FIGURE 2-10: Sense Threshold (VTH(SENSE)) vs. Temperature. FAULT VOL vs. 2.610 22 20 VDD = 5.0V 2.590 VDD = 3.0V 2.580 FAULT IOL (mA) 2.600 VC(MAX) (V) 18 VDD = 5.5V 16 VDD = 5.0V 14 12 VDD = 5.5V VDD = 4.0V 10 8 VDD = 3.0V 6 4 2 CF = 1 µF 0 2.570 -40 -25 -10 5 20 35 50 65 80 0 95 110 125 50 100 150 VC(MAX) vs. Temperature. FIGURE 2-8: 200 250 300 350 400 VOL (mV) Temperature (ºC) FAULT IOL vs. VOL. FIGURE 2-11: 1.220 45.00 CF = 1 µF VOH = 0.8VDD 40.00 VDD = 5.5V VOUT IOH (mA) VC(MIN) (V) 1.210 1.200 VDD = 5.0V VDD = 3.0V 1.190 35.00 25.00 VDD = 4.0V 20.00 15.00 10.00 1.180 VDD = 5.0V 30.00 VDD = 3.0V 5.00 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 Temperature (ºC) FIGURE 2-9: DS21756C-page 8 VC(MIN) vs. Temperature. 5 20 35 50 65 80 95 110 125 Temperature (ºC) FIGURE 2-12: vs. Temperature. PWM Source Current (IOH) 2002-2013 Microchip Technology Inc. TC642B/TC647B Note: Unless otherwise indicated, VDD = 5V, TA = +25°C. 30 25 VDD = 5.5V 2.625 VDD = 5.5V VDD = 4.0V 15 VDD = 5.0V 2.620 VDD = 5.0V 20 VOTF (V) VOUT IOL (mA) 2.630 VOL = 0.1VDD 10 2.615 VDD = 3.0V 2.610 2.605 VDD = 3.0V 5 2.600 0 2.595 -40 -25 -10 5 20 35 50 65 80 95 -40 -25 -10 110 125 5 Temperature (ºC) FIGURE 2-13: Temperature. PWM Sink Current (IOL) vs. FIGURE 2-16: Temperature. 0.80 VOTF Hysteresis (mV) VDD = 5.5V 0.70 VSHDN (V) 35 50 65 80 95 110 125 VOTF Threshold vs. 100 0.75 0.65 20 Temperature (ºC) VDD = 5.0V 0.60 0.55 VDD = 4.0V 0.50 0.45 VDD = 3.0V 0.40 95 90 VDD = 5.5V 85 VDD = 3.0V 80 75 0.35 0.30 70 -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (ºC) VREL (V) 1.00 0.95 0.90 0.85 0.80 0.75 0.70 0.65 0.60 0.55 0.50 0.45 0.40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (ºC) VSHDN Threshold vs. FIGURE 2-14: Temperature. -40 FIGURE 2-17: Over-Temperature Hysteresis (VOTF-HYS ) vs. Temperature. VDD = 5.5V VDD = 5.0V VDD = 4.0V VDD = 3.0V -40 -25 -10 5 20 35 50 65 80 95 110 125 Temperature (ºC) FIGURE 2-15: Temperature. VREL Threshold vs. 2002-2013 Microchip Technology Inc. DS21756C-page 9 TC642B/TC647B 3.0 PIN FUNCTIONS 3.5 The description of the pins are given in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE Pin Name 1 VIN Analog Input 2 CF Analog Output 3.1 Function The FAULT line goes low to indicate a fault condition. When FAULT goes low due to a fan fault, the output will remain low until the fan fault condition has been removed (16 pulses have been detected at the SENSE pin in a 32/f period). For the TC642B device, the FAULT output will also be asserted when the VIN voltage reaches the VOTF treshold of 2.62V (typical). This gives an over-temperature/100% fan speed indication. 3 VMIN Analog Input 4 GND Ground 5 SENSE Analog Input 3.6 6 FAULT Digital (Open-Drain) Output 7 VOUT Digital Output 8 VDD Power Supply Input VOUT is an active-high complimentary output and drives the base of an external NPN transistor (via an appropriate base resistor) or the gate of an N-channel MOSFET. This output has asymmetrical drive. During a fan fault condition, the VOUT output is continuously on. Analog Input (VIN) The thermistor network (or other temperature sensor) connects to VIN. A voltage range of 1.20V to 2.60V (typical) on this pin drives an active duty cycle of 0% to 100% on the VOUT pin. 3.2 Digital (Open-Drain) Output (FAULT) 3.7 Digital Output (VOUT) Power Supply Input (VDD) The VDD pin with respect to GND provides power to the device. This bias supply voltage may be independent of the fan power supply. Analog Output (CF) CF is the positive terminal for the PWM ramp generator timing capacitor. The recommended value for the CF capacitor is 1.0 µF for 30 Hz PWM operation. 3.3 Analog Input (VMIN) An external resistor divider connected to VMIN sets the minimum fan speed by fixing the minimum PWM duty cycle (1.20V to 2.60V = 0% to 100%, typical). The TC642B and TC647B devices enter shutdown mode when 0 VMIN VSHDN. During shutdown, the FAULT output is inactive and supply current falls to 30 µA (typical). 3.4 Analog Input (SENSE) Pulses are detected at SENSE as fan rotation chops the current through a sense resistor. The absence of pulses indicates a fan fault condition. DS21756C-page 10 2002-2013 Microchip Technology Inc. TC642B/TC647B 4.0 DEVICE OPERATION The TC642B/TC647B devices are a family of temperature proportional, PWM mode, fan speed controllers. Features of the family include minimum fan speed, fan auto-shutdown mode, fan auto-restart, remote shutdown, over-temperature indication and fan fault detection. The TC642B/TC647B family is slightly different from the original TC64X family, which includes the TC642, TC646, TC647, TC648 and TC649 devices. Changes have been made to adjust the operation of the device during a fan fault condition. The key change to the TC64XB family of devices (TC642B, TC647B, TC646B, TC648B, TC649B) is that the FAULT and VOUT outputs no longer “latch” to a state during a fan fault condition. The TC64XB family will continue to monitor the operation of the fan so that when the fan returns to normal operation, the fan speed controller will also return to normal operation (PWM mode). The operation and features of these devices are discussed in the following sections. 4.1 special heatsinking to remove the power being dissipated in the package. The other advantage of the PWM approach is that the voltage being applied to the fan is always near 12V. This eliminates any concern about not supplying a high enough voltage to run the internal fan components, which is very relevant in linear fan speed control. 4.2 PWM Fan Speed Control The TC642B and TC647B devices implement PWM fan speed control by varying the duty cycle of a fixed frequency pulse train. The duty cycle of a waveform is the on time divided by the total period of the pulse. For example, a 100 Hz waveform (10 ms) with an on time of 5.0 ms has a duty cycle of 50% (5.0 ms / 10.0 ms). This example is illustrated in Figure 4-1. t Fan Speed Control Methods The speed of a DC brushless fan is proportional to the voltage across it. This relationship will vary from fan to fan and should be characterized on an individual basis. The speed versus applied voltage relationship can then be used to set up the fan speed control algorithm. There are two main methods for fan speed control. The first is pulse width modulation (PWM) and the second is linear. Using either method, the total system power requirement to run the fan is equal. The difference between the two methods is where the power is consumed. The following example compares the two methods for a 12V, 120 mA fan running at 50% speed. With 6V applied across the fan, the fan draws an average current of 68 mA. ton toff D = Duty Cycle D = ton / t FIGURE 4-1: Waveform. t = Period t = 1/f f = Frequency Duty Cycle of a PWM The TC642B and TC647B generate a pulse train with a typical frequency of 30 Hz (CF = 1 µF). The duty cycle can be varied from 0% to 100%. The pulse train generated by the TC642B/TC647B device drives the gate of an external N-channel MOSFET or the base of an NPN transistor (shown in Figure 4-2). See Section 5.5, “Output Drive Device Selection”, for more information. Using a linear control method, there is 6V across the fan and 6V across the drive element. With 6V and 68 mA, the drive element is dissipating 410 mW of power. Using the PWM approach, the fan voltage is modulated at a 50% duty cycle with most of the 12V being dropped across the fan. With 50% duty cycle, the fan draws an RMS current of 110 mA and an average current of 72 mA. Using a MOSFET with a 1 RDS(on) (a fairly typical value for this low current), the power dissipation in the drive element would be: 12 mW (Irms2 * RDS(on)). Using a standard 2N2222A NPN transistor (assuming a Vce-sat of 0.8V), the power dissipation would be 58 mW (Iavg* Vce-sat). The PWM approach to fan speed control results in much less power dissipation in the drive element, allowing smaller devices to be used while not requiring 2002-2013 Microchip Technology Inc. 12V FAN VDD D TC642B VOUT TC647B QDRIVE G S GND FIGURE 4-2: PWM Fan Drive. DS21756C-page 11 TC642B/TC647B By modulating the voltage applied to the gate of the MOSFET (QDRIVE), the voltage that is applied to the fan is also modulated. When the VOUT pulse is high, the gate of the MOSFET is turned on, pulling the voltage at the drain of QDRIVE to zero volts. This places the full 12V across the fan for the ton period of the pulse. When the duty cycle of the drive pulse is 100% (full on, ton = t), the fan will run at full speed. As the duty cycle is decreased (pulse on time “ton” is lowered), the fan will slow down proportionally. With the TC642B and TC647B devices, the duty cycle is controlled by either the VIN or VMIN input, with the higher voltage setting the duty cycle. This is described in more detail in Section 5.5, “Output Drive Device Selection”. 2.8 Fan Start-up Often overlooked in fan speed control is the actual startup control period. When starting a fan from a non-operating condition (fan speed is zero revolutions per minute (RPM)), the desired PWM duty cycle or average fan voltage can not be applied immediately. Since the fan is at a rest position, the fan’s inertia must be overcome to get it started. The best way to accomplish this is to apply the full rated voltage to the fan for a minimum of one second. This will ensure that in all operating environments, the fan will start and operate properly. An example of the start-up timing is shown in Figure 1-1. A key feature of the TC642B/TC647B device is the start-up timer. When power is first applied to the device, (when the device is brought out of the shutdown mode of operation) the VOUT output will go to a high state for 32 PWM cycles (one second for CF = 1 F). This will drive the fan to full speed for this time-frame. During the start-up period, the SENSE pin is being monitored for fan pulses. If pulses are detected during this period, the fan speed controller will then move to PWM operation (see Section 4.5, “Minimum Fan Speed”, for more details on operation when coming out of start-up). If pulses are not detected during the startup period, the start-up timer is activated again. If pulses are not detected at the SENSE pin during this additional start-up period, the FAULT output will go low to indicate that a fan fault condition has occurred. See Section 4.7, “FAULT Output”, for more details. PWM Frequency & Duty Cycle Control (CF & VIN Pins) The frequency of the PWM pulse train is controlled by the CF pin. By attaching a capacitor to the CF pin, the frequency of the PWM pulse train can be set to the desired value. The typical PWM frequency for a 1.0 F capacitor is 30 Hz. The frequency can be adjusted by raising or lowering the value of the capacitor. The CF pin functions as a ramp generator. The voltage at this pin will ramp from 1.20V to 2.60V (typically) as a sawtooth waveform. An example of this is shown in Figure 4-3. CF = 1 µF 2.6 VCMAX 2.4 CF Voltage (V) 4.3 4.4 2.2 2.0 1.8 1.6 1.4 1.2 VCMIN 1.0 0 20 40 FIGURE 4-3: 80 100 CF Pin Voltage. The duty cycle of the PWM output is controlled by the voltage at the VIN input pin (or the VMIN voltage, whichever is greater). The duty cycle of the PWM output is produced by comparing the voltage at the VIN pin to the voltage ramp at the CF pin. When the voltage at the VIN pin is 1.20V, the duty cycle will be 0%. When the voltage at the VIN pin is 2.60V, the PWM duty cycle will be 100% (these are both typical values). The VIN to PWM duty cycle relationship is shown in Figure 4-4. The lower value of 1.20V is referred to as VCMIN and the 2.60V threshold is referred to as VCMAX. A calculation for duty cycle is shown in the equation below. The voltage range between VCMIN and VCMAX is characterized as VCSPAN and has a typical value of 1.4V with minimum and maximum values of 1.3V and 1.5V, respectively. EQUATION PWM DUTY CYCLE Duty Cycle (%) = DS21756C-page 12 60 Time (msec) (VIN - VCMIN) * 100 VCMAX - VCMIN 2002-2013 Microchip Technology Inc. TC642B/TC647B If the voltage at the VIN pin falls below 1.76V, the duty cycle of the VOUT output will not decrease below the 40% value that is now set by the voltage at the VMIN pin. In this manner, the fan will continue to operate at 40% speed even when the temperature (voltage at VIN) continues to decrease. 100 90 Duty Cycle (%) 80 70 60 50 40 30 20 10 0 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 VIN (V) FIGURE 4-4: cycle(Typical). VIN voltage vs. PWM duty The PWM duty cycle is also controlled by the VMIN pin See Section 4.5, “Minimum Speed (VMIN Pin)”, for more details on this function. 4.5 Minimum Speed (VMIN Pin) For the TC642B and TC647B devices, pin 3 is the VMIN pin. This pin is used for setting the minimum fan speed threshold. The minimum fan speed function provides a way to set a threshold for a minimum duty cycle on the VOUT output. This in turn produces a minimum fan speed for the user. The voltage range for the VMIN pin is the same as that for the VIN pin (1.20V to 2.60V). The voltage at the VMIN pin is set in this range so that as the voltage at the VIN pin decreases below the VMIN voltage, the output duty cycle will be controlled by the VMIN voltage. The following equation can be used to determine the necessary voltage at VMIN for a desired minimum duty cycle on VOUT. EQUATION VMIN VOLTAGE VMIN (V) = (DC * 1.4) + 1.20 100 DC = Desired Duty Cycle Example: If a minimum duty cycle of 40% is desired, the VMIN voltage should be set to: For the TC642B and TC647B devices, the VMIN pin is also used as the shutdown pin. The VSHDN and VREL threshold voltages are characterized in the “Electrical Characteristics” table of Section 1.0. If the VMIN pin voltage is pulled below the VSHDN threshold, the device will shut down (VOUT output goes to a low state, the FAULT pin is inactive). If the voltage on the VMIN pin then rises above the release threshold (VREL), the device will go through a Power-Up sequence. The Power-Up sequence is shown later in Figure 4-9. 4.6 VOUT Output (PWM Output) The VOUT output is a digital output designed for driving the base of a transistor or the gate of a MOSFET. The VOUT output is designed to be able to quickly raise the base current or the gate voltage of the external drive device to its final value. When the device is in shutdown mode, the VOUT output is actively held low. The output can be varied from 0% duty cycle (full off) to 100% duty cycle (full on). As previously discussed, the duty cycle of the VOUT output is controlled via the VIN input voltage along with the VMIN voltage. A base current-limiting resistor is required when using a transistor as the external drive device in order to limit the amount of drive current that is drawn from the VOUT output. The VOUT output can be directly connected to the gate of an external MOSFET. One concern when doing this, though, is that the fast turn-off time of the fan drive MOSFET can cause a problem. The fan motor looks like an inductor. When the MOSFET is turned off quickly, the current in the fan wants to continue to flow in the same direction. This causes the voltage at the drain of the MOSFET to rise. If there aren’t any clamp diodes internal to the fan, this voltage can rise above the drain-to-source voltage rating of the MOSFET. For this reason, an external clamp diode is suggested. This is shown in Figure 4-5. EXAMPLE 4-1: VMIN (V) = (40 * 1.4) + 1.20 100 VMIN = 1.76V 2002-2013 Microchip Technology Inc. DS21756C-page 13 TC642B/TC647B Clamp Diode FAN Q1 VOUT RSENSE GND Q1: N-Channel MOSFET FIGURE 4-5: 4.7 Clamp Diode for Fan. FAULT Output The FAULT output is an open-drain, active-low output. For the TC642B and TC647B devices, the FAULT output indicates when a fan fault condition has occurred. For the TC642B device, the FAULT output also indicates when an over-temperature (OTF) condition has occurred. For the TC642B device, an over-temperature condition is indicated (FAULT output is pulled low) when the VIN input reaches the VOTF threshold voltage (the VOTF threshold voltage is typically 20 mV higher than the VCMAX threshold and has 80 mV of hysteresis). This indicates that maximum cooling capacity has been reached (the fan is at full speed) and that an overheating situation can occur. When the voltage at the VIN input falls below the VOTF threshold voltage by the hysteresis value (VOTF-HYS), the FAULT output returns to the high-state (a pull-up resistor is needed on the FAULT output). During a fan fault condition, the FAULT output will remain low until the fault condition has been removed. During this time, the VOUT output is driven high continuously to attempt to restart the fan, and the SENSE pin is monitored for fan pulses. If a minimum of 16 pulses are detected at the SENSE input over a 32 cycle time period (one second for CF = 1.0 F), the fan fault condition no longer exists. The FAULT output is then released and the VOUT output returns to normal PWM operation, as dictated by the VIN and VMIN inputs. If the VMIN voltage is pulled below the VSHDN level during a fan fault condition, the FAULT output will be released and the VOUT output will be shutdown (VOUT = 0V). If the VMIN voltage then increases above the VREL threshold, the device will go through the normal start-up routine. If, during a fan fault condition, the voltage at the VIN pin drops below the VMIN voltage level, the TC642B/ TC647B device will continue to hold the FAULT line low and drive the VOUT output to 100% duty cycle. If the fan fault condition is then removed, the FAULT output will be released and the VOUT output will be driven to the duty cycle that is being commanded by the VMIN input. The sink current capability of the FAULT output is listed in the “Electrical Characteristics” table of Section 1.0. 4.8 Sensing Fan Operation (SENSE) The SENSE input is an analog input used to monitor the fan’s operation. It does this by sensing fan current pulses, which represent fan rotation. When a fan rotates, commutation of the fan current occurs as the fan poles pass the armatures of the motor. The commutation of the fan current makes the current waveshape appear as pulses. There are two typical current waveforms of brushless DC fan motors. These are shown in Figures 4-6 and 4-7. A fan fault condition is indicated when fan current pulses are no longer detected at the SENSE pin. Pulses at the SENSE pin indicate that the fan is spinning and conducting current. If pulses are not detected at the SENSE pin for 32 PWM cycles, the 3-cycle diagnostic timer is fired. This means that the VOUT output is high for 3 PWM cycles. If pulses are detected in this 3-cycle period, then normal PWM operation is resumed and no fan fault is indicated. If no pulses are detected in the 3-cycle period, the start-up timer is activated and the VOUT output is driven high for 32 PWM cycles. If pulses are detected during this timeframe, normal PWM operation is resumed. If no pulses are detected during this time frame, a fan fault condition exists and the FAULT output is pulled low. DS21756C-page 14 FIGURE 4-6: Fan Current With DC Offset And Positive Commutation Current. 2002-2013 Microchip Technology Inc. TC642B/TC647B across RSENSE and presents only the voltage pulse portion to the SENSE pin of the TC642B/TC647B devices. . The RSENSE and CSENSE values need to be selected so that the voltage pulse provided to the SENSE pin is 70 mV (typical) in amplitude. Be sure to check the sense pulse amplitude over all operating conditions (duty cycles), as the current pulse amplitude will vary with duty cycle. See Section 5.0, “Applications Information”, for more details on selecting values for RSENSE and CSENSE. Key features of the SENSE pin circuitry are an initial blanking period after every VOUT pulse and an initial pulse blanker. The TC642B/TC647B sense circuitry has a blanking period that occurs at the turn-on of each VOUT pulse. During this blanking period, the sense circuitry ignores any pulse information that is seen at the SENSE pin input. This stops the TC642B/TC647B device from falsely sensing a current pulse which is due to the fan drive device turn-on. FIGURE 4-7: Fan Current With Commutation Pulses To Zero. The SENSE pin senses positive voltage pulses that have an amplitude of 70 mV (typical value). When a pulse is detected, the missing pulse detector timer is reset. As previously stated, if the missing pulse detector timer reaches the time for 32 cycles, the loop for diagnosing a fan fault is engaged (diagnostic timer, then the start-up timer). Both of the fan current waveshapes that are shown in Figures 4-6 and 4-7 can be sensed with the sensing scheme shown in Figure 4-8. The initial pulse blanker is also implemented to stop false sensing of fan current pulses. When a fan is in a locked rotor condition, the fan current no longer commutates, it simply flows through one fan winding and is a DC current. When a fan is in a locked rotor condition and the TC642B/TC647B device is in PWM mode, it will see one current pulse each time the VOUT output is turned on. The initial pulse blanker allows the TC642B/ TC647B device to ignore this pulse and recognize that the fan is in a fault condition. 4.9 FAN TC64XB RISO VOUT Behavioral Algorithms The behavioral algorithm for the TC642B/TC647B devices is shown in Figure 4-9. The behavioral algorithm shows the step-by-step decision-making process for the fan speed controller operation. The TC642B and TC647B devices are very similar with one exception: the TC647B device does not implement the over-temperature portion of the algorithm. SENSE GND FIGURE 4-8: Current. CSENSE (0.1 µF typical) RSENSE Sensing Scheme For Fan The fan current flowing through RSENSE generates a voltage that is proportional to the current. The CSENSE capacitor removes any DC portion of the voltage 2002-2013 Microchip Technology Inc. DS21756C-page 15 TC642B/TC647B Power-Up Normal Operation Power-on Reset FAULT = 1 Clear Missing Pulse Detector Yes Shutdown VOUT = 0 VMIN < VSHDN? Yes No Shutdown VOUT = 0 VMIN < VSHDN? VMIN > VREL? No No VMIN > VREL? No Yes Yes Fire Start-up Timer (1 sec) VIN > VOTF? Fire Start-up Timer (1 sec) No Fan Pulse Detected? Yes Power-Up FAULT = 0 Yes No Yes Fan Pulse Detected? Normal Operation TC642B Only VOUT Proportional to Greater of VIN or VMIN No Fan Fault Yes Fan Pulse Detected? No No M.P.D. Expired? Yes Fire Diagnostic Timer (100 msec) Yes Fan Fault FAULT = Low, VOUT = High Fan Pulse Detected? Yes No Fire Start-up Timer (1 sec) Fan Pulse Detected? No VMIN<VSHDN? Yes Shutdown VOUT = 0 Fan Fault No No No VMIN > VREL? Yes Power-Up 16 Pulses Detected? Yes Normal Operation FIGURE 4-9: DS21756C-page 16 TC642B/TC647B Behavioral Algorithm. 2002-2013 Microchip Technology Inc. TC642B/TC647B 5.0 APPLICATIONS INFORMATION 5.1 Setting the PWM Frequency The PWM frequency of the VOUT output is set by the capacitor value attached to the CF pin. The PWM frequency will be 30 Hz (typical) for a 1 µF capacitor. The relationship between frequency and capacitor value is linear, making alternate frequency selections easy. VDD IDIV RT R1 VIN As stated in previous sections, the PWM frequency should be kept in the range of 15 Hz to 35 Hz. This will eliminate the possibility of having audible frequencies when varying the duty cycle of the fan drive. A very important factor to consider when selecting the PWM frequency for the TC642B/TC647B devices is the RPM rating of the selected fan and the minimum duty cycle that the fan will be operating at. For fans that have a full speed rating of 3000 RPM or less, it is desirable to use a lower PWM frequency. A lower PWM frequency allows for a longer time period to monitor the fan current pulses. The goal is to be able to monitor at least two fan current pulses during the on time of the VOUT output. Example: The system design requirement is to operate the fan at 50% duty cycle when ambient temperatures are below 20°C. The fan full speed RPM rating is 3000 RPM and has four current pulses per rotation. At 50% duty cycle, the fan will be operating at approximately 1500 RPM. EQUATION 60 1000 Time for one revolution (msec.) = ------------------------ = 40 1500 If one fan revolution occurs in 40 msec, each fan pulse occurs 10 msec apart. In order to detect two fan current pulses, the on time of the VOUT pulse must be at least 20 msec. With the duty cycle at 50%, the total period of one cycle must be at least 40 msec, which makes the PWM frequency 25 Hz. For this example, a PWM frequency of 20 Hz is recommended. This would define a CF capacitor value of 1.5 µF. 5.2 Temperature Sensor Design As discussed in previous sections, the VIN analog input has a range of 1.20V to 2.60V (typical), which represents a duty cycle range on the VOUT output of 0% to 100%, respectively. The VIN voltages can be thought of as representing temperatures. The 1.20V level is the low temperature at which the system requires very little cooling. The 2.60V level is the high temperature, for which the system needs maximum cooling capability (100% fan speed). One of the simplest ways of sensing temperature over a given range is to use a thermistor. By using an NTC thermistor, as shown in Figure 5-1, a temperature variant voltage can be created. 2002-2013 Microchip Technology Inc. R2 FIGURE 5-1: Circuit. Temperature Sensing Figure 5-1 represents a temperature-dependent voltage divider circuit. RT is a conventional NTC thermistor, while R1 and R2 are standard resistors. R1 and RT form a parallel resistor combination that will be referred to as RTEMP (RTEMP = R1 * RT / R1 + RT). As the temperature increases, the value of Rt decreases and the value of RTEMP will decrease with it. Accordingly, the voltage at VIN increases as temperature increases, giving the desired relationship for the VIN input. R1 helps to linearize the response of the sense network and aids in obtaining the proper VIN voltages over the desired temperature range. An example of this is shown in Figure 5-2. If less current draw from VDD is desired, a larger value thermistor should be chosen. The voltage at the VIN pin can also be generated by a voltage output temperature sensor device. The key is to get the desired VIN voltage to system (or component) temperature relationship. The following equations apply to the circuit in Figure 5-1. EQUATION V DD R2 V T1 = -----------------------------------------RTEMP T1 + R 2 V DD R2 V T2 = -----------------------------------------RTEMP T2 + R 2 In order to solve for the values of R1 and R2, the values for VIN, and the temperatures at which they are to occur, need to be selected. The variables T1 and T2 represent the selected temperatures. The value of the thermistor at these two temperatures can be found in the thermistor data sheet. With the values for the thermistor and the values for VIN, there are now two equations from which the values for R1 and R2 can be found. DS21756C-page 17 TC642B/TC647B Example: The following design goals are desired: • Duty Cycle = 50% (VIN = 1.90 V) with Temperature (T1) = 30°C • Duty Cycle = 100% (VIN = 2.60 V) with Temperature (T2) = 60°C Using a 100 k thermistor (25°C value), look up the thermistor values at the desired temperatures: • RT (T1) = 79428 @ 30°C • RT (T2) = 22593 @ 60°C Substituting these numbers into the given equations produces the following numbers for R1 and R2. • R1 = 34.8 k • R2 = 14.7 k 3.500 3.000 100 2.500 80 2.000 60 NTC Thermistor 100 k: @ 25ºC 40 20 20 30 40 50 60 70 80 90 1.000 RISO VOUT 715 0.000 100 Temperature (ºC) FIGURE 5-2: How Thermistor Resistance, VIN, and RTEMP Vary With Temperature. Figure 5-2 graphs RT, RTEMP (R1 in parallel with RT) and VIN versus temperature for the example shown above. Thermistor Selection As with any component, there are a number of sources for thermistors. A listing of companies that manufacture thermistors can be found at www.temperatures.com/ thermivendors.html. This website lists over forty suppliers of thermistor products. A brief list is shown here. - Thermometrics® - Quality Thermistor™ - Ametherm® - Sensor Scientific™ - U.S. Sensors™ - Vishay® - Advanced Thermal Products™ - muRata® DS21756C-page 18 FAN 1.500 0.500 RTEMP 0 5.3 The FanSense Network (comprised of RSENSE and CSENSE) allows the TC642B and TC647B devices to detect commutation of the fan motor. RSENSE converts the fan current into a voltage. CSENSE AC couples this voltage signal to the SENSE pin. The goal of the sense network is to provide a voltage pulse to the SENSE pin that has a minimum amplitude of 90 mV. This will ensure that the current pulse caused by the fan commutation is recognized by the TC642B/TC647B device. A 0.1 µF ceramic capacitor is recommended for CSENSE. Smaller values will require that larger sense resistors be used. Using a 0.1 µF capacitor results in reasonable values for RSENSE. Figure 5-3 illustrates a typical SENSE network. 4.000 VIN Voltage 120 FanSense Network (RSENSE and CSENSE) VIN (V) Network Resistance (k:) 140 5.4 SENSE CSENSE (0.1 µF typical) RSENSE Note: See Table 5-1 for RSENSE values. FIGURE 5-3: Typical Sense Network. The required value of RSENSE will change with the current rating of the fan and the fan current waveshape. A key point is that the current rating of the fan specified by the manufacturer may be a worst-case rating, with the actual current drawn by the fan being lower. For the purposes of setting the value for RSENSE, the operating fan current should be measured to get the nominal value. This can be done by using an oscilloscope current probe or by using a voltage probe with a low value resistor (0.5). Another good tool for this exercise is the TC642 Evaluation Board. This board allows the RSENSE and CSENSE values to be easily changed while allowing the voltage waveforms to be monitored to ensure the proper levels are being reached. Table 5-1 shows values of RSENSE according to the nominal operating current of the fan. The fan currents are average values. If the fan current falls between two of the values listed, use the higher resistor value. 2002-2013 Microchip Technology Inc. TC642B/TC647B TABLE 5-1: FAN CURRENT VS. RSENSE Nominal Fan Current (mA) RSENSE() 50 9.1 100 4.7 150 3.0 200 2.4 250 2.0 300 1.8 350 1.5 400 1.3 450 1.2 500 1.0 The values listed in Table 5-1 are for fans that have the fan current waveshape shown in Figure 4-7. With this waveshape, the average fan current is closer to the peak value, which requires the resistor value to be higher. When using a fan that has the fan current waveshape shown in Figure 4-6, the resistor value can often be decreased since the current peaks are higher than the average and it is the AC portion of the voltage that gets coupled to the SENSE pin. The key point when selecting an RSENSE value is to try to minimize the value in order to minimize the power dissipation in the resistor. In order to do this, it is critical to know the waveshape of the fan current and not just the average value. Figure 5-4 shows some typical waveforms for the fan current and the voltage at the SENSE pin. Another important factor to consider when selecting the RSENSE value is the fan current value during a locked rotor condition. When a fan is in a locked rotor condition (fan blades are stopped even though power is being applied to the fan), the fan current can increase dramatically, often 2.5 to 3.0 times the normal operating fan current. This will effect the power rating of the RSENSE resistor selected. When selecting the fan for the application, the current draw of the fan during a locked rotor condition should be considered, especially if multiple fans are being used in the application. There are two main types of fan designs when looking at fan current draw during a locked rotor condition. The first is a fan that will simply draw high DC currents when put into a locked rotor condition. Many older fans were designed this way. An example of this is a fan that draws an average current of 100 mA during normal operation. In a locked rotor condition, this fan will draw 250 mA of average current. For this design, the RSENSE power rating must be sized to handle the 250 mA condition. The fan bias supply must also take this into account. The second style design, which represents many of the newer fan designs today, acts to limit the current in a locked rotor condition by going into a pulse mode of operation. An example of the fan current waveshape for this style fan is shown in Figure 5-5. The fan represented in Figure 5-5 is a Panasonic®, 12V, 220 mA fan. During the on time of the waveform, the fan current is peaking up to 550 mA. Due to the pulse mode operation, however, the actual RMS current of the fan is very near the 220 mA rating. Because of this, the power rating for the RSENSE resistor does not have to be oversized for this application. FIGURE 5-4: Typical Fan Current and SENSE Pin Waveforms. 2002-2013 Microchip Technology Inc. DS21756C-page 19 TC642B/TC647B FIGURE 5-5: 5.5 Fan Current During a Locked Rotor Condition. Output Drive Device Selection The TC642B/TC647B is designed to drive an external NPN transistor or N-channel MOSFET as the fan speed modulating element. These two arrangements are shown in Figure 5-7. For lower current fans, NPN transistors are a very economical choice for the fan drive device. It is recommended that, for higher current fans (300 mA and above), MOSFETs be used as the fan drive device. Table 5-2 provides some possible part numbers for use as the fan drive element. The following is recommended: • Ask how the fan is designed. If the fan has clamp diodes internally, this problem will not be seen. If the fan does not have internal clamp diodes, it is a good idea to put one externally (Figure 5-6). Putting a resistor between VOUT and the gate of the MOSFET will also help slow down the turn-off and limit this condition. When using a NPN transistor as the fan drive element, a base current-limiting resistor must be used, as is shown in Figure 5-7. When using MOSFETs as the fan drive element, it is very easy to turn the MOSFETs on and off at very high rates. Because the gate capacitances of these small MOSFETs are very low, the TC642B/TC647B can charge and discharge them very quickly, leading to very fast edges. Of key concern is the turn-off edge of the MOSFET. Since the fan motor winding is essentially an inductor, once the MOSFET is turned off, the current that was flowing through the motor wants to continue to flow. If the fan does not have internal clamp diodes around the windings of the motor, there is no path for this current to flow through, and the voltage at the drain of the MOSFET may rise until the drain-to-source rating of the MOSFET is exceeded. This will most likely cause the MOSFET to go into avalanche mode. Since there is very little energy in this occurrence, it will probably not fail the device, but it would be a long-term reliability issue. DS21756C-page 20 FAN VOUT Q1 RSENSE GND Q1: N-Channel MOSFET FIGURE 5-6: Off. Clamp Diode For Fan Turn- 2002-2013 Microchip Technology Inc. TC642B/TC647B Fan Bias Fan Bias FAN FAN RBASE VOUT Q1 Q1 VOUT RSENSE RSENSE GND GND a) Single Bipolar Transistor FIGURE 5-7: TABLE 5-2: Device MMBT2222A b) N-Channel MOSFET Output Drive Device Configurations. FAN DRIVE DEVICE SELECTION TABLE (NOTE 2) Package Max Vbe sat / Vgs(V) Min hfe VCE/VDS (V) Fan Current (mA) Suggested Rbase () SOT-23 1.2 50 40 150 800 MPS2222A TO-92 1.2 50 40 150 800 MPS6602 TO-92 1.2 50 40 500 301 SI2302 SOT-23 2.5 NA 20 500 Note 1 MGSF1N02E SOT-23 2.5 NA 20 500 Note 1 SI4410 SO-8 4.5 NA 30 1000 Note 1 SI2308 SOT-23 4.5 NA 60 500 Note 1 Note 1: A series gate resistor may be used in order to control the MOSFET turn-on and turn-off times. 2: These drive devices are suggestions only. Fan currents listed are for individual fans. 5.6 Bias Supply Bypassing and Noise Filtering The bias supply (VDD) for the TC642B/TC647B devices should be bypassed with a 1.0 F ceramic capacitor. This capacitor will help supply the peak currents that are required to drive the base/gate of the external fan drive devices. As the VIN pin controls the duty cycle in a linear fashion, any noise on this pin can cause duty-cycle jittering. For this reason, the VIN pin should be bypassed with a 0.01 µF capacitor. In order to keep fan noise off of the TC642B/TC647B device ground, individual ground returns for the TC642B/TC647B and the low side of the fan current sense resistor should be used. 2002-2013 Microchip Technology Inc. 5.7 Design Example/Typical Application The system has been designed with the following components and criteria. System inlet air ambient temperature ranges from 0ºC to 50ºC. At 20ºC and below, it is desired to have the system cooling stay at a constant level. At 20ºC, the fan should be run at 40% of its full fan speed. Full fan speed should be reached when the ambient air is 40ºC. The system has a surface mount, NTC-style thermistor in a 1206 package. The thermistor is mounted on a daughtercard, which is directly in the inlet air stream. The thermistor is a NTC, 100 k @ 25ºC, Thermometrics® part number NHQ104B425R5. The given Beta for the thermistor is 4250. The system bias voltage to run the fan controller is 5V and the fan voltage is 12V. DS21756C-page 21 TC642B/TC647B The fan used in the system is a Panasonic®, Panaflo®series fan, model number FBA06T12H. A fault indication is desired when the fan is in a locked rotor condition. This signal is used to indicate to the system that cooling is not available and a warning should be issued to the user. No fault indication from the fan controller is necessary for an over-temperature condition, as this is being reported elsewhere. Step 1: Gathering Information. The first step in the design process is to gather the needed data on the fan and thermistor. For the fan, it is also a good idea to look at the fan current waveform, as indicated earlier in the data sheet. Fan Information: Panasonic number: FBA06T12H - Voltage = 12V - Current = 145 mA (number from data sheet ) FIGURE 5-9: fan current. FBA06T12H Locked rotor From Figure 5-9 it is seen that in a locked-rotor fault condition, the fan goes into a pulsed current mode of operation. During this mode, when the fan is conducting current, the peak current value is 360 mA for periods of 200 msec. This is significantly higher than the average full fan speed current shown in Figure 5-8. However, because of the pulse mode, the average fan current in a locked-rotor condition is lower and was measured at 68 mA. The RMS current during this mode, which is necessary for current sense resistor (RSENSE) value selection, was measured at 154 mA. This is slightly higher than the RMS value during full fan speed operation. FIGURE 5-8: waveform. FBA06T12H fan current From the waveform in Figure 5-8, the fan current has an average value of 120 mA, with peaks up to 150 mA. This information will help in the selection of the RSENSE and CSENSE values later on. Also of interest for the RSENSE selection value is what the fan current does in a locked-rotor condition. Thermistor Information: Thermometrics part number: NHQ104B425R5 Resistance Value: 100 k @ 25ºC Beta Value (): 4250 From this information, the thermistor values at 20ºC and 40ºC must be found. This information is needed in order to select the proper resistor values for R1 and R2 (see Figure 5-13), which sets the VIN voltage. The equation for determining the thermistor values is shown below: EQUATION TO – T RT = R TO exp -----------------------T ² TO RT0 is the thermistor value at 25ºC. T0 is 298.15 and T is the temperature of interest. All temperatures are given in degrees kelvin. Using this equation, the values for the thermistor are found to be: - RT (20ºC) = 127,462 - RT (40ºC) = 50,520 DS21756C-page 22 2002-2013 Microchip Technology Inc. TC642B/TC647B Step 3: Setting the PWM Frequency. The fan is rated at 4200 RPM with a 12V input. Since the goal is to run to a 40% duty cycle (roughly 40% fan speed), which equates to approximately 1700 RPM, we can assume one full fan revolution occurs every 35 msec. The fan being used is a four-pole fan that gives four current pulses per revolution. Knowing this and viewing test results at 40% duty cycle, two fan current pulses were always seen during the PWM on time with a PWM frequency of 30 Hz. For this reason, the CF value is selected to be 1.0 F. Step 4: Setting the VIN Voltage. From the design criteria, the desired duty cycle at 20ºC is 40%, while full fan speed should be reached at 40ºC. Based on a VIN voltage range of 1.20V to 2.60V, which represents 0% to 100% duty cycle, the 40% duty cycle voltage can be found using the following equation: - R1 = 237 k - R2 = 45.3 k A graph of the VIN voltage, thermistor resistance and RTEMP resistance versus temperature for this configuration is shown in Figure 5-10. 400 5.00 4.50 350 4.00 VIN 300 3.50 250 3.00 200 2.50 150 2.00 NTC Thermistor 100 k: @ 25ºC 100 VIN (V) The requirements for the fan controller are that it have minimum speed capability at 20ºC and also indicate a fan fault condition. No over-temperature indication is necessary. Based on these specifications, the proper selection is the TC647B device. Using standard 1% resistor values, the selected R1 and R2 values are: Network Resistance (k:) Step 2: Selecting the Fan Controller. 1.50 1.00 50 RTEMP 0.50 0 0.00 0 10 20 30 40 50 60 70 80 90 Temperature (ºC) FIGURE 5-10: Thermistor Resistance, VIN, and RTEMP vs. Temperature. Step 5: Setting the Minimum Speed Voltage (VMIN). EQUATION VIN = (DC * 1.4V) + 1.20V DC = Desired Duty Cycle Using the above equation, the VIN values are calculated to be: - VIN (40%) = 1.76V - VIN (100%) = 2.60V Using these values in combination with the thermistor resistance values calculated earlier, the R1 and R2 resistor values can now be calculated using the following equation: Setting the voltage for the minimum speed is accomplished using a simple resistor voltage divider. The criteria for the voltage divider in this design is that it draw no more than 100 µA of current. The required minimum speed voltage was determined earlier in the selection of the VIN voltage at 40% duty cycle, since this was also set at the temperature which minimum speed is to occur (20ºC). - VMIN = 1.76V Given this desired setpoint, and knowing the desired divider current, the following equations can be used to solve for the resistor values for R3 and R4: EQUATION EQUATION VDD R2 V T1 = -----------------------------------------R TEMP T1 + R 2 IDIV = VDD R2 V T2 = -----------------------------------------R TEMP T2 + R 2 VMIN = RTEMP is the parallel combination of R1 and the thermistor. V(T1) represents the VIN voltage at 20ºC and V(T2) represents the VIN voltage at 40ºC. Solving the equations simultaneously yields the following values (VDD = 5V): 5V R3 + R4 5V*R4 R3 + R4 Using the equations above, the resistor values for R3 and R4 are found to be: - R3 = 32.4 k - R4 = 17.6 k - R1 = 238,455 - R2 = 45,161 2002-2013 Microchip Technology Inc. DS21756C-page 23 TC642B/TC647B Using standard 1% resistor values yields the following values: . - R3 = 32.4 k - R4 = 17.8 k Step 6: Selecting the Fan Drive Device (Q1). Since the fan operating current is below 200 mA, a transistor or MOSFET can be used as the fan drive device. In order to reduce component count and current draw, the drive device for this design is chosen to be a N-channel MOSFET. Selecting from Table 5-2, there are two MOSFETs that are good choices: the MGSF1N02E and the SI2302. These devices have the same pinout and are interchangeable for this design. Step 7: Selecting the RSENSE and CSENSE Values. The goal again for selecting these values is to ensure that the signal at the SENSE pin is 90 mV in amplitude under all operating conditions. This will ensure that the pulses are detected by the TC642B/TC647B device and that the fan operation is detected. The fan current waveform is shown in Figure 5-8 and, as discussed previously, with a waveform of this shape, the current sense resistor values shown in Table 5-1 are good reference values. Given that the average fan operating current was measured to be 120 mA, this falls between two of the values listed in the table. For reference purposes, both values have been tested and these results are shown in Figures 5-11 (4.7) and 5-12 (3.0). The selected CSENSE value is 0.1 F as this provides the appropriate coupling of the voltage to the SENSE pin. FIGURE 5-12: SENSE pin voltage with 3.0 sense resistor. Since the 3.0 value of sense resistor provides the proper voltage to the SENSE pin, it is the correct choice for this solution as it will also provide the lowest power dissipation and the most voltage to the fan. Using the RMS fan current that was measured previously, the power dissipation in the resistor during a fan fault condition is 71 mW (Irms2 * RSENSE). This number will set the wattage rating of the resistor that is selected. The selected value will vary depending upon the derating guidelines that are used. Now that all the values have been selected, the schematic representation of this design can be seen in Figure 5-13. . FIGURE 5-11: SENSE pin voltage with 4.7 sense resistor. DS21756C-page 24 2002-2013 Microchip Technology Inc. TC642B/TC647B +5V R1 237 k 1V IN CB 0.01 µF 8 VDD Panasonic® Fan 12V, 140 mA FBA06T12H R5 10 k FAULT R2 45.3 k +12V +C VDD 1.0 µF Thermometrics® 100 k @25°C NHQ104B425R5 6 +5V R3 32.4 k R4 17.8 k FIGURE 5-13: TC647B 3 V MIN CB 0.01 µF 2 C F CF 1.0 µF SENSE GND Q1 SI2302 or MGSF1N02E VOUT 7 5 CSENSE 0.1 µF RSENSE 3.0 4 Design Example Schematic. Bypass capacitor CVDD is added to the design to decouple the bias voltage. This is good to have, especially when using a MOSFET as the drive device. This helps to give a localized low-impedance source for the current required to charge the gate capacitance of Q1. Two other bypass capacitors, labeled as CB, were also added to decouple the VIN and VMIN nodes. These were added simply to remove any noise present that might cause false triggerings or PWM jitter. R5 is the pull-up resistor for the FAULT output. The value for this resistor is system-dependent. 2002-2013 Microchip Technology Inc. DS21756C-page 25 TC642B/TC647B 6.0 PACKAGING INFORMATION 6.1 Package Marking Information 8-Lead PDIP (300 mil) XXXXXXXXX NNN YYWW 8-Lead SOIC (150 mil) XXXXXX XXXYYWW NNN XXXXXX YWWNNN Legend: XX...X Y YY WW NNN e3 * DS21756C-page 26 TC642BCPA 025 0215 Example: TC642B COA0215 025 Example: 8-Lead MSOP Note: Example: TC642B 215025 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 2002-2013 Microchip Technology Inc. TC642B/TC647B 8-Lead Plastic Dual In-line (P) – 300 mil (PDIP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E1 D 2 n 1 E A2 A L c A1 B1 p eB B Units Dimension Limits n p Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic A A2 A1 E E1 D L c § B1 B eB MIN .140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 5 5 INCHES* NOM MAX 8 .100 .155 .130 .170 .145 .313 .250 .373 .130 .012 .058 .018 .370 10 10 .325 .260 .385 .135 .015 .070 .022 .430 15 15 MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10 MIN MAX 4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 2002-2013 Microchip Technology Inc. DS21756C-page 27 TC642B/TC647B 8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 p D 2 B n 1 h 45× c A2 A f L Units Dimension Limits n p Number of Pins Pitch Overall Height Molded Package Thickness Standoff § Overall Width Molded Package Width Overall Length Chamfer Distance Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic A A2 A1 E E1 D h L f c B MIN .053 .052 .004 .228 .146 .189 .010 .019 0 .008 .013 0 0 A1 INCHES* NOM 8 .050 .061 .056 .007 .237 .154 .193 .015 .025 4 .009 .017 12 12 MAX .069 .061 .010 .244 .157 .197 .020 .030 8 .010 .020 15 15 MILLIMETERS NOM 8 1.27 1.35 1.55 1.32 1.42 0.10 0.18 5.79 6.02 3.71 3.91 4.80 4.90 0.25 0.38 0.48 0.62 0 4 0.20 0.23 0.33 0.42 0 12 0 12 MIN MAX 1.75 1.55 0.25 6.20 3.99 5.00 0.51 0.76 8 0.25 0.51 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-012 Drawing No. C04-057 DS21756C-page 28 2002-2013 Microchip Technology Inc. TC642B/TC647B 8-Lead Plastic Micro Small Outline Package (MS) (MSOP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 p D 2 B n 1 α A2 A c φ A1 (F) L β Units Dimension Limits n p MIN INCHES NOM MAX MILLIMETERS* NOM 8 0.65 BSC 0.85 0.75 0.00 4.90 BSC 3.00 BSC 3.00 BSC 0.60 0.40 0.95 REF 0° 0.08 0.22 5° 5° - MIN Number of Pins 8 Pitch .026 BSC Overall Height A .043 A2 Molded Package Thickness .037 .030 .033 Standoff A1 .006 .000 Overall Width E .193 TYP. Molded Package Width E1 .118 BSC Overall Length D .118 BSC Foot Length L .016 .024 .031 Footprint (Reference) F .037 REF φ 0° 8° Foot Angle c .003 .006 .009 Lead Thickness .009 .012 .016 Lead Width B α 5° 15° Mold Draft Angle Top β Mold Draft Angle Bottom 5° 15° *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. MAX 1.10 0.95 0.15 0.80 8° 0.23 0.40 15° 15° JEDEC Equivalent: MO-187 Drawing No. C04-111 2002-2013 Microchip Technology Inc. DS21756C-page 29 TC642B/TC647B 6.2 Taping Form Component Taping Orientation for 8-Pin MSOP Devices User Direction of Feed PIN 1 W P Standard Reel Component Orientation for 713 or TR Suffix Device Carrier Tape, Number of Components Per Reel and Reel Size: Package 8-Pin MSOP Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 12 mm 8 mm 2500 13 in. Component Taping Orientation for 8-Pin SOIC Devices User Direction of Feed PIN 1 W P Standard Reel Component Orientation for 713 or TR Suffix Device Carrier Tape, Number of Components Per Reel and Reel Size: Package 8-Pin SOIC DS21756C-page 30 Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 12 mm 8 mm 2500 13 in. 2002-2013 Microchip Technology Inc. TC642B/TC647B 7.0 REVISION HISTORY Revision C (January 2013) Added a note to each package outline drawing. 2002-2013 Microchip Technology Inc. DS21756C-page 31 TC642B/TC647B DS21756C-page 32 2002-2013 Microchip Technology Inc. TC642B/TC647B PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device Device: X /XX Temperature Range Package TC642B: PWM Fan Speed Controller with Minimum Fan Speed, Fan Restart, Fan Fault Detection, and Over-Temp Detection. TC647B: PWM Fan Speed Controller with Minimum Fan Speed, Fan Restart, and Fan Fault Detection. Temperature Range: E = -40°C to +85°C Package: OA PA UA 713 = = = = Examples: a) b) c) d) a) b) c) d) TC642BEOA: SOIC package. TC642BEOA713: Tape and Reel, SOIC package. TC642BEPA: PDIP package. TC642BEUA: MSOP package. TC647BEOA: SOIC package. TC647BEPA: PDIP package. TC647BEUA: MSOP package. TC647BEUATR: Tape and Reel, MSOP package. Plastic SOIC, (150 mil Body), 8-lead Plastic DIP (300 mil Body), 8-lead Plastic Micro Small Outline (MSOP), 8-lead Tape and Reel (SOIC and MSOP) (TC642B only) TR = Tape and Reel (SOIC and MSOP) (TC647B only) Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. Your local Microchip sales office The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. 2002-2013 Microchip Technology Inc. DS21756C-page 33 TC642B/TC647B NOTES: DS21756C-page 34 2002-2013 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MTP, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. Analog-for-the-Digital Age, Application Maestro, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O, Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA and Z-Scale are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. GestIC and ULPP are registered trademarks of Microchip Technology Germany II GmbH & Co. & KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2002-2013, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 9781620768983 QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 == 2002-2013 Microchip Technology Inc. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. 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