APPLICATION NOTE Comparing Spansion® S25FL512S with Macronix MX25L51245G 1. Introduction This application note compares the Macronix MX25L51245G and Spansion S25FL512S serial flash devices. This document does not provide detailed information on each individual device, but highlights the similarities and differences between them. The comparison covers the general features, performance, packaging, command set, and other parameters. The information in this document is based on datasheets listed in Section 9. Newer versions of the datasheets may override the contents of this document. 2. Feature Comparison Both flash device families have similar features and functions as shown in Table 2-1. Significant differences are highlighted in blue. Table 2-1: Features Feature Supply Voltage Range READ (1-1-1) (1) FAST_READ (1-1-1)(1) DREAD/DOR (1-1-2)(1) 2READ/DIOR (1-2-2)(1) QREAD/QOR (1-1-4)(1) 4READ/QIOR (1-4-4)(1) QPI (4-4-4)(1) DDR (Double Data Rate) Page Program Size Sector Size Block Size Security OTP Size Program/Erase Suspend & Resume Read Burst Mode Adjustable Output Driver FastBoot/AutoBoot Mode Configurable Dummy Cycles S/W Reset Command HOLD# Pin RESET# Pin Advanced Sector Protection Manufacturer ID Device ID Package(3) Macronix MX25L51245G 2.7V ~ 3.6V Yes Yes Yes Yes Yes Yes Yes Yes 256B 4KB 32KB and 64KB 512B Yes Yes Yes Yes Yes Yes Yes Yes C2h 20h/1Ah 16-SOP (300mil) 8-WSON (8x6mm) 24-BGA (5x5 ball) Spansion S25FL512S 2.7V~3.6V / 1.65~3.6V VIO(4) Yes Yes Yes Yes Yes Yes Yes 512B 256KB 1024B Yes Yes Yes Yes Yes Yes(2) Yes 01h 02h/20h 16-PIN SOP (300mil) 24-BGA (5x5 ball, 4x6 ball) Note: 1. x-y-z in I/O mode indicates the number of active pins used for op-code(x), address(y) and data(z). 2. Macronix offers the RESET# pin in all packages, but Spansion only offers the RESET# pin in 16-SOP and 24-BGA packages. P/N: AN0327 1 Ver.1. Aug. 26, 2014 APPLICATION NOTE 3. See datasheet for full list of packages available. 4. VIO support not offered in all package options. See datasheet ordering information. 3. Performance Comparison Tables 3-1 and 3-2 show MX25L51245G and S25FL512S AC performance. Table 3-1: Read Performance Parameter Normal Read Fast Read 1-1-1 DREAD 1-1-2 2READ 1-2-2 QREAD 1-1-4 4READ 1-4-4 Fast DTR Read 1-1-1-DTR 2 I/O DTR Read 1-2-2-DTR 4 I/O DTR Read 1-4-4-DTR 15pf tCLQV / tV 30pf Macronix MX25L51245G 66MHz 166MHz(1) 166MHz 166MHz(2) 166MHz 133MHz(2) 83Mhz 83Mhz 100Mhz 6ns 8ns Spansion S25FL512S 50MHz 133MHz 104MHz 104MHz 104MHz 104MHz 80MHz 80MHz 80MHz 6.5ns(3.0V-3.6V) 8ns Note: 1. MX25L51245G Fast Read runs up to 133MHz with default dummy cycles and 166MHz with 10 dummy cycles. 2. MX25L51245G Multi I/O runs up to 133MHz with 8 dummy cycles and 166MHz with 10 dummy cycles. 3. All values in Table 3-1 are maximum. Table 3-2: Write Performance Parameter 4KB 32KB Erase 64KB 256KB Chip Erase / Bulk Erase Byte Program Page Program/Erase Cycles (Endurance) P/N: AN0327 Macronix MX25L51245G 30ms(Typ)/200ms(Max) 0.15s(Typ)/1s(Max) 0.28s(Typ)/2s(Max) 200s(Typ)/600s(Max) 25us(Typ)/60us(Max) 0.25ms(Typ)/0.75ms(Max) Spansion S25FL512S 0.52s(Typ)/2.6s(Max) 103s(Typ)/460s(Max) 0.34ms(512B)(Typ)/0.75ms(Max) 100,000(Typ) 100,000(Typ) 2 Ver.1. Aug. 26, 2014 APPLICATION NOTE 4. DC Characteristics Both flash series characteristics are similar in primary features and functions. However, there are minor differences in DC characteristics which should be evaluated to determine their significance. Table 4-1: Read / Write Current Parameter Read Current @ 1xI/O Standby Current Deep Power Down Current Write Current Macronix MX25L51245G 15mA @ 84MHz 100uA 20uA 25mA Spansion S25FL512S 16mA @ 50MHz 100uA N/A 100mA Note: All values in Table 4-1 are maximum. Table 4-2 compares I/O voltage levels between the two families. Spansion supports a Versatile I/O Voltage on some package options while Macronix does not. Table 4-2: Input / Output Voltage Parameter VIO Voltage Input Low Voltage (VIL) Input High Voltage (VIH) Output Low Voltage (VOL) Output High Voltage (VOH) P/N: AN0327 Macronix MX25L51245G Spansion S25FL512S -0.5V (min.) / 0.8 (max.) 0.7VCC (min.) / VCC+0.4V (max.) 0.2V (max.) VCC-0.2 (min.) 1.65V ~ VCC+200mV -0.5V (min.) / 0.2VIO(max.) 0.7VIO (min.) / VIO+0.4V (max.) 0.15VIO (max.) 0.85VIO (min.) 3 Ver.1. Aug. 26, 2014 APPLICATION NOTE 5. Hardware Consideration The pin assignments of the 16-SOP and 24-BGA packages are identical, with the exception of the VIO and HOLD# pin functions which are unavailable on the Macronix chips. The figures below show the common packages and the pin assignments for the Macronix and Spansion devices. 16-SOP (300mil) NC/SIO3 HOLD#/IO3 1 16 SCK VCC 2 15 SI/IO0 NC RESET#/RFU 3 14 VIO/RFU NC DNU 4 13 NC DNU DNU 5 12 DNU 11 DNU RFU 6 11 DNU 7 10 GND CS# 7 10 VSS 8 9 SO/IO1 8 9 16 SCLK SI/SIO0 3 15 14 NC 4 13 DNU 5 MX25L51245G 12 DNU 6 CS# SO/SIO1 VCC 1 2 RESET# WP#/SIO2 Reset# signal is internal pull high DNU means Do Not Use S25FL512S WP# /IO2 DNU means Do Not Use RFU means Reserve for Future Use Reset# and Hold# signals are internal pull high 24-BGA (5x5 ball) MX25L51245G S25FL512S 5 NC NC NC NC NC 5 NC NC NC NC NC 4 Reset # VCC WP#/ SIO2 NC/SI O3 NC 4 Reset #/RFU VCC WP#/I O2 HOLD #/IO3 VIO/R FU 3 NC GND NC SI/SIO 0 NC 3 NC VSS RFU SI/IO0 NC SCK CS# SO/IO 1 NC DNU DNU DNU NC B C D E NC 2 NC 1 A NC SCLK CS# SO/SI O1 NC 2 NC NC NC NC 1 B C D E A Reset# signal is internal pull high P/N: AN0327 NC Reset# and Hold# signals are internal pull high DNU means Do Not Use 4 Ver.1. Aug. 26, 2014 APPLICATION NOTE 6. Software Considerations Basic command set and 4-Byte command set of both flash families are similar. Status Register and Configuration Register definitions are slightly different. Minor algorithm modifications may be necessary depending on your application. The most common commands are the same as shown in Tables 6-1 and 6-2. Notable differences are highlighted in blue in Table 6-3. Table 6-1: Core Command Set Comparison Instruction Type Read Write Read ID Register Instruction Macronix Spansion MX25L51245G S25FL512S READ READ FAST_READ FAST_READ DREAD DOR 2READ DIOR QREAD QOR 4READ QIOR FASTDTRD DDRFR 2DTRD DDRDIOR 4DTRD DDRQIOR WREN WREN WRDI WRDI PP PP SE 4K BE SE CE RDID RDSR BE RDID RDSR1 WRSR WRR Description Normal Read Fast Read (1-1-1) 1I/2O Read (1-1-2) 2xI/O Read (1-2-2) 1I/4O Read (1-1-4) 4xI/O Read (1-4-4) Fast DT Read(1-1-1-DTR) Dual I/O DT Read(1-2-2-DTR) Quad I/O DT Read(1-4-4-DTR) Write Enable Write Disable Page Program Sector Erase Block Erase 32KB/64KB/256KB (1) Chip Erase / Bulk Erase Read Identification Read Status Register Write Status & Configuration Registers Op-code Macronix Spansion MX25L51245G S25FL512S 03h 03h 0Bh 0Bh 3Bh 3Bh BBh BBh 6Bh 6Bh EBh EBh 0Dh 0Dh BDh BDh EDh EDh 06h 06h 04h 04h 02h 02h 20h 52h/(32KB), D8h D8h/(64KB) (256KB) 60h or C7h 60h or C7h 9Fh 9Fh 05h 05h 01h 01h Notes: 1. Block Erase command 52h erases 32KBytes, D8h erases 64KBytes on the MX25L51245G, but erases 256KBytes on the S25FL512S. Table 6-2: 4-Byte Command Set Comparison Instruction Macronix Spansion MX25L51245G S25FL512S READ4B 4READ Fast Read4B 4FAST_READ DREAD4B 4DOR 2READ4B 4DIOR QREAD4B 4QOR Write 4READ4B 4QIOR PP4B 4PP QPP4B 4PP4B SE4B BE4B 4SE Notes: Address fields are 4-Bytes. Instruction Type P/N: AN0327 Description Normal Read Fast Read (1-1-1) 1I/2O Read (1-1-2) 2xI/O Read (1-2-2) 1I/4O Read (1-1-4) 4xI/O Read (1-4-4) Page Program (1-1-1) Quad Page Program (1-1-4) Quad Input Page Program (1-4-4) Sector Erase Block Erase 64KB/256KB 5 Op-code Macronix Spansion MX25L51245G S25FL512S 13h 13h 0Ch 0Ch 3Ch 3Ch BCh BCh 6Ch 6Ch ECh ECh 12h 12h 34h 3Eh 21h DCh DCh Ver.1. Aug. 26, 2014 APPLICATION NOTE Table 6-3: Command Comparison Instruction Type Other Write Register Advanced Sector Protection Instruction Description Macronix Spansion MX25L51245G S25FL512S EN4B Enter 4-Byte Mode EX4B Exit 4-Byte Mode RSTEN Reset Enable RST RESET Software Reset Memory MBR Mode Bit Reset EQIO Enable QPI (1) CLSR Clear Status Register Fail Flags PGM/ERS PGSP Program Suspend Suspend PGM/ERS PGRS Program Resume Resume PGM/ERS ERSP Erase Suspend Suspend PGM/ERS ERRS Erase Resume Resume RDSFDP RFSDP Read SFDP REMS REMS Read Electronic Manufacturer Signature RES RES Read Electronic ID QPP Quad Page Program (1-1-4) 4PP Quad Page Program (1-4-4) OTPP OTP Program OTPR OTP Read ENSO Enter Secured OTP EXSO Exit Secured OTP RDSR2 Read Status Register-2 RDCR RDCR Read Configuration Register RDSCUR Read Security Register WRSCUR Write Security Register ESFBR Erase Fast Boot Register RDFBR ABRD Read FastBoot/AutoBoot Register WRFBR ABWR Write FastBoot/AutoBoot Register RDDPB DYBRD Read DPB (DYB) Register WRDPB DYBWR Write DPB (DYB) Register RDSPB PPBRD Read SPB (PPB) Status WRSPB PPBP SPB (PPB) Bit Program ESSPB PPBE Erase All SPB (PPB) Write Lock Register WRLR ASPP (Advanced Sector Protection Register) Read Lock Register RDLR ASPRD (Advanced Sector Protection Register) RDPASS PASSRD Read Password Register WRPASS PASSP Write Password Register PASSULK PASSU Password Unlock WPSEL Write Protect Selection Op-code Macronix Spansion MX25L51245G S25FL512S B7h (2) E9h 66h 99h F0h FFh FFh (2) 35h (2) 30h B0h 30h 85h (2) 8Ah B0h 30h 75h (2) 5Ah 90h ABh (2) 38h B1h C1h (2) 15h (2) 2Bh (2) 2Fh 18h 16h(2) (2) 17h E0h E1h E2h E3h E4h 7Ah 5Ah 90h ABh (2) 32h or 38h 42h 4Bh 07h (2) 35h 14h (2) 15h E0h E1h E2h E3h E4h 2Fh 2Dh 2Bh 27h 28h 29h 68h E7h E8h (2) E9h - 1. MX25L51245G devices automatically clear the program or erase fail flags and do not have an explicit command to do so. 2. MX25L51245G and S25FL512S devices share the same command opcode, but the command function is different. P/N: AN0327 6 (2) 2Ch Ver.1. Aug. 26, 2014 (2) APPLICATION NOTE 6-1. Page Program Length Alignment Page program maximum lengths are different between the MX25L51245G and the S25FL512S. Software modification is necessary if the longer page program length is being used. The Page Program length should be set to a maximum of 256 bytes and the 1 to 256 bytes to be programmed must fall within the same 256-Byte page boundary. 6-2. Sector Sizes The MX25L51245G has uniform 64KB blocks that are each subdivided into two 32KB blocks and sixteen 4KB sectors. The S25FL512S has uniform 256KB blocks. Software adjustments are needed to accommodate the smaller blocks provided by the MX25L51245G. Please refer to the datasheets listed in Section 9 for memory organization details. 6-3. Secure OTP Differences Both device families provide a secure One Time Programmable (OTP) area outside of the main memory array for user defined storage. The sizes, features, and access methods are different. The S25FL512S has commands to directly read (OTPR) and program (OTPW) the OTP area and does not need to explicitly open this area for read and write operations. The MX25L51245G operates in the OTP area using normal read and program instructions after explicitly opening the OTP area with the Enter Secured OTP (ENSO) command. While the OTP area is open, the main array is not accessible. When finished in the OTP area, the Exit Secure OTP (EXSO) command must be issued to return to the Read Main Array mode. The MX25L51245G OTP area has 512 bytes available for user data. The user may permanently lock the whole OTP area to prevent new data from being stored there. This area can optionally be programmed with user supplied data and factory locked by Macronix. 6-4. Block Protection Mode The S25FL512S and the MX25L51245G use Status Register BP (Block Protect) bits to software write protect areas of memory. The S25FL512S only has three BP bits (BP2-BP0) and the granularity of the protected areas is very large. The MX25L51245G uses four BP bits (BP3-BP0) and provides a finer protection area granularity. 6-5. Advanced Sector Protection Mode Both device families offer an Advanced Sector Protection mode used to provide volatile and nonvolatile individual sector (or block) protection and an optional password protection mode, but there are differences that need to be accommodated if this feature is used. P/N: AN0327 7 Ver.1. Aug. 26, 2014 APPLICATION NOTE 6-6 Status Register, Configuration Register, and Security Register Both devices use registers to configure the flash for operation modes, but there are some differences that designers need to be aware of as software modifications may be needed. A detailed register comparison is shown in Table 6-4, Table 6-5, and Table 6-6. If a detailed functional description of register bits is required, please refer to the datasheets listed in Section 9. Table 6-4: Status Register Register Bit Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Macronix MX25L51245G WIP; 1=write operation WEL; 1=write enable BP0; BP protection BP1; BP protection BP2; BP protection BP3; BP protection QE; 1=Quad mode enable SRWD; 1=SR write disable Spansion S25FL512S WIP; 1=write operation WEL; 1=write enable BP0; BP protection BP1; BP protection BP2; BP protection E_ERR; 1=erase fail*1 P_ERR; 1=program fail*1 SRWD; 1=SR write disable Note: 1. Macronix MX25L51245G Program and Erase Error bits are located in bits 5 and 6 of its Security Register. Table 6-5: Configuration Register Register Bit Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Macronix MX25L51245G ODS0; Output driver strength ODS1; Output driver strength ODS2; Output driver strength TB; 1=Bottom area protect PBE; 1=Preamble bit Enable 4 BYTE; 1=4byte address DC0; Dummy cycle DC1; Dummy cycle Spansion S25FL512S FREEZE; 1=BPx write disable QUAD; 1=Quad mode enable RFU BPNV; 1=BPx is Volatile RFU TBPROT; 1=BP protect at the bottom LC0; Latency cycle LC1; Latency cycle Table 6-6: Security Register/Status Register2(SR2) Register Bit Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 P/N: AN0327 Macronix MX25L51245G 4Kb Secured OTP; 1=factory lock LDSO; 1=OTP lock down PSB; 1=Program suspend ESB; 1=Erase suspend Reserved P_FAIL; 1=Program fail E_FAIL; 1=Erase fail WPSEL; 1=Individual WP 8 Spansion S25FL512S PS; 1=Program suspend ES; 1=Erase suspend RFU RFU RFU RFU RFU RFU Ver.1. Aug. 26, 2014 APPLICATION NOTE 6-7. Manufacturer and Device Identification Numbers Table 6-7 compares the Manufacturer and Device IDs returned by the RDID and REMS commands. Table 6-7: Manufacturer and Device ID Command Type RDID 9Fh REMS 90h Macronix MX25L51245G C2h/20h/1Ah C2h/19h Spansion S25FL512S 01h/02h/20h 01h/19h 7. Address Protocol Support 7-1. Addressing Memory Beyond 16MBytes Both devices support various methods to address memory beyond 128Mb (16MBytes). Some of the methods employed are different, but the concepts are the same. Depending on the application, the software may require minor modifications. Please refer to the datasheets listed in Section 9 for more details. 7-1-1. 4-Byte Address Mode 4-Byte Address mode uses the legacy command set but the address field is 4-Bytes instead of 3-Bytes. The Macronix device uses the EN4B and EX4B commands to enter and exit 4-Byte address mode. On the Spansion device, 4-Byte address mode is entered or exited by setting or clearing bit-7 in the Bank Address Register (BAR). After making the mode selection, the appropriate number of address bytes (3-Byte or 4-Byte) must be used for all commands that require an address argument (with the exception of the Read SFDP command (5Ah), which always uses 3-Byte addressing). 7-1-2. Bank Address Mode Bank Address Mode uses one or more of the low-order bits of a bank address register to supply address bits A24 and above for legacy read, program, and erase commands that use 3-Byte addressing. The serial flash internally appends the low-order bits from the bank address to the 3-Byte address to form an extended address. This allows access to addresses beyond 128Mb while still using the legacy command set and 3-Byte addressing. In Spansion devices the bank register is the BAR. In Macronix devices the bank address register is the Extended Address Register (EAR). 7-1-3. 4-Byte Address Command Set Both Macronix and Spansion devices support a 4-Byte Address Command Set which always uses 4-Bytes of address, eliminating the need to enter or exit 4-Byte Address mode. The 4-Byte Address Command Set (see Table 6-2) supplements the legacy 3-Byte command set. P/N: AN0327 9 Ver.1. Aug. 26, 2014 APPLICATION NOTE 8. Summary The Macronix MX25L51245G and Spansion S25FL512S have similar commands, functions, and features. Additionally, the supported package types have identical footprints and nearly identical pin out definitions. Software modification may be needed to accommodate to differences in the page program size and the block erase size. Additional software modification may be needed due to differences in status and configuration register bit assignments and the commands used to access them. A more detailed analysis should be done if functions such as Advanced Sector Protection, HOLD# pin, VIO voltage, DDR, or AutoBoot are used. 9. References Table 9-1 shows the datasheet versions used for comparison in this application note. For the most current, detailed specification, please refer to the Macronix Website at Table 9-1: Datasheet Version Datasheet MX25L51245G Location Website S25FL512S Website Data Issued Jul. 09, 2014 Version Rev. 1.1 Jan. 8, 2014 Rev. 07 10. Appendix Table 10-1 shows the basic part number and package information cross reference between Macronix MX25L51245G and Spansion S25FL512S parts. Table 10-1: Part Number Cross Reference Density Macronix Part No. MX25L51245GMI-10G 512Mb(1) MX25L51245GZ2I-10G MX25L51245GXDI-10G Spansion Part No. S25FL512SAGMFI/01/G1/R1(1)/(2) S25FL512SDPMFI01/G1(1)/(2) S25FL512SDSMFI01(1)/(2) S25FL512SAGBHI/21/A1/C1(1)/(3) S25FL512SDPBHI21/C1(1)/(3) S25FL512SDSBHI21(1)/(3) Package Dimension 16-SOP 300 mil 8-WSON 8x6mm 24-BGA 5x5 ball Note: 1. AG: 133MHz; DP: DTR 66MHz; DS: DTR 80MHz 2. 01: 16-SOP/24-BGA with 256KB sector; G1: 16-SOP/24-BGA with RESET# & 256KB sector; R1: 16-SOP with RESET#, VIO & 256KB sector. 3. 21: 24-BGA with 256KB sector; A1: 24-BGA with RESET# & 256KB sector; C1: 24-BGA with RESET#, VIO & 256KB sector. P/N: AN0327 10 Ver.1. Aug. 26, 2014 APPLICATION NOTE Except for customized products which have been expressly identified in the applicable agreement, Macronix's products are designed, developed, and/or manufactured for ordinary business, industrial, personal, and/or household applications only, and not for use in any applications which may, directly or indirectly, cause death, personal injury, or severe property damages. In the event Macronix products are used in contradicted to their target usage above, the buyer shall take any and all actions to ensure said Macronix's product qualified for its actual use in accordance with the applicable laws and regulations; and Macronix as well as it’s suppliers and/or distributors shall be released from any and all liability arisen therefrom. Copyright© Macronix International Co., Ltd. 2014. All rights reserved, including the trademarks and tradename thereof, such as Macronix, MXIC, MXIC Logo, MX Logo, Integrated Solutions Provider, NBit, Nbit, NBiit, Macronix NBit, eLiteFlash, HybridNVM, HybridFlash, XtraROM, Phines, KH Logo, BE-SONOS, KSMC, Kingtech, MXSMIO, Macronix vEE, Macronix MAP, Rich Au-dio, Rich Book, Rich TV, and FitCAM. The names and brands of third party referred thereto (if any) are for identification purposes only For the contact and order information, please visit Macronix’s Web site at: http://www.macronix.com P/N: AN0327 11 Ver.1. Aug. 26, 2014