NTMFS4C09N D

NTMFS4C09N
Power MOSFET
30 V, 52 A, Single N−Channel, SO−8 FL
Features
•
•
•
•
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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V(BR)DSS
RDS(ON) MAX
ID MAX
5.8 mW @ 10 V
Applications
30 V
• CPU Power Delivery
• DC−DC Converters
52 A
8.5 mW @ 4.5 V
D (5−8)
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±20
V
ID
16.4
A
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
PD
2.51
W
Continuous Drain
Current RqJA ≤ 10 s
(Note 1)
TA = 25°C
ID
25.3
A
Power Dissipation
RqJA ≤ 10 s (Note 1)
Continuous Drain
Current RqJA
(Note 2)
TA = 80°C
S (1,2,3)
12.3
TA = 80°C
Steady
State
TA = 25°C
PD
6.0
TA = 25°C
ID
9.0
TA = 80°C
A
1
6.8
0.76
W
Continuous Drain
Current RqJC
(Note 1)
TC = 25°C
ID
52
A
Power Dissipation
RqJC (Note 1)
TC = 25°C
PD
25.5
TA = 25°C, tp = 10 ms
IDM
146
A
IDmax
80
A
TJ,
TSTG
−55 to
+150
°C
IS
23
A
Drain to Source dV/dt
dV/dt
7.0
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, VGS = 10 V, IL = 29 Apk,
L = 0.1 mH, RGS = 25 W) (Note 3)
EAS
42
mJ
TL
260
°C
TC =80°C
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
S
SO−8 FLAT LEAD
S
CASE 488AA
S
STYLE 1
G
W
PD
TA = 25°C
MARKING
DIAGRAMS
D
TA = 25°C
Current Limited by Package
N−CHANNEL MOSFET
19.0
Power Dissipation
RqJA (Note 2)
Pulsed Drain
Current
G (4)
39
D
4C09N
AYWZZ
D
D
A
Y
W
ZZ
= Assembly Location
= Year
= Work Week
= Lot Traceabililty
W
ORDERING INFORMATION
Device
Package
Shipping†
NTMFS4C09NT1G
SO−8 FL
(Pb−Free)
1500 /
Tape & Reel
NTMFS4C09NT3G
SO−8 FL
(Pb−Free)
5000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
3. Parts are 100% tested at TJ = 25°C, VGS = 10 V, IL = 20 Apk, EAS = 20 mJ.
© Semiconductor Components Industries, LLC, 2015
November, 2015 − Rev. 5
1
Publication Order Number:
NTMFS4C09N/D
NTMFS4C09N
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction−to−Case (Drain)
Parameter
RqJC
4.9
Junction−to−Ambient – Steady State (Note 4)
RqJA
49.8
Junction−to−Ambient – Steady State (Note 5)
RqJA
164.6
Junction−to−Ambient – (t ≤ 10 s) (Note 4)
RqJA
21.0
Unit
°C/W
4. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
5. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
(transient)
V(BR)DSSt
VGS = 0 V, ID(aval) = 8.4 A,
Tcase = 25°C, ttransient = 100 ns
34
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
IDSS
V
V
14.4
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25°C
1.0
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
±100
nA
2.1
V
ON CHARACTERISTICS (Note 6)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
1.3
VGS(TH)/TJ
RDS(on)
4.8
mV/°C
VGS = 10 V
ID = 30 A
4.6
5.8
VGS = 4.5 V
ID = 18 A
6.8
8.5
Forward Transconductance
gFS
VDS = 1.5 V, ID = 15 A
Gate Resistance
RG
TA = 25°C
50
0.3
1.0
mW
S
2.0
W
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
1252
VGS = 0 V, f = 1 MHz, VDS = 15 V
610
pF
126
Capacitance Ratio
CRSS/CISS
Total Gate Charge
QG(TOT)
10.9
Threshold Gate Charge
QG(TH)
1.9
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
5.4
Gate Plateau Voltage
VGP
3.1
V
22.2
nC
Total Gate Charge
VGS = 0 V, VDS = 15 V, f = 1 MHz
VGS = 4.5 V, VDS = 15 V; ID = 30 A
QG(TOT)
VGS = 10 V, VDS = 15 V; ID = 30 A
0.101
3.4
nC
SWITCHING CHARACTERISTICS (Note 7)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
tr
td(OFF)
10
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
32
16
6.0
6. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
7. Switching characteristics are independent of operating junction temperatures.
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2
ns
NTMFS4C09N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (Note 7)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
tr
td(OFF)
7.0
VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
28
ns
20
4.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.79
TJ = 125°C
0.65
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 10 A
1.1
V
31
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
QRR
15
16
15
6. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
7. Switching characteristics are independent of operating junction temperatures.
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3
ns
nC
NTMFS4C09N
TYPICAL CHARACTERISTICS
100
4.5 V to 10 V
100
4.0 V
90
TJ = 25°C
90
3.8 V
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
80
70
3.6 V
60
3.4 V
50
40
3.2 V
30
3.0 V
20
2.8 V
VGS = 2.6 V
10
70
60
50
40
30
20
TJ = 125°C
1
2
3
4
0
5
0.5 1.0 1.5 2.0
2.5 3.0
3.5 4.0
4.5 5.0 5.5
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
0.026
0.024
0.022
ID = 30 A
0.020
0.018
0.016
0.014
0.012
0.010
0.008
0.006
0.004
0.002
3
TJ = −55°C
TJ = 25°C
0
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
80
10
0
4
5
6
7
8
9
10
0.009
0.008
TJ = 25°C
VGS = 4.5 V
0.007
0.006
0.005
VGS = 10 V
0.004
0.003
10
20
30
40
50
60
70
VGS, GATE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1600
1.7
1.6
1.5
VGS = 10 V
ID = 30 A
1400
C, CAPACITANCE (pF)
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE (W)
VDS = 5 V
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
−50
VGS = 0 V
TJ = 25°C
Ciss
1200
1000
Coss
800
600
400
Crss
200
0
−25
0
25
50
75
100
125
150
0
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Capacitance Variation
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4
30
NTMFS4C09N
1000
10
VGS = 10 V
VDD = 15 V
ID = 15 A
QT
8
t, TIME (ns)
VGS, GATE−TO−SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS
6
QGD
QGS
4
VGS = 10 V
VDD = 15 V
ID = 30 A
TJ = 25°C
2
0
2
4
6
8
10 12 14
16
18
10
td(on)
1
22 24
20
10
100
QG, TOTAL GATE CHARGE (nC)
RG, GATE RESISTANCE (W)
Figure 7. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
Figure 8. Resistive Switching Time Variation
vs. Gate Resistance
20
1000
18
0 V < VGS < 10 V
VGS = 0 V
16
ID, DRAIN CURRENT (A)
IS, SOURCE CURRENT (A)
td(off)
tf
tr
1
0
14
TJ = 25°C
TJ = 125°C
12
10
8
6
4
2
0
100
10 ms
100 ms
10
1 ms
10 ms
1
RDS(on) Limit
Thermal Limit
Package Limit
0.1
dc
0.01
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0.01
0.1
1
10
100
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 9. Diode Forward Voltage vs. Current
Figure 10. Maximum Rated Forward Biased
Safe Operating Area
80
20
18
ID = 20 A
70
16
60
14
50
12
GFS (S)
EAS, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
100
10
8
40
30
6
20
4
10
2
0
0
25
50
75
100
125
150
0
5
10
15
20
25
30
35
TJ, STARTING JUNCTION TEMPERATURE (°C)
ID (A)
Figure 11. Maximum Avalanche Energy vs.
Starting Junction Temperature
Figure 12. GFS vs. ID
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5
40
45
50
NTMFS4C09N
TYPICAL CHARACTERISTICS
ID, DRAIN CURRENT (A)
100
10
1
1.E−08 1.E−07
1.E−06
1.E−05
1.E−04
1.E−03
PULSE WIDTH (sec)
Figure 13. Avalanche Characteristics
100
Duty Cycle = 0.5
R(t) (°C/W)
10
1
0.2
0.1
0.05
0.02
0.01
0.1
Single Pulse
0.01
0.000001
0.00001
0.0001
0.001
0.1
0.01
PULSE TIME (sec)
Figure 14. Thermal Response
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6
1
10
100
1000
NTMFS4C09N
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE M
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
A
2
B
D1
2X
0.20 C
4X
E1
q
E
2
c
1
2
3
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
A1
4
TOP VIEW
C
SEATING
PLANE
DETAIL A
0.10 C
A
0.10 C
SIDE VIEW
DETAIL A
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
RECOMMENDED
SOLDERING FOOTPRINT*
2X
0.495
0.10
b
C A B
0.05
c
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.00
5.15
5.30
4.70
4.90
5.10
3.80
4.00
4.20
6.00
6.30
6.15
5.70
5.90
6.10
3.45
3.65
3.85
1.27 BSC
0.51
0.575
0.71
1.20
1.35
1.50
0.51
0.575
0.71
0.125 REF
3.00
3.40
3.80
0_
−−−
12 _
4.560
8X
2X
1.530
e/2
e
L
1
4
3.200
K
4.530
E2
PIN 5
(EXPOSED PAD)
L1
M
1.330
2X
0.905
1
G
0.965
D2
4X
1.000
4X 0.750
BOTTOM VIEW
1.270
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
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or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
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For additional information, please contact your local
Sales Representative
NTMFS4C09N/D