AND8489/D A Simple 12 Vout, 22 W, Off-line Forward Converter Using ON Semiconductor's NCP1027/1028 Monolithic Switcher http://onsemi.com APPLICATION NOTE Prepared by: Frank Cathell ON Semiconductor Introduction Circuit Operation Most power supplies with less than 100 W output utilize a flyback switching topology due to the simplicity and low cost of the circuit implementation. As with any power topology there are trade−offs which usually involve circuit simplicity versus performance and cost. In the case of the forward converter topology, the trade−off usually involves the addition of a freewheeling diode and output choke. It should be noted, however, that this “addition”, depending on the source and cost of these extra components, can actually be a “wash” due to the increased output capacitance generally required for a flyback topology. Flybacks usually require multiple low impedance output capacitors and even a small inductor in a pi−filter to minimize output ripple. Since the forward converter utilizes a choke−capacitor output filter, the output capacitor requirements are minimized due to the output choke being the main filtering element. In addition, the peak−to−average switching currents in the forward converter can be almost half of that of an equivalent flyback design which lowers EMI generation and allows the use of a lower current rated MOSFET and output rectifier in the overall converter design. The low power forward converter in this application note is intended for use in white goods, E−meters, and low power communications equipment where low EMI generation and high efficiency are required. This particular example provides 12 V at up to 2 A peak output current with an efficiency of greater than 80% for typical loads over the entire universal ac input range (90 to 265 Vac). The ON Semiconductor NCP1027/1028 series of monolithic switcher is implemented as a single switch forward converter using a resistor−capacitor−diode (RCD) reset scheme which allows for a very simple transformer design (no reset winding) and a maximum duty cycle of up to 80% at minimum input line. An off−the−shelf slug type inductor is utilized for the output choke and minimal output capacitance is required for less than 100 mV of output ripple. The schematic of the forward converter circuit is shown in Figure 1. A conducted EMI input filter is comprised of C1, C2, C3, C10, L1 and L2. L1 and C10 comprise the common mode filter while the remaining components form the differential mode filter. R1 serves as an optional inrush limiter during initial power supply turn−on when C3 and C4 are discharged. The resistor should be a wire wound or a similar construction that can tolerate the high joule surge rating that will be present at initial supply turn−on. Metal film resistors are not recommended due to eventual transient stress fatigue. The primary control chip can be either the NCP1028 or NCP1027. The 1027 version has a built in OVP sensor on the VCC pin that detects if the chip’s operating VCC becomes excessive and will latch the controller off under such a condition. The 1028 does not have this feature and was used in this design because the VCC for the chip is derived by a simple peak detector circuit composed of D7, R8 and C13 which is driven by the auxiliary winding on T1. R8 limits the maximum current to the chip while C9 is the main VCC filter capacitor. Since the peak value of the “raw” VCC voltage on C13 varies with input line, an output OVP function is not usable here, hence, use of the NCP1028. The NCP1027 could be used if indirect output OVP sensing were desired by changing the auxiliary peak detector circuit to a forward converter type rectifier with L/C filter network (integrator) by adding a freewheeling diode after D7 and inserting L4, a 15 mH to 25 mH choke (RF type choke) between the cathode of D7 and C13. The voltage on C13 would then be regulated against line changes and would provide a representative dc analog of the main output voltage. R8 General Specifications Topology: Single Switch Forward Converter Input: 90 to 270 Vac (universal input) Output: 12 V at 2 A max. (22 W continuous) Output Ripple: less than 100 mV peak−to−peak at full load Combined Load/Line Regulation: ±2% Efficiency: 80% minimum from half to full load Conducted EMI Compliance: EN55022 Level B (average) Over−temperature and overcurrent protection © Semiconductor Components Industries, LLC, 2011 April, 2011 − Rev. 2 1 Publication Order Number: AND8488/D C1 C2 100nF ”x” L1 3.9 mH R2 1M 0.5W C11 1 nF R11 2M R12 2M C3 2 R9 82K R10 28K L2 470 uH 10 uF, 400Vdc D1−D4 1N4007 C4 1 7 8 4 5 2 U1 NCP1028 (100 kHz) 3 47uF 400V D5 1N4937 R4 47K, 1/2W 2 C13 2.2uF, 100V D7 10 uF 25V + C9 R8 3.9K, 1/4W 3 http://onsemi.com 7 9 R13 47 D6B D6A MBRS2H100 C6 150uH L3 3 4 opto U2 2 1 47 R6 R7 470 Z1 MMSZ5241B R5 Vtrim 10 ohm C12 MBRS2H100 1000uF 25V 470pF C10 1nF ”Y1” 1 nF C8 T1 0.1 C7 22 Watt, 12 Volt Output NCP1028 Based Forward Converter (R4) 10 4 5 MMSD4148A R14 C5 2.2nF 2 kV R3 10 1 + _ 12V @ 1.8A (2A peak) J2 would then have to be adjusted to provide the proper current into U1’s VCC pin such that the OVP trip level could be properly calibrated. The schematic of the VCC/OVP sense configuration using the NCP1027 is shown in Figure 2. For Figure 1. Forward Converter Schematic 1. L1 is Coilcraft E3491−AL common mode EMI inductor (3.9 mH) 2. L2 is Coilcraft RFB0810−471L or similar (470 uH, 600 mA) 3. L3 is Wurth #7447709151 (150 uH, 2.5 A) 4. R9 sets slope compensation. 5. R8 value dependent on Vout and Vcc winding turns. 6. Z1 zener sets Vout: Vout = Vz + 0.85V; R5 is optional voltage trim resistor 7. R10 sets brownout level. 8. R1 is optional inrush limiter. 9. U1 recommended with Aavid #580100W00000G clip−on DIP8 heatsink. 10. Crossed schematic lines are not connected. NOTES: 1.5 A, 250 Vac 90 − 265Vac 100nF Input ”x” F1 4.3, 3W R1 + J1 AND8489/D more information on the internal functioning of OVP sensing in the NCP1027 please see the device data sheet at http://www.onsemi.com/pub_link/Collateral/NCP1027−D. PDF. AND8489/D D7A MMSD4148A are typically less than ±2%. Capacitor C8 helps to filter noise on the feedback pin and stabilize the overall feedback loop. Overcurrent and over−temperature protection is inherent in the NCP1028/1027 monolithic controllers. The current limit level is set by the MOSFET’s peak current sensing level of the current mode control circuitry. This will occur at approximately 2.3 A of output current for this design and will result in a “hiccup” type of start−stop overcurrent limiting. 4 5 D7B L4 25mH NCP1027 (100 kHz) U1 2 7 5 + 3 C13 4 8 1 10uF, 50V Magnetics Design As with most switching power supplies, the key to effective performance is the design of the power transformer. In this application it was desirable to have a small, yet efficient transformer similar to what a similar flyback topology would require, but without the reset winding that single−switch forward converters usually employ. For this low of power level, a resistor−capacitor−diode (RCD) type of snubber reset scheme was chosen for its simplicity and for the fact that it will allow the converter duty ratio to exceed 50% which helps with transformer core utilization. Of course there is a price to pay and that is allowing U1’s internal MOSFET drain voltage to swing up high enough for full core reset, but not sufficiently high as to damage the device under high line transient conditions. A small E25/13/7 type ferrite core (also known as an EF25) was chosen for minimal space. Using the standard transformer design equation to calculate the required primary turns at minimum dc bulk voltage yields: ǒVpx10 8Ǔ R8 Vcc + C9 10 uF 25V Figure 2. NCP1027 Implementation with Primary VCC OVP Sensing The network of R10, R11, R12, and C11 provides for brown−out sensing of the rectified mains by monitoring the level of the dc bulk voltage. The level is set so that the chip shuts down when the mains is at approximately 75 Vac. The trip level threshold can be easily adjusted with R10. Since the NCP1028/1027 controllers utilizes current mode control, and the duty ratio of the converter can exceed 50%, it is necessary to provide slope compensation to the internal current sensing to avoid sub−harmonic instabilities if and when the duty ratio exceeds 50%. This compensation is provided by R9 and is adjustable depending on the level of reflected inductor magnetizing current seen by the controller’s current sense circuit. The output rectifier/filter stage is a conventional forward converter rectifier/freewheel diode implementation consisting of dual diode D6, output choke L3, and main output capacitor C6. Snubber network C12 and R13 attenuates noise and switching spikes on D6 while capacitor C7 provides additional high frequency output noise filtering. Output voltage sensing and feedback is accomplished via zener diode Z1 and optocoupler U2 and the associated circuitry. When the output voltage exceeds the zener voltage (plus Vf of the optocoupler photo diode) the opto turns on and establishes control of the feedback pin (pin 4) of U1. R7 is necessary to provide a minimum zener current to avoid poor regulation effects that could occur if the zener were operated near the “knee” of its associated transfer curve. Despite the simplicity, this sensing scheme allows for adequate line and load regulation and a reasonable unity gain bandwidth for sufficient 120 Hz output ripple attenuation. The output voltage can be adjusted by changing the value of Z1. For 12 V output, a 11 V zener (MMSZ5241B) is used for Z1, and if necessary, resistor R5 can be adjusted until the desired output voltage is reached. Temperature and set−point variation due to zener and optocoupler tolerances Np + + (f B max Ae) ǒ120 V ǒ100 kHz + 100 (eq. 1) 10 8Ǔ 2300 gauss 0.52 cm 2Ǔ Where Vp is minimum bulk voltage, f is the switching frequency, Bmax is a reasonable maximum flux density in the ferrite core, and Ae is the cross sectional area of the core. Checking the available core bobbin width (~0.5 inches or 12.7 mm) indicates that approximately 25 turns of #28 AWG magnet wire will occupy one full winding layer comfortably, so four layers will be required for the full primary. To minimize leakage inductance, we can wind half of the primary (50 turns over two layers) first, then the secondary and auxiliary VCC windings, and finally the second half of the primary. By “sandwiching” the secondary between the primary halves, the primary−to−secondary leakage will be minimized. The 12 V secondary turns are given by: http://onsemi.com 3 AND8489/D Ns + Np + 100 100 kHz (8 ms); and dI is the choke ripple current which is twice the chosen critical choke dc current level (0.6 A). (V s ) Dvf) (Vp D max) (eq. 2) ǒ12 V ) 1 VǓ (100 L+ 0.8) ǒ + ƪ(15120) 1)ƫ V D7 Ǔ V bulk min 120 V 5 * 12 V ƫ ǒ Ǔ 8 ms 0.6 A + 160 mH (eq. 4) >> choose 180 mH, a common value. A 180 mH, 3 A rated off−the−shelf ferrite inductor from Coilcraft was chosen for the output inductor. Now we can calculate the various MOSFET/T1 primary current components at minimum line: ♦ Reflected primary dc load current: 2 A/5 = 400 mA (Iout/turns ratio) ♦ Reflected choke magnetizing current: 0.6 A/5 = 120 mA ♦ Transformer magnetizing current: This involves knowing the transformer’s primary L: + 16 Where Vs is the main secondary voltage; Dvf is the forward drop of diode D6, and Dmax is the maximum duty ratio of the converter. From wire tables it appears that up to 22 turns of #26 AWG magnet wire (adequate of the average secondary current) will fit across one layer of the bobbin. In order to allow for tolerances in the chip’s duty ratio and efficiency issues, 20 turns were selected for a margin allowance and to allow end−cuffing of the secondary winding with Mylar tape for safety insulation issues. 18 turns would have probably also been an acceptable compromise if more margin were desired. Since the VCC will be derived from peak charging of C13, and the VCC in U1 is clamped at approximately 9 V with an internal zener, the VCC winding turns were ratioed from the primary to yield approximately 15 V when the line bulk is at the minimum level (120 Vdc). Ns(V CC) + V aux ) ƪǒ Ǔ Lp + core AL value Np 2 10−3 + 1500 10 −3 + 15, 000 mH or 15 mH (100) 2 (eq. 5) This will typically be slightly less due to micro gaps between the core halves, so choose 12 mH. Where AL for E25/13/7 core of 3C90 material is 1500 per manufacturer core specs. 100 So dI = (Vp x dt)/L yields: (120 V x 8 mS)/12,000 mH = 0.080 A or 80 mA. The peak MOSFET/T1 primary current is then: (eq. 3) 100 400 mA ) 120 mA ) 80 mA + 600 mA + 13.3>>14 turns (eq. 6) This value is well within the rated 720 mA minimum peak current limit level of the NCP1028. Assuming a nominal duty ratio (D) of 0.55 at 120 Vac input, then the rms primary current will be the square root of D times the peak current = 0.74 x 600 = 0.44 A. The original selection of #28 AWG primary wire is sufficient to handle this current with acceptable temperature rise. Likewise the T1 secondary rms current for 120 Vac input and 1.8 A output can also be calculated: 0.74 x 1.8 A = 1.33 A which can also be handled with an acceptable temperature rise using the #26 AWG wire selected for the 12 V secondary. Figure 3 shows the final design of the forward converter transformer T1. The components for the RCD reset snubber (R4, C5, D5) were selected based on U1’s internal MOSFET drain voltage waveforms during worst case line and load conditions and the primary inductance of T1. Since C5 will resonate with T1’s primary inductance after MOSFET turn−off, the value of C5 should be selected such that the resonant frequency of this L/C network is less than half of the inverter switching frequency. In this case T1 has a primary inductance of about 12 mH, so with C5 at 2.2 nF, this would result in a resonant frequency of about 31 kHz. Keeping this resonant frequency low will minimize resonant voltage peaking of the drain waveform at turn−off. R4 discharges C5 during each Assuming a max chip VCC current drain of 1.5 mA, the approximate value of R8, the VCC current limiting resistor, can be calculated: (15 V – 9 V)/0.0015 A = 4.0 kW >> use 3.9k. One other consideration that should be checked is the peak inverter MOSFET current to make sure it is within the proper current limit ratings of the NCP1028. Since the circuit is operating in continuous conduction mode with respect to the output choke, the peak primary current will be the sum of three components; the peak load current, the choke magnetizing current (both reflected through the transformer turns ratio) and the primary magnetizing current of the transformer. The magnetizing current represents stored energy in both magnetic elements and should ideally be minimized. Unfortunately this would mean a high as possible inductance for both which is not practical. This leads us to the output choke design. Assuming a maximum peak output current of 2 A, the minimum dc current, or critical current in the choke is typically chosen to be 10% to 20% of the max load current. For this case we choose 15% which is 0.3 A. This current is the point at light output load where the choke current just becomes discontinuous. Using the V = L x dI/dt relationship we can rearrange to find L: L = V x (dt/dI) where V is the voltage across the choke at low line (calculated using the transformer turns ratio of 5:1 and Vout); dt is the maximum on−time of the MOSFET at http://onsemi.com 4 AND8489/D addition, the quasi−resonant effect of the snubber capacitor C5 interacting with T1’s primary inductance helps to shape the drain waveform so as to minimize leakage inductance ringing and spikes, thus reducing EMI issues. This is clearly demonstrated in the conducted EMI profile (Level B) shown in Figure 8. This was taken with a load of 1.8 A (22 W). The output voltage ripple for a 1.75 A load is shown in Figure 6, with a scale of 100 mV per division vertical. The efficiency versus load curves are shown in Figure 7 for both 120 and 230 Vac input. Note that the supply efficiency is at or above 80% from half to full load. switching cycle so the capacitor can control the voltage level across T1’s primary so as to adequately allow the proper volt−second reset conditions for the transformer primary. Waveforms of the drain voltage and associated primary current are shown in Figures 4 and 5 for 120 Vac and 230 Vac inputs, respectively, with an output current of 1.75 A. The peak voltages are well within the voltage rating of the NCP1028 MOSFET drain, and are, in fact, lower than what would exist if a conventional reset winding were used on the transformer. The voltage margins were also completely adequate at a high line of 265 Vac input. In http://onsemi.com 5 AND8489/D MAGNETICS DESIGN DATA SHEET Project / Customer: ON Semiconductor − 24 watt, 12 vout NCP1028 Fwd Conv Part Description: 24 watt NCP1027 resonant reset forward conv. xfmr (Rev 3) Schematic ID: T1 Core Type: EF25 (E25/13/7); 3C90 material or similar Core Gap: No gap Inductance: (Primary) 12 mH minimum Bobbin Type: 10 pin horizontal mount for EF25 Windings (in order): Winding # / type Turns / Material / Gauge / Insulation Data Primary A (1 − 2) 50T of #28HN over 2 layers (25 TPL). Insulate for 1 kV to next winding. Self leads to pins. Vcc (4 − 5) 14 turns of #28 HN over 1 layer, close wound and centered in window. Self leads to pins. Insulate to 3 kV to next winding 12V Secondary (9 − 7) 20 turns of #26 triple insulated wire over one layer. Self leads to pins. Primary B (2 − 3) Same as Primary A. Insulate with tape and self− leads to pins. Hipot: 3 kV from primaries & Vcc to secondary for 1 minute. Lead Breakout / Pinout Schematic 1 (Top View of Bobbin) Pri A 2 Pri B 3 4 10 9 8 7 6 9 0.20” pin separation (8 places) 12V sec 0.80” 7 1 2 3 4 5 Vcc 5 Figure 3. Forward Converter Transformer Design http://onsemi.com 6 AND8489/D Figure 4. MOSFET Drain Voltage and Current at 120 Vac (1.75 A Load) Figure 5. MOSFET Drain Voltage and Current at 230 Vac (1.75 A Load) 90 Efficiency @ 120 Vac (%) EFFICIENCY (%) 85 80 Efficiency @ 230 Vac (%) 75 70 65 60 Efficiency vs. Loading 0 0.5 1 1.5 2 LOAD (A) Figure 6. Output Ripple Figure 7. Efficiency versus Load Curves http://onsemi.com 7 2.5 AND8489/D dBuV NCP1028 FWD 12 V @ 1.8 A 80 70 60 EN 55022; Class B Conducted, Quasi−Peak EN 55022; Class B Conducted, Average 50 40 220V Neutral Average 30 120V Neutral Average 20 10 0 −10 −20 1 10 (Start = 0.15, Stop = 30.00) MHz 1/5/2011 10:19:31 AM Figure 8. Average Conducted EMI Profile at 120 Vac (blue) and 220 Vac (red) 22 W Output (Note: lower dashed line is 6 dB margin level for Class B) BILL OF MATERIALS FOR 12 VOUT, 22 W, NCP1027/1028 FORWARD CONVERTER Designator Footprint Manufacturer Manufacturer Part Number Substitution Allowed 2 A, 100 V SMB ON Semiconductor MBRS2H100T3G No Diode − 60 Hz, 1 A, 800 V SMA ON Semiconductor MRA4007 No 1 Diode − fast recov 1 A, 600 V axial lead ON Semiconductor 1N4937 No D7 1 Signal diode 100 mA, 100 V SOD−123 ON Semiconductor MMSD4148A No Z1 1 Zener diode 12 V, 500 mA SOD−123 ON Semiconductor MMSZ5241B No U2 1 Optocoupler CTR >/ = 0.5 DIP4 SMD Vishay or NEC SFH6156A−4 or PS2561L−1 Yes U1 1 Monolithic Controller 100 kHz DIP8 ON Semiconductor NCP1027 or NCP1028 No C1, C2 2 ”X” cap, box type 100 nF, X2 LS = 15 mm Rifa, Wima TBD C10 1 ”Y1” cap, disc type 1 nF, Y1 LS = 7.5 mm Rifa, Wima TBD C5 1 Ceramic cap, disc 2.2 nF, 2 kV 5% LS = 7.5 mm Rifa, Wima TBD C8, C11 2 Ceramic cap, monolythic 1 nF, 50 V 10% 1206 AVX, Murata TBD C7 1 Ceramic cap, monolythic 100 nF, 50 V 10% 1206 AVX, Murata TBD C12 1 Ceramic cap, monolythic 470 pF, 200 V 5% 1206 AVX, Murata TBD C3 1 Electrolytic cap 10 mF, 400 Vdc 10% LS = 5 mm, D = 12.5 mm UCC, Panasonic TBD C4 1 Electrolytic cap 47 mF, 400 V 10% LS = 7.5 mm, D = 16 mm UCC, Panasonic TBD C9 1 Electrolytic cap 10 mF, 25 Vdc 10% LS = 2.5 mm, D = 6.3 mm UCC, Panasonic TBD Qty Description Value D6A, D6B 2 Schottky diode D1, 2, 3, 4 4 D5 Tolerance http://onsemi.com 8 AND8489/D BILL OF MATERIALS FOR 12 VOUT, 22 W, NCP1027/1028 FORWARD CONVERTER Designator Qty Description Value Tolerance Footprint Manufacturer Manufacturer Part Number C13 1 Electrolytic cap 2.2 mF, 100 V 10% LS = 2.5 mm, D = 6.3 mm UCC, Panasonic TBD C6 1 Electrolytic cap 1000 mF, 25 V 10% LS = 5 mm, D = 12.5 mm UCC, Panasonic TBD R1 1 Resistor, 3W, Wire wound 4.4 W, 3 W 10% LS = 7.5 mm, D = 7 mm Ohmite, Dale TBD R2 1 Resistor, 1/2W, metal film 1 Meg, 1/2W 10% Axial lead; LS=12.5mm Ohmite, Dale TBD R4 1 Resistor, 1/2W metal film 47k, 1/2W 10% Axial lead; LS=12.5mm Ohmite, Dale TBD R3, R14 2 Resistor, 1/4W SMD 10 W 5% SMD 1206 AVX, Vishay, Dale TBD R6, R13 2 Resistor, 1/4W SMD 47 W 5% SMD 1206 AVX, Vishay, Dale TBD R5 1 Resistor, 1/4W SMD TBD (10 W) 5% SMD 1206 AVX, Vishay, Dale TBD R7 1 Resistor, 1/4W SMD 470 W 5% SMD 1206 AVX, Vishay, Dale TBD R11, R12 2 Resistor, 1/4W SMD 2 MW 5% SMD 1206 AVX, Vishay, Dale TBD R10 1 Resistor, 1/4W SMD 28k 5% SMD 1206 AVX, Vishay, Dale TBD R9 1 Resistor, 1/4W SMD 82k 5% SMD 1206 AVX, Vishay, Dale TBD R8 1 Resistor, 1/4W SMD 3.9k 5% SMD 1206 AVX, Vishay, Dale TBD F1 1 Fuse, TR−5 style 1.5 A TR−5, LS = 5 mm Minifuse L3 1 Heatsink for U1 DIP8 clip−on Aavid Aavid 580100W00000G 1 Inductor (output choke) 150 mH, 2.5 A 5% 1210 SMD (12 x 12 mm) Wurth 7447709151 (alternate) 180 mH, 2.2 A 5% Axial lead choke (1.1”) Coilcraft PCH−45X−184LT L2 1 Inductor (EMI choke) 470 mH, 600 mA See Wurth Drawing Wurth Magnetics 744772471 L1 1 EMI Inductor 3.9 mH, See Coilcraft Drawing Coilcraft E3491−AL T1 1 Transformer E25/13/7 core See Mag Drawing Wurth Magnetics 750312228 J1, J2 2 Screw Terminal LS = 0.2” DigiKey # 281−1435−ND http://onsemi.com 9 Substitution Allowed AND8489/D References: NCP1028 Data Sheet: http://www.onsemi.com/pub_link/Collateral/NCP1028−D.PDF NCP1027/NCP1028 Application Notes, Design Notes and Reference Designs: 1. http://www.onsemi.com/PowerSolutions/supportDoc.do?type=AppNotes&rpn=NCP1028 2. http://www.onsemi.com/PowerSolutions/supportDoc.do?type=AppNotes&rpn=NCP1027 3. http://www.onsemi.com/PowerSolutions/supportDoc.do?type=Reference Designs&rpn=NCP1027 4. http://www.onsemi.com/PowerSolutions/supportDoc.do?type=Design Notes&rpn=NCP1027 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). 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