NCP400 150 mA CMOS Low Iq Low−Dropout Voltage Regulator with Voltage Detector Output The NCP400 is an integration of a low−dropout regulator and a voltage detector in a very small chip scale package. The voltage regulator is capable of supplying 150 mA with a low dropout of 160 mV at 100 mA. It contains a voltage reference unit, an error amplifier, comparators, PMOS power transistor, current limit and thermal shutdown protection circuits for the regulator portion. A highly accurate voltage detector with hysteresis and an externally programmable time delay generator are implemented to prevent erratic system reset operation. It features complementary output with active low reset function. The NCP400 is designed to work with low cost ceramic capacitors and requires only a small 1.0 F capacitor at regulator output. Its low quiescent current is ideal for battery powered applications. Features http://onsemi.com MARKING DIAGRAM È 6 Bump Flip−Chip FC SUFFIX CASE 499AH A1 400 A L Y W 400 ALYW A1 = Device Code = Assembly Location = Wafer Lot = Year = Work Week • LDO Voltage Regulator and Voltage Detector Together in a Very Small Wafer Level Package, 6 Bump Flip−Chip, 1.0 x 1.5 mm • Low Quiescent Current of 50 A Typical • Internal Current Limit and Thermal Shutdown Protection • Low Cost and Small Size Ceramic Capacitors • Input Voltage Range of 1.8 V to 5.0 V • Voltage Regulator ♦ 1.8 V (*) Output with 2% Accuracy ♦ Excellent Line and Load Regulation ♦ Low Dropout of 160 mV at 100 mA • Voltage Detector ♦ 2.3 V (*) Threshold with 2% Accuracy ♦ Externally Programmable Time Delay Generator ♦ Excellent Line and Load Regulation • This is a Pb−Free Device (∗) Other voltages can be developed upon request. Please contact your ON Semiconductor representative. Memory Cards Cellular Phones Digital Still Cameras and Camcorders Battery Powered Equipment Semiconductor Components Industries, LLC, 2005 April, 2005 − Rev. 3 VOUT 6 1 VIN GND 5 2 ENABLE CD 4 3 RESET (Bottom View) ORDERING INFORMATION Device Package Shipping† NCP400FCT2G Flip−Chip (Pb−Free) 3000 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Typical Applications • • • • PIN CONNECTIONS 1 Publication Order Number: NCP400/D NCP400 TYPICAL OPERATION CIRCUIT VDD 1 F CIN ENABLE VIN VOUT 1 F COUT CD NCP400 Microprocessor / Memory Chip RESET C RESET GND GND DelayTime : (t) (C 0.97 V) 1.56 A Figure 1. Power Supply and Reset Circuit for Microprocessor and/or Memory Chip PIN DESCRIPTION Pin No. Symbol 1 VIN 2 ENABLE 3 RESET Description Positive power supply input voltage. This input is used to place the device into low–power standby. When this input is pulled low, the device is disabled. If this function is not used, ENABLE should be connected to VIN. Voltage detect output signal. 4 CD 5 GND Delay capacitor pin. Power supply ground. 6 VOUT Voltage regulator output voltage. REPRESENTATIVE BLOCK DIAGRAM VOUT VIN Driver w/ Current Limit − + Thermal Shutdown + ENABLE RESET − + Vref ON GND OFF Figure 2. Representative Block Diagram http://onsemi.com 2 CD NCP400 ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit VIN 0 to 5.5 V Enable Voltage ENABLE −0.3 to VIN+0.3 V Output Voltage VOUT −0.3 to VIN+0.3 V Delay Capacitor Pin Voltage VCD −0.3 to VIN+0.3 V Reset Pin Voltage Vreset −0.3 to VIN+0.3 V Reset Pin Current Ireset 70 Input Voltage mA °C/W Power Dissipation and Thermal Characteristics for Microbump−6 Thermal Resistance Junction−to−Air (Note 3) RθJA Refer to Figure 22 Operating Junction Temperature TJ −40 to +125 °C Operating Ambient Temperature TA −40 to +85 °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. This device contains ESD protection and exceeds the following tests: Human Body Model (HBM) ±2000 V per MIL−STD−883, Method 3015 Machine Model (MM) ±200 V. 2. Latchup capability (85°C)100 mA DC with trigger voltage. 3. PCB top layer uses a single copper layer and is tested @ 250 mW. http://onsemi.com 3 NCP400 ELECTRICAL CHARACTERISTICS (VIN = VOUT(nom.) + 1.0 V, ENABLE = VIN, CIN = 1.0 F, COUT = 1.0 F, TA = 25°C, unless otherwise noted.) Symbol Min Typ Max Unit VIN 1.8 – 5.0 V Output Voltage (TA= 25C, IOUT = 1.0 mA) VOUT 1.764 1.8 1.836 V Output Voltage (TA = –40C to 85C, IOUT = 1.0 mA) VOUT 1.746 1.8 1.854 V Line Regulation (IOUT = 10 mA, VIN = 2.8 V to 5.0 V) Reg line – 1.0 3.5 mV/V Load Regulation (IOUT = 1.0 mA to 150 mA) Reg load – 0.3 0.8 mV/mA Maximum Output Current IOUT(nom.) – 150 – mA Dropout Voltage (IOUT = 100 mA, Measured at VOUT –3.0%) VIN–VOUT – 160 200 mV IQ_SD IQ_EN – – 0.25 37 1.0 100 A 0.17 − 0.25 1.25 − 1.65 V IOUT(MAX) 200 400 800 mA Ripple Rejection (f = 1.0 kHz, Io = 60 mA) RR – 50 – dB Output Noise Voltage (f = 20 Hz to 100 kHz, IOUT = 60 mA) VN – 110 – Vrms Output Voltage Temperature Coefficient TC − ±100 − ppmC VDET 2.254 2.30 2.346 V VHYS 0.069 0.115 0.161 Characteristic Input Voltage (TA = –40C to 85C) Quiescent Current (Enable Input = 0V, IOUT = 0 mA ) (Enable Input = VIN , IOUT = 1.0 mA to Io(nom.)) Enable Input Threshold Voltage (Voltage Decreasing, Output Turns Off, Logic Low) (Voltage Increasing, Output Turns On, Logic High) VTH(EN) Output Short Circuit Current (VOUT = 0 V, VIN = 5.0 V) (Note 4) Detector Threshold (TA = 25C) Detector Threshold Hysteresis Reset Output Current N−Channel Sink Current (Reset = 0.5 V, VIN = 1.8 V) P−Channel Source Current (Reset = 2.4 V, VIN = 4.5 V) IRESET CD Delay Pin Threshold Voltage (Pin 4) (VIN=2.0 V) VTH(CD) Delay Capacitor Pin Sink Current (Pin 4) (VIN = 1.8 V, VCD = 0.5 V) ICD_SINK Delay Current Pin Source Current (Pin 4) (VCD = 0, VIN = 2.8 V) ICD_SOURCE 4. Values are guaranteed by design. http://onsemi.com 4 V mA 1.0 1.0 7.0 5.5 – – 0.76 0.97 1.14 0.2 39 − 0.78 1.56 3.12 V mA A NCP400 TYPICAL CHARACTERISTICS VIN = 3.3 V TA = 25°C IOUT = 1 mA CIN = 1 F Upper Trace: Input Voltage 1 V/div Lower Trace: Output Voltage 1 V/div Upper Trace: Input voltage 2 V/div Lower Trace: Output voltage 50 mV/div Figure 3. Turn−ON Response Figure 4. Line Transient Response IOUT = 1 mA to 150 mA,VIN = 3.3 V,CIN = 1 µF Upper Trace: Output Voltage 200 mV/div Lower Trace: Output Loading Current 100 mA/div IOUT = 150 mA to 1 mA,VIN = 3.3 V, CIN = 1 F Upper Trace: Output Voltage 200 mV/div Lower Trace: Output Loading Current 100 mA/div Figure 6. Load Transient Response Figure 5. Load Transient Response 56 1.810 IQ_EN, QUIESCENT CURRENT (A) VOUT, OUTPUT VOLTAGE (V) 1.815 VIN = 2.8 V CIN = 1 F COUT = 1 F 1.805 1.800 1.795 1.790 1.785 −50 −25 0 25 50 75 100 54 VIN = 2.8 V CIN = 1 F COUT = 1 F 52 50 48 46 44 −50 −25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C) Figure 7. Output Voltage vs. Temperature Figure 8. Quiescent Current (Enable) vs. Temperature http://onsemi.com 5 100 NCP400 IQ_SD, QUIESCENT CURRENT (A) 0.40 VIN = 2.8 V CIN = 1 F COUT = 1 F 0.35 0.30 0.25 0.20 0.15 0.10 −50 −25 0 25 50 75 100 TA, AMBIENT TEMPERATURE (°C) VDET, DETECTOR THRESHOLD VOLTAGE (V) TYPICAL CHARACTERISTICS 2.36 VIN = 2.8 V CIN = 1 F COUT = 1 F 2.34 2.32 2.30 2.28 2.26 2.24 −50 25 50 75 100 Figure 10. Detector Threshold Voltage vs. Temperature 10 IRESET, RESET SINK CURRENT (mA) 0.130 0.125 0.120 0.115 0.110 VIN = 2.8 V CIN = 1 F COUT = 1 F 0.105 0.100 −50 −25 0 25 50 75 9 8 7 VIN = 1.8 V CIN = 1 F COUT = 1 F RESET = 0.5 V 6 5 4 −50 100 −25 0 25 50 75 100 TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C) Figure 11. Dectector Threshold Hysteresis Voltage vs. Temperature Figure 12. RESET Pin N−Channel Sink Current vs. Temperature 9 8 7 6 5 VIN = 2.8 V CIN = 1 F COUT = 1 F 4 3 −50 −25 0 25 50 75 100 VThCD, CD PIN THRESHOLD VOLTAGE (V) VHYS, DETECT THRESHOLD HYSTERESIS (V) 0 TA, AMBIENT TEMPERATURE (°C) Figure 9. Quiescent Current (Shutdown) vs. Temperature IRESET, RESET SOURCE CURRENT (mA) −25 1.00 0.99 0.98 0.97 0.96 0.95 0.94 −50 VIN = 2.0 V CIN = 1 F COUT = 1 F −25 0 25 50 75 TA, AMBIENT TEMPERATURE (°C) TA, AMBIENT TEMPERATURE (°C) Figure 13. RESET Pin P−Channel Source Current vs. Temperature Figure 14. CD Delay Pin Threshold Voltage vs. Temperature http://onsemi.com 6 100 NCP400 2.25 ICD_SINK, CD PIN SINK CURRENT (mA) ICD_SOURCE, CD PIN SOURCE CURRENT (A) TYPICAL CHARACTERISTICS 2.00 1.75 1.50 1.25 VIN = 2.8 V CIN = 1 F COUT = 1 F 1.00 0.75 −50 −25 0 25 50 75 100 51 48 45 42 39 36 VIN = 1.8 V VCD = 0.5 V 33 30 −50 −25 TA, AMBIENT TEMPERATURE (°C) 75 100 3.0 RESET, RESET PIN VOLTAGE (V) GROUND PIN CURRENT (A) 50 Figure 16. CD Pin Sink Current vs. Temperature 40 35 30 25 20 15 TA = 25°C CIN = 1 F COUT = 1 F 10 5 0 0 1 2 3 4 TA = 25°C 2.5 2.0 1.5 1.0 0.5 4 0 5 0.5 1.0 1.5 2.0 2.5 3.0 VIN, INPUT VOLTAGE (V) VIN, INPUT VOLTAGE (V) Figure 17. Ground Pin Current vs. Input Voltage Figure 18. RESET Pin Voltage vs. Input Voltage 50 2.5 ICD, CD PIN SINK CURRENT (mA) ICD, CD PIN SOURCE CURRENT (A) 25 TA, AMBIENT TEMPERATURE (°C) Figure 15. CD Pin Source Current vs. Temperature TA = 25°C CIN = 1 F COUT = 1 F 2.0 1.5 1.0 0.5 0.0 0 0 1 2 3 4 TA = 25°C 40 30 20 10 0 0.0 5 0.5 1.0 1.5 2.0 2.5 3.0 VCD, DELAY PIN VOLTAGE (V) VIN, INPUT VOLTAGE (V) Figure 19. Delay Pin Source Current vs. Voltage Figure 20. CD Pin Sink Current vs. Input Voltage http://onsemi.com 7 NCP400 550 7 TA = 25°C 6 500 5 JA, (°C/W) IOUT, OUTPUT SOURCE CURRENT (mA) TYPICAL CHARACTERISTICS 4 3 VIN – 2.0 V VIN – 1.5 V VIN – 1.0 V VIN – 0.5 V 2 1 0 0 1 2 450 1 oz Cu 400 2 oz Cu 350 3 4 300 5 0 10 20 30 40 VIN, INPUT VOLTAGE (V) PCB COPPER AREA (mm2) Figure 21. Reset Output Source Current vs. Input Voltage Figure 22. JA vs. Copper Area http://onsemi.com 8 50 NCP400 OPERATION DESCRIPTION Low Dropout Voltage Regulator voltage at CD Pin (Pin 4) will be at the same level as Vin, and the reset output (Pin 3) will be in the high state. If there is a power interruption and Vin becomes significantly deficient, it will fall below the lower detector threshold (VDET−) and the external time delay capacitor CD will be immediately discharged by an internal N−Channel MOSFET that connects to Pin 4. This sequence of events causes the Reset output to be in the low state. After completion of the power interruption, Vin will again return to its nominal level and become greater than the VDET+. The voltage detector will turn off the N−Channel MOSFET and allow internal current source to charge the external capacitor CD, thus creating a programmable delay for releasing the reset signal. When the voltage at CD Pin 4 exceeds the inverter threshold, typically 0.97 V, the reset output will revert back to its original state. The detail reset output time delay calculation is shown in Figure 24. The low dropout voltage regulator contains a voltage reference unit, an error amplifier, a PMOS power transistor, resistors for setting output voltage, current limit and thermal shutdown protection circuits. Enable Operation The enable pin will turn on or off the regulator. The limits of threshold are covered in the electrical specification section of this data sheet. If the enable is not used then the pin should be connected to Vin. Voltage Detector The NCP400 consist of a precision voltage detector that drives a time delay generator. Figures 23 and 24 show a timing diagram and a typical application. Initially consider that input voltage Vin is at a nominal level and it is greater than the voltage detector upper threshold (VDET+). The Input Voltage, Pin 1 Vin VDET+ VDET− Vin Capacitor, Pin 4 0.97 V Vin Reset Output, Pin 3 VDET− 0V Figure 23. Timing diagram http://onsemi.com 9 NCP400 APPLICATION NOTES VIN 2.3 V+VHYS 2.3 V 0V t RESET 0V Figure 24. Timing Diagram Delay Time: (t) (C VThCD) ICD where: C is the CD pin capacitor VThCD is the delay threshold voltage ICD is delay current source. As target use C = 3300 pF and have ∆t = 2 ms: With internal ∆VThCD = 0.97 V and ICD =1.56 A, then ⇒ Delay Time: (t) (3300 pF 0.97 V) 2.05 ms 1.56 A http://onsemi.com 10 NCP400 APPLICATION INFORMATION Low Dropout Voltage Regulator minimum output current. Capacitors exhibiting ESRs ranging from a few m up to 10 can thus safely be used. The minimum decoupling value is 1.0 F and can be augmented to fulfill stringent load transient requirements. The regulator accepts ceramic chip capacitors as well as tantalum devices. Larger values improve noise rejection and load regulation transient response. Figure 25 shows the stable area of the regulator with different output capacitor ESR and output current. −Input Decoupling A 1.0 F capacitor either ceramic or tantalum is recommended and should be connected close to the NCP400 package. Higher values and lower ESR will improve the overall line transient response. −Output Decoupling The NCP400 is a stable Regulator and does not require any specific Equivalent Series Resistance (ESR) or a ESR, OUTPUT CAPACITOR () 100 UNSTABLE 10 Cout = 1 F TO 10 F TA = 25°C to 125°C Vin = up to 5.5 V 1 0.1 STABLE UNSTABLE 0.01 0 25 50 75 100 125 150 IO, OUTPUT CURRENT (mA) Figure 25. Output Capacitor versus Output Current −Thermal Protection malfunction. Set external components, especially the output capacitor, as close as possible to the circuit, and make leads a short as possible. Internal thermal shutdown circuit is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When the thermal protection activated, higher than 150°C, the regulator turns off. This feature is provided to prevent failures from accidental overheating. Voltage Detector The voltage detector has built−in hysteresis to prevent erratic reset operation. This device is specifically designed for use as reset controllers in portable microprocessor based systems, it can offer a cost−effective solution in numerous applications where precise voltage monitoring and time delay are required. Figures 26 through 27 shows various application examples. −Hints Please be sure the Vin and GND lines are sufficiently wide. When the impedance of these lines is high, there is a chance to pick up noise or cause the regulator to http://onsemi.com 11 NCP400 APPLICATION CIRCUIT INFORMATION 2.346 V 2.254 V Vin < 2.254 ON 1 VIN 4 3 To Additional Circuitry NCP400 RESET CD 5 Vin > 2.346 ON GND Figure 26. Input Voltage Indicator VDD 1 F CIN ENABLE VIN VOUT 1 F COUT CD NCP400 Microprocessor / Memory Chip RESET C RESET GND GND DelayTime : (t) (C 0.97 V) 1.56 A Figure 27. Microprocessor Reset Circuit http://onsemi.com 12 NCP400 PACKAGE DIMENSIONS 6 PIN FLIP−CHIP CASE 499AH−01 ISSUE O 4X D A È 0.10 C TERMINAL A1 LOCATOR B NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. COPLANARITY APPLIES TO SPHERICAL CROWNS OF SOLDER BALLS. E DIM A A1 A2 D E b e E1 TOP VIEW A2 A1 0.10 C C A 0.05 C MILLIMETERS MIN MAX 0.448 0.533 0.210 0.270 0.238 0.263 1.000 BSC 1.50 BSC 0.290 0.340 0.500 BSC 1.000 BSC SIDE VIEW SEATING PLANE e C 6X b 0.05 C A B 0.03 C B e E1 A 1 2 BOTTOM VIEW SOLDERING FOOTPRINT* 0.500 0.0197 0.500 0.0197 0.250 − 0.275 0.0098 − 0.0108 SCALE 20:1 1.0 0.0394 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 13 NCP400 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 14 For additional information, please contact your local Sales Representative. NCP400/D