Low-Voltage 1.8/2.5/3.3V 16-Bit Buffer

74VCX16240
Low−Voltage 1.8/2.5/3.3V
16−Bit Buffer
With 3.6 V−Tolerant Inputs and Outputs
(3−State, Inverting)
The 74VCX16240 is an advanced performance, inverting 16−bit
buffer. It is designed for very high−speed, very low−power operation
in 1.8 V, 2.5 V or 3.3 V systems.
When operating at 2.5 V (or 1.8 V) the part is designed to tolerate
voltages it may encounter on either inputs or outputs when interfacing
to 3.3 V busses. It is guaranteed to be over−voltage tolerant to 3.6 V.
The 74VCX16240 is nibble controlled with each nibble functioning
identically, but independently. The control pins may be tied together to
obtain full 16−bit operation. The 3−state outputs are controlled by an
Output Enable (OEn) input for each nibble. When OEn is LOW, the
outputs are on. When OEn is HIGH, the outputs are in the high
impedance state.
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MARKING DIAGRAM
48
48
VCX16240
1
AWLYYWW
TSSOP−48
DT SUFFIX
CASE 1201
A
WL
YY
WW
Features
• Designed for Low Voltage Operation: VCC = 1.65 V − 3.6 V
• 3.6V Tolerant Inputs and Outputs
• High Speed Operation: 2.5 ns max for 3.0 V to 3.6 V
•
•
•
•
•
•
•
3.0 ns max for 2.3 V to 2.7 V
6.0 ns max for 1.65 V to 1.95 V
Static Drive:
±24 mA Drive at 3.0 V
±18 mA Drive at 2.3 V
±6 mA Drive at 1.65 V
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0 V
Near Zero Static Supply Current in All Three Logic States (20 mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds ±250 mA @ 125°C
ESD Performance: Human Body Model >2000 V;
Machine Model >200 V
All Devices in Package TSSOP are Inherently Pb−Free*
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
Package
Shipping †
74VCX16240DT
TSSOP
(Pb−Free)
39 / Rail
74VCX16240DTR
TSSOP
(Pb−Free)
2500 / Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 5
1
Publication Order Number:
74VCX16240/D
74VCX16240
OE1 1
48 OE2
O0 2
47 D0
O1 3
46 D1
GND 4
1
OE1
OE3
48
OE2
OE4
25
24
45 GND
O2 5
44 D2
O3 6
43 D3
VCC 7
42 VCC
O4 8
41 D4
O5 9
40 D5
GND 10
D0:3
O0:3
D8:11
O8:11
D4:7
O4:7
D12:15
O12:15
One of Four
39 GND
O6 11
38 D6
O7 12
37 D7
O8 13
36 D8
O9 14
35 D9
GND 15
34 GND
O10 16
33 D10
O11 17
32 D11
VCC 18
31 VCC
O12 19
30 D12
O13 20
29 D13
GND 21
28 GND
O14 22
27 D14
O15 23
26 D15
OE4 24
25 OE3
Figure 2. Logic Diagram
1
EN1
EN2
EN3
EN4
OE1
48
OE2
25
OE3
24
OE4
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
Figure 1. 48−Lead Pinout
(Top View)
47
1
46
2
1∇
3
5
44
43
41
1
6
8
2∇
40
9
38
11
37
36
1
12
13
3∇
14
35
16
33
32
30
1
17
19
4∇
29
20
27
22
26
23
O0
O1
O2
O3
O4
O5
O6
O7
O8
O9
O10
O11
O12
O13
O14
O15
Figure 3. IEC Logic Diagram
Table 1. PIN NAMES
Pins
Function
OEn
D0−D15
O0−O15
Output Enable Inputs
Inputs
Outputs
TRUTH TABLE
OE1
D0:3
O0:3
OE2
D4:7
O4:7
OE3
D8:11
O8:11
OE4
D12:15
O12:15
L
L
H
L
L
H
L
L
H
L
L
H
L
H
L
L
H
L
L
H
L
L
H
L
H
X
Z
H
X
Z
H
X
Z
H
X
Z
H = High Voltage Level;
L = Low Voltage Level;
Z = High Impedance State;
X = High or Low Voltage Level and Transitions Are Acceptable, for ICC reasons, DO NOT FLOAT Inputs
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2
74VCX16240
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VCC
DC Supply Voltage
VI
VO
Value
Condition
Unit
−0.5 to +4.6
V
DC Input Voltage
−0.5 ≤ VI ≤ +4.6
V
DC Output Voltage
−0.5 ≤ VO ≤ +4.6
Output in 3−State
V
−0.5 ≤ VO ≤ VCC + 0.5
Note 1; Outputs Active
V
IIK
DC Input Diode Current
−50
VI < GND
mA
IOK
DC Output Diode Current
−50
VO < GND
mA
+50
VO > VCC
mA
IO
DC Output Source/Sink Current
±50
mA
ICC
DC Supply Current Per Supply Pin
±100
mA
IGND
DC Ground Current Per Ground Pin
±100
mA
TSTG
Storage Temperature Range
−65 to +150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. IO absolute maximum rating must be observed.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Operating
Data Retention Only
Min
Typ
Max
Unit
1.65
1.2
3.3
3.3
3.6
3.6
V
−0.3
3.6
V
0
0
VCC
3.6
V
−24
mA
VCC
Supply Voltage
VI
Input Voltage
VO
Output Voltage
IOH
HIGH Level Output Current, VCC = 3.0 V − 3.6 V
IOL
LOW Level Output Current, VCC = 3.0 V − 3.6 V
24
mA
IOH
HIGH Level Output Current, VCC = 2.3 V − 2.7 V
−18
mA
IOL
LOW Level Output Current, VCC = 2.3 V − 2.7 V
18
mA
IOH
HIGH Level Output Current, VCC = 1.65 V − 1.95 V
−6
mA
IOL
LOW Level Output Current, VCC = 1.65 V − 1.95 V
6
mA
TA
Operating Free−Air Temperature
−40
+85
°C
Dt/DV
Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V
0
10
ns/V
(Active State)
(3−State)
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3
74VCX16240
DC ELECTRICAL CHARACTERISTICS
TA = −40°C to +85°C
Symbol
VIH
VIL
VOH
VOL
Condition
Min
1.65 V ≤ VCC < 2.3 V
0.65 x VCC
2.3 V ≤ VCC ≤ 2.7 V
1.6
2.7 V < VCC ≤ 3.6 V
2.0
Characteristic
HIGH Level Input Voltage (Note 2)
LOW Level Input Voltage (Note 2)
HIGH Level Output Voltage
LOW Level Output Voltage
Max
V
1.65 V ≤ VCC < 2.3 V
0.35 x VCC
2.3 V ≤ VCC ≤ 2.7V
0.7
2.7 V < VCC ≤ 3.6 V
0.8
1.65 V ≤ VCC ≤ 3.6 V; IOH = −100 mA
VCC − 0.2
VCC = 1.65 V; IOH = −6 mA
1.25
VCC = 2.3 V; IOH = −6 mA
2.0
VCC = 2.3 V; IOH = −12 mA
1.8
VCC = 2.3 V; IOH = −18 mA
1.7
VCC = 2.7 V; IOH = −12 mA
2.2
VCC = 3.0 V; IOH = −18 mA
2.4
VCC = 3.0 V; IOH = −24 mA
2.2
Unit
V
V
1.65 V ≤ VCC ≤ 3.6 V; IOL = 100 mA
0.2
VCC = 1.65 V; IOL = 6 mA
0.3
VCC = 2.3 V; IOL = 12 mA
0.4
VCC = 2.3 V; IOL = 18 mA
0.6
VCC = 2.7 V; IOL = 12 mA
0.4
VCC = 3.0 V; IOL = 18 mA
0.4
VCC = 3.0 V; IOL = 24 mA
0.55
V
II
Input Leakage Current
1.65 V ≤ VCC ≤ 3.6 V; 0 V ≤ VI ≤ 3.6 V
±5.0
mA
IOZ
3−State Output Current
1.65 V ≤ VCC ≤ 3.6 V; 0 V ≤ VO ≤ 3.6 V;
VI = VIH or VIL
±10
mA
IOFF
Power−Off Leakage Current
VCC = 0 V; VI or VO = 3.6 V
10
mA
ICC
Quiescent Supply Current (Note 3)
1.65 V ≤ VCC ≤ 3.6 V; VI = GND or VCC
20
mA
1.65 V ≤ VCC ≤ 3.6 V; 3.6 V ≤ VI, VO ≤ 3.6 V
±20
mA
DICC
Increase in ICC per Input
2.7 V < VCC ≤ 3.6 V; VIH = VCC − 0.6 V
750
mA
2. These values of VI are used to test DC electrical characteristics only.
3. Outputs disabled or 3−state only.
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4
74VCX16240
AC CHARACTERISTICS (Note 4; tR = tF = 2.0 ns; CL = 30 pF; RL = 500 W)
TA = −40°C to +85°C
VCC = 3.0 V to 3.6 V
Symbol
Parameter
VCC = 2.3 V to 2.7 V
VCC = 1.65 to 1.95V
Waveform
Min
Max
Min
Max
Min
Max
Unit
tPLH
tPHL
Propagation Delay
Input to Output
1
0.8
0.8
2.5
2.5
1.0
1.0
3.0
3.0
1.5
1.5
6.0
6.0
ns
tPZH
tPZL
Output Enable Time to
High and Low Level
2
0.8
0.8
3.5
3.5
1.0
1.0
4.1
4.1
1.5
1.5
8.2
8.2
ns
tPHZ
tPLZ
Output Disable Time From
High and Low Level
2
0.8
0.8
3.5
3.5
1.0
1.0
3.8
3.8
1.5
1.5
7.8
7.8
ns
tOSHL
tOSLH
Output−to−Output Skew
(Note 5)
0.75
0.75
ns
0.5
0.5
0.5
0.5
4. For CL = 50 pF, add approximately 300 ps to the AC maximum specification.
5. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
AC CHARACTERISTICS (tR = tF = 2.0 ns; CL = 50 pF; RL = 500 W)
TA = −40°C to +85°C
VCC = 3.0V to 3.6V
Symbol
Parameter
Waveform
Min
Max
VCC = 2.7V
Min
Max
Unit
tPLH
tPHL
Propagation Delay
Input to Output
3
1.0
1.0
3.9
3.9
5.3
5.3
ns
tPZH
tPZL
Output Enable Time to
High and Low Level
4
1.0
1.0
5.0
5.0
6.1
6.1
ns
tPHZ
tPLZ
Output Disable Time From
High and Low Level
4
1.0
1.0
4.4
4.4
4.8
4.8
ns
tOSHL
tOSLH
Output−to−Output Skew
(Note 6)
0.5
0.5
0.5
0.5
ns
6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
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5
74VCX16240
DYNAMIC SWITCHING CHARACTERISTICS
Symbol
VOLP
VOLV
VOHV
Condition
Typical
(TA = +25°C)
Unit
VCC = 1.8 V, CL = 30 pF, VIH = VCC, VIL = 0 V
0.25
V
VCC = 2.5 V, CL = 30 pF, VIH = VCC, VIL = 0 V
0.6
VCC = 3.3 V, CL = 30 pF, VIH = VCC, VIL = 0 V
0.8
VCC = 1.8 V, CL = 30 pF, VIH = VCC, VIL = 0 V
−0.25
VCC = 2.5 V, CL = 30 pF, VIH = VCC, VIL = 0 V
−0.6
VCC = 3.3 V, CL = 30 pF, VIH = VCC, VIL = 0 V
−0.8
VCC = 1.8 V, CL = 30 pF, VIH = VCC, VIL = 0 V
1.5
VCC = 2.5 V, CL = 30 pF, VIH = VCC, VIL = 0 V
1.9
VCC = 3.3 V, CL = 30 pF, VIH = VCC, VIL = 0 V
2.2
Characteristic
Dynamic LOW Peak Voltage (Note 7)
Dynamic LOW Valley Voltage (Note 7)
Dynamic HIGH Valley Voltage (Note 8)
V
V
7. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
8. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the HIGH state.
CAPACITIVE CHARACTERISTICS
Symbol
Condition
Typical
Unit
CIN
Input Capacitance
Parameter
Note 9
6
pF
COUT
Output Capacitance
Note 9
7
pF
CPD
Power Dissipation Capacitance
Note 9, 10 MHz
20
pF
9. VCC = 1.8 V, 2.5 V or 3.3 V; VI = 0 V or VCC.
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6
74VCX16240
VIH
Vm
OEn
0V
VIH
Dn
Vm
Vm
0V
tPLH
On
tPHL
Vm
VOH
Vm
tPHZ
tPZH
VOH
Vy
Vm
On
≈ 0V
tPZL
VOL
tPLZ
≈
VCC
Vm
On
WAVEFORM 1 − PROPAGATION DELAYS
tR = tF = 2.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Vx
VOL
WAVEFORM 2 − OUTPUT ENABLE AND DISABLE TIMES
tR = tF = 2.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Figure 4. AC Waveforms
Table 2. AC WAVEFORMS
VCC
Symbol
3.3 V ± 0.3 V
2.5 V ± 0.2 V
1.8 V ± 0.15 V
VIH
2.7 V
VCC
VCC
Vm
1.5 V
VCC/2
VCC/2
Vx
VOL + 0.3 V
VOL + 0.15 V
VOL + 0.15 V
Vy
VOH − 0.3 V
VOH − 0.15 V
VOH − 0.15 V
VCC
PULSE
GENERATOR
RL
DUT
RT
CL
6 V or VCC × 2
OPEN
GND
RL
Figure 5. Test Circuit
Table 3. TEST CIRCUIT
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
6 V at VCC = 3.3 ± 0.3 V;
VCC × 2 at VCC = 2.5 ± 0.2 V; 1.8 ± 0.15 V
tPZH, tPHZ
GND
CL = 30 pF or equivalent (Includes jig and probe capacitance)
RL = 500 W or equivalent
RT = ZOUT of pulse generator (typically 50 W)
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74VCX16240
VIH
Vm
OEn
0V
Dn
Vm
Vm
tPLH
On
VIH
tPHL
Vm
tPZH
0V
VOH
Vy
Vm
On
VOH
Vm
tPHZ
≈ 0V
tPZL
VOL
tPLZ
Vm
On
WAVEFORM 3 − PROPAGATION DELAYS
tR = tF = 2.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
≈ VCC
Vx
VOL
WAVEFORM 4 − OUTPUT ENABLE AND DISABLE TIMES
tR = tF = 2.0 ns, 10% to 90%; f = 1 MHz; tW = 500 ns
Figure 6. AC Waveforms
Table 4. AC WAVEFORMS
VCC
Symbol
3.3 V ± 0.3 V
2.7 V
VIH
2.7 V
2.7 V
Vm
1.5 V
1.5 V
Vx
VOL + 0.3 V
VOL + 0.3 V
Vy
VOH − 0.3 V
VOH − 0.3 V
VCC
PULSE
GENERATOR
RL
DUT
RT
CL
6V or VCC × 2
OPEN
GND
RL
Figure 7. Test Circuit
Table 5. TEST CIRCUIT
TEST
SWITCH
tPLH, tPHL
Open
tPZL, tPLZ
6 V at VCC = 3.3 ± 0.3 V;
VCC × 2 at VCC = 2.5 ± 0.2 V; 1.8 ± 0.15 V
tPZH, tPHZ
GND
CL = 50 pF or equivalent (Includes jig and probe capacitance)
RL = 500 W or equivalent
RT = ZOUT of pulse generator (typically 50W)
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8
74VCX16240
PACKAGE DIMENSIONS
TSSOP
DT SUFFIX
CASE 1201−01
ISSUE A
48X
ÉÉÉ
ÇÇÇ
ÇÇÇ
ÉÉÉ
ÇÇÇ
ÉÉÉ
K REF
0.12 (0.005)
M
T U
S
V
K
K1
S
T U
S
J J1
25
0.254 (0.010)
M
48
SECTION N−N
B
−U−
L
N
1
24
A
−V−
PIN 1
IDENT.
N
F
DETAIL E
D
0.076 (0.003)
−T− SEATING
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH OR GATE BURRS
SHALL NOT EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSIONS A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
C
M
0.25 (0.010)
−W−
G
H
DETAIL E
DIM
A
B
C
D
F
G
H
J
J1
K
K1
L
M
MILLIMETERS
MIN
MAX
12.40
12.60
6.00
6.20
−−−
1.10
0.05
0.15
0.50
0.75
0.50 BSC
0.37
−−−
0.09
0.20
0.09
0.16
0.17
0.27
0.17
0.23
7.95
8.25
0_
8_
INCHES
MIN
MAX
0.488
0.496
0.236
0.244
−−− 0.043
0.002
0.006
0.020
0.030
0.0197 BSC
0.015
−−−
0.004
0.008
0.004
0.006
0.007
0.011
0.007
0.009
0.313
0.325
0_
8_
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
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For additional information, please contact your local
Sales Representative
74VCX16240/D