DN05009/D Design Note – DN05009/D High Efficiency 3A Buck Regulator w/ Light Load Efficiency Device Application NCP3170A Consumer Electronic Input Voltage Output Voltage Output Current Topology 5V & 12V 1.0V-5.0V 3.0A Buck Key Features Circuit Description This circuit is proposed for a wide varying +12V input (4.5V-18V) where there is a need to step-down the voltage to various low voltage outputs from 1.0V to 5.0V. The requirement specified optimization of transient performance with only using two 22uF ceramic output capacitors. This design note shows how to utilize Type-III compensation with an OTA to build a high performance power supply. Target efficiency is >80% with a thermally acceptable board temperature. The NCP3170A is a synchronous PWM switching buck regulator which utilizes current mode control for simple power supply design. The NCP3170A operates from 4.5 V to 18 V, producing up to 3 A, and is capable of producing output voltages as low as 0.8 V. To reduce the number of external components, a number of features are internally set including soft start, power good detection, and switching frequency. The NCP3170A is currently available in an SOIC−8 package. High Efficiency (90mΩ/25mΩ MOSFETs) 4.5 V to 18 V Operating Input Voltage Range FMEA Fault Tolerant During Pin Short Test Fixed 500 kHz and 1 MHz PWM Operation Cycle−by−Cycle Current Monitoring PowerGood Pin for Power Sequencing Dedicated ENABLE pin Turn on Into Pre−bias Short Circuit Protection Fixed Switching Frequency Enhanced Light Load Efficiency Figure 1: NCP3170A Demonstration PCB Rev 0 - June, 2011 DN05009/D Figure 2: NCP3170A Pinout Table 1: Pin Description PIN PIN NAME 1 PGND 2 VIN 3 AGND 4 FB 5 COMP 6 EN 7 PG 8 VSW DESCRIPTION The power ground pin is the high current path for the device. The pin should be soldered to a large copper area to reduce thermal resistance. PGND needs to be electrically connected to AGND. The input voltage pin powers the internal control circuitry and is monitored by multiple voltage comparators. The VIN pin is also connected to the internal power PMOS switch and linear regulator output. The VIN pin has high di/dt edges and must be decoupled to ground close to the pin of the device. The analog ground pin serves as small-signal ground. All small-signal ground paths should connect to the AGND pin and should also be electrically connected to power ground at a single point, avoiding any high current ground returns. Inverting input to the OTA error amplifier. The FB pin in conjunction with the external compensation serves to stabilize and achieve the desired output voltage with current mode compensation. The loop compensation pin is used to compensate the transconductance amplifier which stabilizes the operation of the converter stage. Place compensation components as close to the converter as possible. Connect a RC network between COMP and AGND to compensate the control loop. Enable pin. Pull EN to logic high to enable the device. Pull EN to logic low to disable the device. Do not leave it open. Power good is an open drain 500uA pull down indicating output voltage is within the power good window. If the power good function is not used, it can be connected to the VSW node to reduce thermal resistance. Do not connect PG to the VSW node if the application is turning on into pre-bias. The VSW pin is the connection of the drains of the internal N and P MOSFETS. At switch off, the inductor will drive this pin below ground as the body diode and the NMOS conducts with a high dv/dt. Rev 0 - June, 2011 DN05009/D Figure 3: NCP3170A Block Diagram Rev 0 - June, 2011 DN05009/D Circuit Description The following solution is presented to support DC to DC power needs. The module has an input voltage range from 4.5 V to 18 V. The module provides one regulated output, but configurations are shown for 1.0 V to 5.0 V outputs. If the end-user requires a better transient response than can be obtained by using the OTA in its standard configuration (as shown in Figure 4A), then they can change the configuration to that shown in Figure 4B, where the OTA is treated like an error amplifier. The designer must be careful when using an OTA as an error amplifier in that the output current is much lower than a traditional error amplifier. A traditional error amplifier has a source sink current of 1 mA, where the NCP3170A OTA error amplifier has a source sink current of 20 µA. Since the NCP3170A has a limited source sink current, it is essential to limit the current running in the resistor divider to 10% to 30% of the source sink current of the OTA. To choose an output voltage and limit the resistor divider current, the equations in Figure 5 can be used. Figure 4: Typical Transconductance Amplifier Configuration A and OTA Configured Like an Error Amplifier B Figure 5: Selection of Resistor Divider Impendence Rev 0 - June, 2011 DN05009/D Performance Information The following figures show typical performance of the evaluation board. 5 V NCP3170A Efficiency 100 90 80 60 50 40 30 20 10 Output Current (A) Figure 6: NCP3170A 5 V Efficiency Rev 0 - June, 2011 1.2V 3 2.8 2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 Efficiency (%) 70 1.8V DN05009/D 12 V NCP3170 Efficiency 100 90 80 60 50 40 30 20 10 Output Current (A) 1.2V Figure 7: NCP3170A 12 V Efficiency Rev 0 - June, 2011 1.8V 3 2.8 2.6 2.4 2.2 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 Efficiency (%) 70 3.3V 5.0V DN05009/D Schematic Figure 8: NCP3170A 12 V to 1.2 V Schematic Rev 0 - June, 2011 DN05009/D Table 2: BOM for the NCP3170A 12 V to 1.2 V Design Reference C3 CF CC CHF CP C2 C4‐5 C8 C6 C1 C7 LOUT U1 R2 R3 R4 RC R1 RF Qty 1 1 1 1 1 3 1 1 1 1 1 1 1 1 1 1 1 Description SMT Ceramic Capacitor SMT Ceramic Capacitor SMT Ceramic Capacitor SMT Ceramic Capacitor SMT Ceramic Capacitor SMT Ceramic Capacitor SMT Ceramic Capacitor Surface Mount E‐Cap Surface Mount E‐Cap SMT Inductor Switching PWM Regulator SMT Resistor SMT Resistor SMT Resistor SMT Resistor SMT Resistor SMT Resistor Value Tolerance 1uF ±10% 150pF ±5% 390pF ±5% 47pF ±5% 10pF ±5% 22uF ±20% NI ±10% NI ±20% NI ±20% 2.5uH 20% 500kHz NA 182k ±1.0% 100k ±1.0% 20R ±1.0% 68.1k ±1.0% 90.9k ±1.0% 1k ±1.0% Footprint 603 603 603 603 603 1210 1210 (8mm x 6.2)mm (8.3 x 8.3)mm (10.2x 10.2 x 6.4)mm SOIC8 603 603 603 603 603 603 Rev 0 - June, 2011 Manufacturer TDK Murata TDK AVX AVX AVX Manufacturer Part Number C1608X5R1E105K GRM1885C1H151JA01D C1608C0G2E391J 06035A470JAT2A 06035A100JAT2A 12103D226MAT2A Wurth ON Semiconductor Vishay / Dale Vishay / Dale Vishay / Dale Vishay / Dale Vishay / Dale Vishay / Dale 7447798250 NCP3170A CRCW0603182KFKEA CRCW0603100KFKEA CRCW060320R0FKEA CRCW060368K1FKEA CRCW060390K9FKEA CRCW06031K00FKEA DN05009/D Table 3: BOM Changes to Achieve Desired Output VIN (V) Vout (V) C2 (μF) Lout (μH) 12 12 12 12 12 12 12 12 5 5 5 5 5 5 1.0 1.1 1.2 1.5 1.8 2.5 3.3 5.0 1.0 1.1 1.2 1.5 1.8 3.3 22 X 1 22 X 1 22 X 1 22 X 1 22 X 1 22 X 1 22 X 1 22 X 1 22 X 1 22 X 1 22 X 1 22 X 2 22 X 2 22 X 3 2.5 2.5 2.5 3.6 3.6 4.7 4.7 7.2 2.5 2.5 2.5 3.6 3.6 1.8 Bias Current Percentage (Resistor Divider Current / OTA Maximum Current ) 20 20 20.2 20.1 19.6 19.7 19.7 26.6 20 20 20.2 20.1 19.6 19.7 R1 (kΩ) R2 (kΩ) Rf (kΩ) Cf (pF) Cc (pF) Rc (kΩ) Cp (pF) 49.9 75 90.9 174 255 432 634 787 49.9 75 90.9 174 255 634 200 200 182 200 205 200 200 150 200 200 182 200 205 200 1 1 1 1 1 1 1 1 1 1 1 1 1 1 68 56 47 56 56 47 27 18 82 47 47 47 47 27 390 390 390 220 220 150 100 68 390 220 220 82 82 47 68.1 68.1 68.1 97.6 97.6 82.5 95.3 95.3 78.8 110 110 110 110 95.3 10 10 10 10 10 12 12 12 6.8 4.7 6.8 8.2 10 12 Rev 0 - June, 2011 DN05009/D Figure 9: Layout Top Rev 0 - June, 2011 DN05009/D Figure 10: Layout Bottom Rev 0 - June, 2011 DN05009/D Each power supply in Table 3 was stabilized and the resulting frequency response met the stability criteria when measured at a load of 3 A and 1.5 A. Each power supply was then subjected to transient currents that slewed at 2.5 A/µs and the results were recorded for both over shoot and undershoot as shown in Figures 11 and 12. The transient response was taken from 3 A to 100 mA and is recorded for each case in Figures 13 through 27. It is important to note that the transient performance can be improved by increasing the bandwidth or adding output capacitance. The following is an effort to use two 22µF ceramic capacitors while keeping the positive and negative voltage excursions below 20% of the regulated output voltage. The designer could achieve better results be placing more capacitance on the output of the power stage while maintaining the same bandwidth. Figure 11: Transient Capture of 12 V to 1.5 V, 0 A to 3 A Figure 12: Transient Capture of 12 V to 1.5 V, 1.5 A to 3 A Rev 0 - June, 2011 DN05009/D Transient Voltage vs. Transient Step at 2.5A/µs 200 225 175 200 Transient Voltage Deviation (mV) Transient Voltage Deviation (mV) Transient Voltage vs. Transient Step at 2.5A/µs 150 125 100 75 50 25 0 175 150 125 100 75 50 25 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 0 Transient Current (A) Negative 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 Transient Current (A) Positive Negative Positive Figure 14: 5 V to 1.1 V Transient Voltage Graph Transient Voltage vs. Transient Step at 2.5A/µs Transient Voltage vs. Transient Step at 2.5A/µs 250 275 225 250 Transient Voltage Deviation (mV) Transient Voltage Deviation (mV) Figure 13: 5 V to 1 V Transient Voltage Graph 200 175 150 125 100 75 50 25 225 200 175 150 125 100 75 50 25 0 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 0 3 3 Transient Current (A) Transient Current (A) Negative 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 Negative Positive Figure 15: 5 V to 1.2 V Transient Voltage Graph Positive Figure 16: 5 V to 1.5 V Transient Voltage Graph Rev 0 - June, 2011 DN05009/D Transient Voltage vs. Transient Step at 2.5A/µs 325 300 275 250 225 200 175 150 125 100 75 50 25 0 180 Transient Voltage Deviation (mV) Transient Voltage Deviation (mV) Transient Voltage vs. Transient Step at 2.5A/µs 160 140 120 100 80 60 40 20 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 ‐3.11E‐15 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 Transient Current (A) Negative Transient Current (A) Positive Negative Figure 17: 5 V to 1.8 V Transient Voltage Graph Positive Figure 18: 12 V to 1.0 V Transient Voltage Graph Transient Voltage vs. Transient Step at 2.5A/µs Transient Voltage vs. Transient Step at 2.5A/µs 200 250 175 225 Transient Voltage Deviation (mV) Transient Voltage Deviation (mV) 3 150 125 100 75 50 25 0 200 175 150 125 100 75 50 25 0 ‐3.11E‐15 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 0 Transient Current (A) Negative 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 Transient Current (A) Positive Negative Figure 19: 12 V to 1.1 V Transient Voltage Graph Positive Figure 20: 12 V to 1.2 V Transient Voltage Graph Rev 0 - June, 2011 DN05009/D Transient Voltage vs. Transient Step at 2.5A/µs 300 275 250 225 200 175 150 125 100 75 50 25 0 Transient Voltage Deviation (mV) Transient Voltage Deviation (mV) Transient Voltage vs. Transient Step at 2.5A/µs 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 375 350 325 300 275 250 225 200 175 150 125 100 75 50 25 0 0 3 Transient Current (A) Negative 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 Transient Current (A) Positive Negative Positive Figure 21: 12 V to 1.5 V Transient Voltage Graph Figure 22: 12 V to 1.8 V Transient Voltage Graph Transient Voltage vs. Transient Step at 2.5A/µs Transient Voltage vs. Transient Step at 2.5A/µs 450 Transient Voltage Deviation (mV) Transient Voltage Deviation (mV) 500 400 350 300 250 200 150 100 50 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 0 Transient Current (A) Negative 750 700 650 600 550 500 450 400 350 300 250 200 150 100 50 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 Transient Current (A) Positive Negative Figure 23: 12 V to 2.5 V Transient Voltage Graph Positive Figure 24: 12 V to 3.3 V Transient Voltage Graph Rev 0 - June, 2011 DN05009/D Maximum Transient Voltage 1.5A to 3A Transient Step at 2.5A/µs 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 Transient Current (A) Negative Positive 10% 9% 8% 7% 6% 5% 4% 12V 5V Figure 26: Transient Voltage for 1.5 A to 3 A Maximum Transient Voltage 0A to 3A Transient Step at 2.5A/µs 22.0% 21.5% 21.0% 20.5% 20.0% 19.5% 19.0% 18.5% 18.0% 17.5% 17.0% 16.5% 16.0% 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5 Voltage Deviation From Nominal (%) 11% Output Voltage (V) Figure 25: 12 V to 5.0 V Transient Voltage Graph Output Voltage (V) 12V 12% 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 4 4.2 4.4 4.6 4.8 5 900 850 800 750 700 650 600 550 500 450 400 350 300 250 200 150 100 50 0 Voltage Deviation From Nominal (%) Transient Voltage Deviation (mV) Transient Voltage vs. Transient Step at 2.5A/µs 5V Figure 27: Maximum Transient Voltage for 0 A to 3A Rev 0 - June, 2011 DN05009/D Disclaimer: ON Semiconductor is providing this design note “AS IS” and does not assume any liability arising from its use; nor does ON Semiconductor convey any license to its or any third party’s intellectual property rights. This document is provided only to assist customers in evaluation of the referenced circuit implementation and the recipient assumes all liability and risk associated with its use, including, but not limited to, compliance with all regulatory standards. ON Semiconductor may change any of its products at any time, without notice. Design note created by Bryan McCoy, e-mail: [email protected] Rev 0 - June, 2011