View detail for Daisy Chaining of Atmel ATA6836C/ATA6838C

APPLICATION NOTE
Daisy Chaining of Atmel ATA6836C/ATA6838C
ATA6836C/ATA6838C
Scope
This application note describes the daisy-chaining procedure using Atmel® ATA6836C and
ATA6838C.
Daisy-chaining Procedure Using Atmel ATA6836C
Daisy chaining is a common method to connect several SPI slaves to a single microcontroller SPI port. A single microcontroller SPI port can be shared by utilizing daisy chaining.
All Atmel intelligent load drivers with SPI interface support this method. The Atmel
ATA6836C/ATA6838C’s daisy-chaining behavior, however, differs from the standard daisychaining procedure. In this application note the ATA6836C represents the two Atmel driver
devices ATA6836C and ATA6838C.
The daisy-chain arrangement requires only one of each SPI line: Chip select (CS), data in
(DI), data out (DO) and clock (CLK), see Figure 1 on page 2. The data signal is handed
over from one Atmel ATA6836C to the next one stepwise as long as the CS signal remains
low. This causes, however, longer reaction times since several programming cycles are
needed to load the designated setting into each Atmel ATA6836C.
The DI pin of the first IC acts as input for all ICs while the DO pin of the last IC serves as
output for the entire chain. The data word for the last IC has to be sent first, followed by the
data word for the second-to-last IC, and so on.
9246C-AUTO-03/15
Figure 1.
Daisy-chain Operation with Microcontroller and Watchdog
VCC
Enable
Trigger
Reset
Watchdog
Microcontroller
INH
INH
ATA6836C
ATA6836C
CS
DI DO CLK
CS
DI
DO
CLK
VCC
2
ATA6836C/ATA6838C [APPLICATION NOTE]
9246C–AUTO–03/15
CS
DI DO CLK
INH
ATA6836C
CS
DI DO CLK
INH
ATA6836C
CS
DI DO CLK
1.
Basic Daisy-chaining Principle
Table 1-1 shows the basic principle of how data words are shifted through daisy-chained ATA6836C ICs. Unlike with other
Atmel driver family members, (nx2)-1 shifts are needed for writing a command into the n. Atmel® ATA6836C IC.
Table 1-1.
Basic Method of Shifting Data Words through Daisy-chained Atmel ATA6836C ICs
I/O Cycle
1
2
3
4
5
6
7
IC Number 1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
1
2
3
4
DI
A
x
x
x
B
x
x
x
C
A
x
x
D
B
x
x
E
C
A
x
F
D
B
x
G
E
C
A
DO
x
x
x
x
x
x
x
x
A
x
x
x
B
x
x
x
C
A
x
x
D
B
X
x
E
C
A
x
2.
Revision History
Please note that the following page numbers referred to in this section refer to the specific revision mentioned, not to this
document.
Revision No.
History
9246C-AUTO-03/15
Put document in the latest template
ATA6836C/ATA6838C [APPLICATION NOTE]
9246C–AUTO–03/15
3
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