AVR2023 - AT86RF231 PCB reference design for antenna diversity Features • • • • 802.15.4 compliant 2.4 GHz transceiver Hardware supported antenna diversity 1.8 V to 3.6 V operation Low current consumption - Typ. 600 nA (Sleep) - Typ. 8 mA (TRX_OFF) - Typ. 22 mA (TX, output power +3 dBm) Application Note 1 Introduction The AT86RF231 diversity board demonstrates the capabilities of the 802.15.4 compliant 2.4 GHz radio transceiver AT86RF231. With the high performance ATmega1281V AVR microcontroller it serves as a full function network node that is capable of hosting a MAC implementation driven by two AAA batteries for more than one year. Two ceramic chip antennas increase the link budget in a typical indoor scenario with multipath fading effects. Figure 1-1. AT86RF231 – Antenna Diversity Board Rev. 8182A-AVR-08/08 2 General The board mainly consists of two sections: The microcontroller ATmega1281V and the radio transceiver AT86RF231. Figure 2-1 AT86RF231 diversity board overview 32 kHz 3.68 MHz Expansion Connector 1 ATmega1281 16 MHz SPI + control signals AT86RF231 Expansion Connector 2 Pushbutton LEDs ID EEPROM The microcontroller ATmega1281V controls the 802.15.4 compliant radio transceiver AT86RF231 and serves as a SPI master. The transceiver handles all 802.15.4 actions concerning RF modulation/demodulation, signal processing and frame reception. Several MAC hardware acceleration functions are implemented in the transceiver. To increase the link budget in a multipath environment, two antennas serve as an antenna diversity system. The antenna switching can be configured to be automatically handled by the transceiver. All components are placed on one side of a double-layer 1.5 mm FR4 printed circuit board, giving a low cost manufacturing solution. 2.1 Power Supply The board is powered by a single supply voltage in the range of 1.8 V – 3.6 V, which makes it possible to be powered by two 1.5 V cells. Optionally the power can be supplied externally. All semiconductors are supplied by this power, reducing component count and power losses of voltage converters. Battery power For autonomous operation of the node the board can be powered by two AAA batteries that are held by the battery clip on the back of the board. To manually switch on/off the board, the power switch SW1 can be used. The microcontroller software is responsible for appropriate sleep / wakeup cycles of the system to reach a reliable lifetime of the batteries. A small calculation example is given as follows. For calculation of the battery lifetime in a typical 802.15.4 scenario, it can be assumed that the node is sleeping most of the time and is in active states (RX or TX) for a small slice of time. Assuming a sleep / wake cycle Ts of 8 seconds and an active time 2 AVR2023 8182A-AVR-08/08 AVR2023 ta of 40 ms, which is sufficient for sending and receiving a frame, the battery lifetime of two AAA batteries (each of 1000 mAh) can be estimated as follows: Iactive = 22 mA, Isleep = 1 uA (see Table 3-1) Ts = 8 s, ta = 40 ms tBatt = 1000 mAh / [ (Ts – ta)/Ts * 1 uA + ta/Ts * 22 mA ] tBatt = 9009.4 h > 1 year The board can serve as an end device (RFD) for more than one year. External power When used as a daughter board in a more complex system, the board can be powered by the expansion connectors. For pin mapping see Table 2-1. In this case the power switch has to be in OFF position to avoid unintentionally charging of the batteries, if they are applied. 2.2 Microcontroller The ATmega1281V is a low-power 8-bit microcontroller based on the AVR enhanced RISC architecture. The non-volatile flash program memory of 128 kB and 8 kB of internal SRAM, supported by a rich set of peripheral units, makes it suitable for a full function sensor network node. The controller is capable of operating as a PAN-coordinator, a full function device (FFD) as well as a reduced function device (RFD), as defined in the standard IEEE 802.15.4. 2.3 RF Section The transceiver AT86RF231 contains all RF critical components necessary to transmit and receive a 802.15.4 compliant modulated 2.4 GHz signal. External components are reduced to decoupling capacitors and the crystal. The differential 100 Ohm RF signal is converted into a single ended 50 Ohm signal by the balun (B1) and routed to the antennas via the RF switch (U5). The switch is controlled by the DIG1 pin. It can be set manually or be handled by the diversity decision algorithm of the transceiver, which detects the optimal antenna (see [3] for more details). The crystal is isolated from fast switching digital signals and surrounded by the ground plane to minimize disturbances of the oscillation. 2.4 Clock Sources Radio Transceiver The Radio Transceiver is clocked by the 16 MHz reference crystal Q1. The 2.4 GHz modulated signal is derived from this clock, therefore the frequency should not exceed a deviation of +/- 40 ppm, as specified in IEEE 802.15.4. The frequency is mainly determined by the external load capacitance of the crystal which depends on the crystal type and is given in its datasheet. The AT86RF231 diversity board uses a SIWARD crystal SX4025 with two load capacitors of 10 pF. To compensate fabrication and environment variations the frequency can be tuned with the transceiver register “XOSC_CTRL (0x12)”, for more detailed information see [2]. 3 8182A-AVR-08/08 Microcontroller There are various clock source options for the microcontroller ATmega1281V. • 8 MHz calibrated internal RC oscillator • 128 kHz internal RC oscillator • 3.6872 MHz ceramic resonator • CLKM 1..16 MHz (transceiver clock) The 8 MHz calibrated internal RC oscillator is used as the default clocking. The CLKM signal, generated by the transceiver, is connected to T1 (PD6) of the AVR and can be used as a symbol synchronous counter as well as a reference clock for calibration of the internal RC oscillator. Optionally the AVR can be clocked directly from the CLKM signal, for this purpose the 0 Ohm resistor R105 has to be soldered to R102. A 32 kHz crystal is connected to the AVR pins (TOSC1, TOSC2) to be used as a low power real time clock. The connection of the SLP_TR pin of the transceiver to the OC2A pin (PB4) of the AVR makes it possible to wake up both the microcontroller and the transceiver simultaneously from a Timer 2 Output Compare Match. This saves valuable time in a cycled sleep / wakeup network scenario. 2.5 Antennas Two ceramic chip antennas are placed at the top of the board in an orthogonal configuration. This results in diversification of space and polarization and can greatly reduce multipath fading effects (see performance results in section 3.2). The transceiver can be configured to select an antenna via register setting, or to automatically select the antenna depending on the receive signal. The RF switch requires a complementary switching signal which is generated by a dual inverter (U6) whose input is the transceiver signal DIG1. To minimize sleep current, the inverter is supplied by DVDD - the output of the 1.8 V internal voltage regulator of the transceiver. This ensures the inverter to shut off when the transceiver goes to sleep mode. To reduce switching harmonics the switch control signals as well as the supply voltage of the dual inverter are filtered by RC combinations, see Appendix A Schematics. 2.6 Peripherals For simple applications and debugging purposes, a basic user interface is mounted directly on the board, consisting of a pushbutton and three red LEDs. For more sophisticated applications, two Expansion connectors give access to all spare AVR pins, including USART, TWI, ADC, PWM and external memory pins. 4 AVR2023 8182A-AVR-08/08 AVR2023 Figure 2-2 Connection of the on-board peripherals V CC D3 D2 D1 R6 470 R5 470 R4 470 T1 Table 2-1 Expansion Connector Mapping EXT0 EXT1 Pin# Function Pin# Function Pin# Function Pin# Function 1 PB6 2 PB7 1 PB1 (SCK) 2 GND 3 #RESET 4 VCC 3 PE7 4 PE6 5 GND 6 XTAL2 5 PE5 6 PE4 7 XTAL1 8 GND 7 PE3 8 PE2 9 PD0 (SCL) 10 PD1 (SDA) 9 PE1 (PDO) 10 PE0 (PDI) 11 PD2 (RXD1) 12 PD3 (TXD1) 11 AGND 12 AREF 13 PD4 14 PD5 13 PF0 14 PF1 15 PD6 (CLKM) 16 PD7 15 PF2 16 PF3 17 PG0 (#WR) 18 PG1 (#RD) 17 PF4 (TCK) 18 PF5 (TMS) 19 GND 20 GND 19 PF6 (TDO) 20 PF7 (TDI) 21 PC0 22 PC1 21 Vcc 22 GND 23 PC2 24 PC3 23 PA0 24 PA1 25 PC4 26 PC5 25 PA2 26 PA3 27 PC6 28 PC7 27 PA4 28 PA5 29 GND 30 PG2 (ALE) 29 PA6 30 PA7 2.7 ID EEPROM To identify the board type by software an identification EEPROM is mounted. Information about the board, the node MAC address and production calibration values can be stored here. An Atmel AT25010A with 128x8 bit organization and SPI interface is used because of its small package and low voltage and low power operation. 5 8182A-AVR-08/08 For interfacing the EEPROM the SPI bus is shared with the transceiver. The select signal for each of the SPI slave (EEPROM, transceiver) is decoded with the reset line RSTN of the transceiver. Therefore, the EEPROM is addressed when the transceiver is held in reset (RSTN = 0), as shown in Figure 2-3. Figure 2-3 EEPROM access decoding logic PB6 (R STN ) R STN SELN_TRX 1 PB0 (SS) Transceiver SPI EEPR O M SELN_EE 1 The EEPROM data is written during board production test. A unique serial number, the MAC address as well as calibration values are stored. These can be used to optimize system performance. The following table gives the data structure of the EEPROM. Table 2-2 ID EEPROM mapping 6 Address Name Type Description 0x40 MAC address uint64 MAC address for the 802.15.4 node, little endian byte order 0x48 Serial Number uint64 Board serial number, little endian byte order 0x50 Board Family uint8 Internal board family identifier 0x51 Revision uint8[3] Board revision number ##.##.## 0x54 Feature uint8 Board features, coded into 7 Bits 7 Reserved 6 Reserved 5 External LNA 4 External PA 3 Reserved 2 Diversity 1 Antenna 0 SMA connector 0x55 Cal OSC 16 MHz uint8 RF231 XTAL calibration value, register “XTAL_TRIM” 0x56 Cal RC 3.6 V uint8 AVR internal RC oscillator calibration value @ 3.6 V, register “OSCCAL” 0x57 Cal RC 2.0 V uint8 AVR internal RC oscillator calibration value @ 2.0 V, register “OSCCAL” 0x58 Antenna Gain int8 Antenna gain [1/10 dBi] AVR2023 8182A-AVR-08/08 AVR2023 0x60 Board Name char[30] Textual board description 0x7E CRC uint16 16 Bit CRC checksum, standard ITU-T generator polynomial G16(x) = x16+x12+x5+1 3 Performance 3.1 Current consumption Typical values for current consumption of the whole board in active states (no sleep / wakeup cycles). Table 3-1 Current consumption Supply voltage [V] TRX_OFF [mA] RX [mA] TX [mA] SLEEP [uA] 5 8 12 17 21 24 19 23 26 0.2 0.6 1.2 1.8 3 3.6 3.2 Diversity Effect Due to multipath propagation interference effects between network nodes, the receive signal strength may strongly vary, even for small changes of the propagation conditions, affecting the link quality. These fading effects can result in an increased error floor or loss of the connection between devices. Figure 3-1 Receive level for each antenna in a multipath fading scenario -40 -45 receive signal strength [dBm] ANT 2 ANT 1 -50 -55 -60 -65 -70 -75 -80 -85 -90 0 200 400 600 800 1000 1200 1400 position [mm] For a given position inside a network scenario with multipath fading effects, both antennas differ in their receive level (see Figure 3-1). This affects the packet error rate for small receive levels. Switching between both antennas and selecting the one that receives better can increase the reliability of a connection. For a detailed analysis see [3]. 7 8182A-AVR-08/08 D C B 1 CLK M ICP1 IRQ RSTN SLP_TR M ISO M O SI SCK SEL AG N D Transceiver RCB231ED _radio_V 4.1.1.sch V dd AR EF AVC C C 108 100n L103 W uerth74279266 C 101 100n L102 W uerth74279266 L101 W uerth74279266 V CC C 110 100n V CC R 102 R 105 NC 0 2 XTAL_1 PD 6 IC P1 IR Q PB5 PB4 M ISO M O SI PB1 PB0 R5 470 D2 rot R4 470 D1 rot T1 KnitterTSS31N R6 470 D3 rot V CC V CC 16 PB6 3 V CC 15 PB5 C 109 10n C 106 22p #R ESET AG N D AAAx2 C 107 22p 4 PF0 AR EF AVR2023 8182A-AVR-08/08 4 Plug2 AM P 2−331677−2 (32kH z) C FPX−157 Q 102 Batt1 PB6(O C1B/PCIN T6) PB5(O C1A /PCIN T5) PB4(O C2A /PCIN T4) PB3(M ISO /PCIN T3) PB2(M O SI/PCIN T2) PB1(SCK /PCIN T1) PB0(/SS/PCIN T0) PE7(ICP3/CLK O /IN T7) PE6(T3/IN T6) PE5(O C3C/IN T5) PE4(O C3B/IN T4) PE3(O C3A /A IN 1) PE2(X CK 0/A IN 0) PE1(TX D 0/PD O ) PE0(RX D 0/PCIN T8/PD I) PG 5(O C0B) Plug1 AM P 2−331677−2 BAS140W 10k D4 1 2 A K R 101 14 13 M ISO PB4 12 M O SI 11 9 PE7 PB1 8 10 PE6 PB0 7 5 PE4 PE5 4 6 PE3 3 2 PE2 PE1 PE0 1 17 PB7 A 3 65 GND AVC C 64 A V cc PB7(O C0A /O C1C/PCIN T7) 63 AGND 62 PG 3(TO SC2) 18 61 20 #R ESET A REF PF1 VC C PG 4(TO SC1) 19 60 PF2 PF0(A D C0) RESET 21 PF1(A D C1) V cc PF3 IC 2 ATM EG A_1281 X TA L2 3 C 103 100n V CC 1 XTAL_2 XTAL_1 SW 1 Eao09.10201.02 (RS−204−7871) 5 NC R 104 5 NC R 103 C 104 C 105 10p 10p C 102 100n Q 101 V CC C STC C 3.68G −A 23 2 XTAL1 XTAL2 25 IR Q 59 PF5 26 PF2(A D C2) PF4 24 PF6 27 X TA L1 2 PF7 28 PD 1 GND 22 58 PF3(A D C3) 57 PF4(A D C4/TCK ) 56 PF5(A D C5/TM S) PA0 PD 2 PD 0(SCL/IN T0) 54 PF7(A D C7/TD I) 55 PF6(A D C6/TD O ) PA1 PD 3 PD 1(SD A /IN T1) PA2 29 PD 2(RX D 1/IN T2) 53 GND 51 IC P1 PD 3(TX D 1/IN T3) 52 V cc PD 4(ICP1) 50 PA 0(A D 0) 49 PA 1(A D 1) PD 5(X CK 1) 30 PD 5 PA 2(A D 2) PD 6(T1) 31 PD 7(T0) 32 PD 6 8 PD 7 1 PG 0(/W R) PG 1(/RD ) PC0(A 8) PC1(A 9) PC2(A 10) PC3(A 11) PC4(A 12) PC5(A 13) PC6(A 14) PC7(A 15) PG 2(A LE) PA 7(A D 7) PA 6(A D 6) PA 5(A D 5) PA 4(A D 4) PA 3(A D 3) PC 6 PC 5 PC 4 PC 3 PC 2 PC 1 PC 0 PG 1 PG 0 41 40 39 38 37 36 35 34 33 RF2 RF3 S/N S/N 6 M AC S/N REFTO P REFTO P REFTO P RF1 PA7 PC 7 42 PA6 45 PG 2 PA5 46 44 PA4 47 43 PA3 48 6 PC 1 PC 3 PC 5 PC 7 PG 2 PD 1 PD 3 PD 5 PD 7 PG 1 XTAL2 PB7 PA1 PA3 PA5 PA7 PE6 PE4 PE2 PE0 AR EF PF1 PF3 PF5 PF7 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 SFM −115−L2−S−D −LC 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 EXT0 7 ZLIN K_LO G O A tm el Logo3 ATM EL_LO G O A tm el Logo1 PA0 PA2 PA4 PA6 PB1 PE7 PE5 PE3 PE1 AG N D PF0 PF2 PF4 PF6 SFM −115−L2−S−D −LC 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 EXT1 A tm el+ ZLink Logo foreach PCB side V CC 7 ZLIN K_LO G O 8 A tm el Logo4 ATM EL_LO G O A tm el Logo2 PC 0 PC 2 PC 4 PC 6 XTAL1 IR Q PD 2 IC P1 PD 6 PG 0 PB6 #R ESET V CC 8 D C B A 4 Appendix A Schematics D C VDD 1 C6 100n VDD C7 100n left open U 2B N C7W V 04 SEL RSTN R1 1M VDD PB0 PB5 3 4 1 6 5 7 N C7W P32 1 U 4B 3 N C7W P32 U 2A N C7W V 04 2 1 U 4A 2 SEL & #RSTN SEL & RSTN R3 n.b. EEW P# M ISO R2 1M VDD 4 3 2 1 GND 3 A T25010A SI SCK #H O LD V CC A T25010A #W P SO #CS U3 5 6 7 8 VDD M O SI PB1 C5 100n 4 4 IRQ M O SI M ISO SCK CLK M V dd SLP_TR ICP1 VDD 5 C1 47uF/6V 5 C22 1.5p C14 1uF CLK M C4 1uF R7 470 11 16 15 14 13 12 10 PB4 9 ICP1 DVDD PB5 DVDD IRQ SEL# M O SI M ISO PB1 D V SS D EV D D DVDD DVDD D V SS SLP_TR D IG 2 D IG 1 8 6 D IG 1 RFN RFN RFP RFP DVDD 3 M LF32 AT86R F231 2 7 U _RCB231ED _antenna_V 4 RCB231ED _antenna_V 4.1.1.sch RSTN CLK M 17 D V SS D V SS 18 6 A V SS 5 M ISO 20 SCLK 19 RFN 4 RFP D V SS 21 1 D IG 4 A V SS M O SI 22 D IG 3 SEL 24 IRQ 23 B 1 3 D IE X TA L2 X TA L1 A V SS EV D D AVDD A V SS A V SS A V SS 33 25 26 27 28 29 30 31 32 U1 A T86RF231 7 VDD 1uF C12 C9 10p Q 1 16M H z /CL=10pF 1 3 C11 1uF 2 A 2 4 8182A-AVR-08/08 6 1 C10 10p 8 D C B A AVR2023 9 D C B 1 D IG 1 R9 2k2 23848 2 2 GND 3 2 1 Y1 Y2 V CC N C7W V 04 A2 GND A1 1 U6 4 RFSW 2 5 6 RFSW 1 23847 C2 2.2pF 2 nc A 0 0 0 C34 NC 0 C32 NC GND 0 C36 NC C33 NC 20700 C35 0.56pF 0 GND C37 NC C38 NC A1 2.45G H z 3 GND 19761 C17 100n R8 2k2 23848 RFSW 1 2k2 23848 R 10 mm 0 4.3 5.1 5.9 6.7 7.5 8.3 9.1 9.9 10.7 A ntenna Tuning Line Scale 1 3 DVDD 4 4 GND 19768 C8 22pF 3 19768 C15 22pF GND 2 A 1 D IG 1 Balanced P1 3 1 J3 V2 H J2 V 1 = !V 2 V1 H 4 2 D C_G N D GND J1 unbalanced 6 GND 5 1 RFN 5 5 Balun_SM D GND 19768 C13 22pF B1 6 19768 C16 22pF nc U5 A S222−92 Balanced P2 4 5 RFP 2k2 23848 R 11 0 0 0 C46 NC 0 C48 NC 23847 C3 2.2pF A2 2.45G H z RFSW 2 mm 10.7 9.9 9.1 8.3 7.5 6.7 5.9 5.1 4.3 0 A ntenna Tuning Line Scale GND C44 NC 0 C42 NC C47 NC 20700 0 C45 0.56pF C43 NC GND 6 2 nc A 1 10 AVR2023 8182A-AVR-08/08 7 8 C B A AVR2023 5 Appendix B Layout Copper Top Side Copper Bottom Side 11 8182A-AVR-08/08 Assembly Drawing 6 Appendix C BOM 12 Quantity Designator Comment Footprint Description 9 C5, C6, C7, C17, C101, C102, C103, C108, C110 100n 0402A Capacitor 6 C8, C13, C15, C16, C106, C107 22p, 22pF 0402A Capacitor 4 C4, C11, C12, C14 1uF 0603H0.8 Capacitor 4 C9, C10, C104, C105 10p 0402A Capacitor 4 R4, R5, R6, R7 470 0402, 0402A Resistor 4 R8, R9, R10, R11 2k2 0402A Resistor 3 D1, D2, D3 red LED0603 LED, red 3 L101, L102, L103 Wuerth74279266 0603H0.8 Inductor 2 A1, A2 2.4GHz ANT_AT45_45 deg Ceramic Antenna 2 C2, C3 2.2pF 0402A Capacitor AVR2023 8182A-AVR-08/08 AVR2023 2 C35, C45 0.56pF 0402A Capacitor 2 EXT0, EXT1 SFM-115-L2-S-DLC SFM15 Connector 15x2 pin 2 Plug1, Plug2 AMP 2-331677-2 2 R1, R2 1M 0402 Resistor 2 U2, U4 NC7WP32, NC7WV04 SC-70-6, SC70-8 Dual 2 Input OR Gate 1 B1 Balun_SMD 0805-6 BALUN 1 Batt1 AAAx2 BH-421-3 Battery clip 1 C1 47uF/6V TANTAL_C Electrolytic Capacitor 1 C109 10n 0402A Capacitor 1 C22 1.5p 0402 Capacitor 1 D4 BAS140W SOD-323 Silicon AF Schottky Diode 1 IC2 ATMEGA_1281V MLF64-M2 8-bit AVR uC 1 Q1 16MHz / CL=10pF XTAL_4X2_5_ small Crystal Siward A207-011 1 Q101 CSTCC3.68G-A CSTCC Ceramic resonator 1 Q102 CFPX-157 CFPX Crystal Battery clip plug 1 R101 10k 0402A Resistor 1 R105 0 0402A Resistor 1 SW1 Eao09.10201.02 EAO1XUM Switch 1W 1 T1 Knitter TSS31N Taster_ITT Miniature Button 1 U1 AT86RF231 MLF-32 802.15.4 2.4GHz Radio Transceiver 1 U3 AT25010A Mini-Map-8 128 x 8 EEPROM Atmel 1 U5 AS222-92 SC-70/6 RF Switch Skyworks 1 U6 NC7WV04 SC-70/6 Dual inverter, ULP 7 References [1] Datasheet ATmega1281V [2] Datasheet AT86RF231 [3] AVR2021: AT86RF231 Antenna Diversity 8 EVALUATION BOARD/KIT IMPORTANT NOTICE This evaluation board/kit is intended for use for FURTHER ENGINEERING, DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY. It is not a finished product and may not (yet) comply with some or any technical or legal requirements that are applicable to finished products, including, without limitation, directives regarding electromagnetic compatibility, recycling (WEEE), FCC, CE or UL (except as may be otherwise noted on the board/kit). Atmel supplied this board/kit “AS IS,” without any warranties, with all faults, at the buyer’s and further users’ sole risk. The user assumes all responsibility and liability for proper and safe handling of 13 8182A-AVR-08/08 the goods. Further, the user indemnifies Atmel from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge and any other technical or legal concerns. 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