Atmel AVR2092: REB232ED - Hardware User Manual Features • High-performance, 2.4GHz, RF-CMOS Atmel® AT86RF232 radio transceiver targeted for IEEE® 802.15.4, ZigBee®, and ISM applications - Industry leading 104dB link budget - Ultra-low current consumption - Ultra-low supply voltage (1.8V to 3.6V) • Hardware supported antenna diversity • RF reference design and high-performance evaluation platform • Interfaces to several of the Atmel microcontroller development platforms • Board information EEPROM - MAC address - Board identification, features, and serial number - Crystal calibration values 8-bit Atmel Microcontrollers Application Note 1 Introduction This manual describes the REB232ED radio extender board supporting antenna diversity in combination with the Atmel AT86RF232 radio transceiver. Detailed information is given in the individual sections about the board functionality, the board interfaces, and the board design. The REB232ED connects directly to the REB controller base board (REB-CBB), or can be used as an RF interface in combination with one of the Atmel microcontroller development platforms. The REB232ED together with a microcontroller forms a fully functional wireless node. Figure 1-1. Top (with removed RF shield) and bottom views of the REB232ED. Rev. 8427A-AVR-10/11 2 Disclaimer Typical values contained in this application note are based on simulations and testing of individual examples. Any information about third-party materials or parts was included in this document for convenience. The vendor may have changed the information that has been published. Check the individual vendor information for the latest changes. 2 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 3 Overview The radio extender board is assembled with an Atmel AT86RF232 radio transceiver [1] and two ceramic antennas, and demonstrates the unrivaled hardware-based antenna diversity feature, which significantly improves radio link robustness in harsh environments. The radio extender board was designed to interface to the Atmel microcontroller development or evolution platforms. The microcontroller platform in combination with the REB provides an ideal way to: • Evaluate the outstanding radio transceiver performance, such as the excellent receiver sensitivity achieved at ultra-low current consumption • Test the radio transceiver’s comprehensive hardware support of the IEEE 802.15.4™ standard • Test the radio transceiver’s enhanced feature set, which includes antenna diversity, AES, high data rate modes and other functions The photograph in Figure 3-1 shows a development and evaluation setup using the REB controller base board (REB-CBB) [2] in combination with the REB232ED radio extender board. Figure 3-1. The REB232ED (with removed RF shield) connected to a REB-CBB. 3 8427A-AVR-10/11 4 Functional description The block diagram of the REB232ED radio extender board is shown in Figure 4-1. The power supply pins and all digital I/Os of the radio transceiver are routed to the 2 x 20-pin expansion connector to interface to a power supply and a microcontroller. The Atmel AT86RF232 antenna diversity (AD) feature supports the control of two antennas (ANT0/ANT1). A digital control pin (DIG1) is used to control an external RF switch selecting one of the two antennas. During the RX listening period, the radio transceiver switches between the two antennas autonomously, without the need for microcontroller interaction, if the AD algorithm is enabled. Once an IEEE 802.15.4 synchronization header is detected, an antenna providing sufficient signal quality is selected to receive the remaining frame. This ensures reliability and robustness, especially in harsh environments with strong multipath fading effects. Board-specific information such as board identifier, the node MAC address, and production calibration values are stored in an ID EEPROM. The SPI bus of the EEPROM is shared with the radio transceiver’s interface. Figure 4-1. REB232ED block diagram. TP6 TP7 ANT0 DIG3 VDD DIG4 JP1 Protection VSS DIG2 RFN SLPTR IRQ XTAL2 DIG1 XTAL1 ANT1 DIG2 CLKM 4 SPI EXPAND1 Balun 50Ohm RFSwitch RSTN RFP ID EEPROM XTAL 4.1 Interface connector specification The REB is equipped with a 2 x 20-pin, 100mil expansion connector. The pin assignment enables a direct interface to the REB-CBB [2]. Further, the interface connects to the Atmel STK®500/501 microcontroller development platform to enable support for various Atmel 8-bit AVR® microcontrollers. The REB is preconfigured to interface to an STK501 with an Atmel ATmega1281. If an Atmel ATmega644 is used as the microcontroller, the 0Ω resistors R10 through R18 must be removed and re-installed on the board manually as resistors R20 through R28 (see exhibit Appendix A). Other microcontroller development platforms need to be interfaced using a special adapter board. 4 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 4.1.1 Atmel ATmega1281 configuration Table 4-1. Default expansion connector mapping (ATmega1281 configuration). Pin# Function Pin# Function 1 GND 2 GND 3 n.c. 4 n.c. 5 n.c. 6 n.c. 7 n.c. 8 n.c. 9 n.c. 10 n.c. 11 n.c. 12 n.c. 13 n.c. 14 n.c. 15 n.c. 16 n.c. 17 XT1 (MCLK) 18 n.c. 19 Vcc 20 Vcc 21 GND 22 GND 23 PB7 (open) 24 PB6 (open) 25 PB5 (RSTN) 26 PB4 (SLPTR) 27 PB3 (MISO) 28 PB2 (MOSI) 29 PB1 (SCLK) 30 PB0 (SEL) 31 PD7 (TP1) 32 PD6 (MCLK) 33 PD5 (TP2) 34 PD4 (DIG2) 35 PD3 (TP3) 36 PD2 (open) 37 PD1 (TP4) 38 PD0 (IRQ) 39 GND 40 EE#WP (write protect EEPROM) 4.1.2 Atmel ATmega644 configuration Table 4-2. Expansion connector mapping when assembled for ATmega644. Pin# Function Pin# Function 1 GND 2 GND 3 n.c. 4 n.c. 5 n.c. 6 n.c. 7 n.c. 8 n.c. 9 n.c. 10 n.c. 11 n.c. 12 n.c. 13 n.c. 14 n.c. 15 n.c. 16 n.c. 17 XT1 (MCLK) 18 n.c. 19 Vcc 20 Vcc 21 GND 22 GND 23 PB7 (SCLK) 24 PB6 (MISO) 25 PB5 (MOSI) 26 PB4 (SEL) 27 PB3 (open) 28 PB2 (RSTN) 5 8427A-AVR-10/11 Pin# Function Pin# Function 29 PB1 (MCLK) 30 PB0 (open) 31 PD7 (SLPTR) 32 PD6 (DIG2) 33 PD5 (TP2) 34 PD4 (open) 35 PD3 (TP3) 36 PD2 (IRQ) 37 PD1 (TP4) 38 PD0 (open) 39 GND 40 EE#WP (write protect EEPROM) 4.2 ID EEPROM To identify the board type by software, an optional identification (ID) EEPROM is populated. Information about the board, the node MAC address and production calibration values are stored here. An Atmel AT25010A [8] with 128 x 8-bit organization and SPI bus is used because of its small package and low-voltage / lowpower operation. The SPI bus is shared between the EEPROM and the transceiver. The select signal for each SPI slave (EEPROM, radio transceiver) is decoded with the reset line of the transceiver, RSTN. Therefore, the EEPROM is addressed when the radio transceiver is held in reset (RSTN = 0) (see Figure 4-2). Figure 4-2. EEPROM access decoding logic (Atmel ATmega1281 configuration). PB 5 (RSTN) PB 0 (SEL ) RSTN >1 PB 1..3 (SPI ) SEL# /RST /SEL Transceiver AT86RF232 SPI >1 #CS On-Board EEPROM The EEPROM data are written during board production testing. A unique serial number, the MAC address1, and calibration values are stored. These can be used to optimize system performance. Final products do not require this external ID EEPROM. All data can be stored directly within the microcontroller’s internal EEPROM. 1 6 Note: MAC addresses used for this package are Atmel property. The use of these MAC addresses for development purposes is permitted. Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 Table 4-3 shows a detailed description of the EEPROM data structure. Table 4-3. ID EEPROM mapping. Address Name Type Description 0x00 MAC address uint64 MAC address for the 802.15.4 node, little endian byte order 0x08 Serial number uint64 Board serial number, little endian byte order 0x10 Board family uint8 Internal board family identifier 0x11 Revision uint8[3] Board revision number ##.##.## 0x14 Feature uint8 Board features, coded into seven bits 7 Reserved 6 Reserved 5 External LNA 4 External PA 3 Reserved 2 Diversity 1 Antenna 0 SMA connector 0x15 Cal OSC 16MHz uint8 RF232 XTAL calibration value, register XTAL_TRIM 0x16 Cal RC 3.6V uint8 Atmel ATmega1281 internal RC oscillator calibration value @ 3.6V, register OSCCAL 0x17 Cal RC 2.0V uint8 ATmega1281 internal RC oscillator calibration value @ 2.0V, register OSCCAL 0x18 Antenna gain int8 0x20 Board name char[30] Textual board description 0x3E CRC uint16 Antenna gain [resolution 1/10dBi]. For example, 15 will indicate a gain of 1.5dBi. The values 00h and FFh are per definition invalid. Zero or -0.1dBi has to be indicated as 01h or FEh 16-bit CRC checksum, standard ITU-T generator polynomial 16 12 5 G16(x) = x + x + x + 1 Figure 4-3. Example EEPROM dump. -----| EEPROM dump |-------------0000 - 49 41 17 FF FF 25 04 00 D6 11 00 00 2A 00 00 00 IA...%......*... 0010 - 02 04 01 01 06 02 A8 A9 01 FF FF FF FF FF FF FF ................ 0020 - 52 61 64 69 6F 45 78 74 65 6E 64 65 72 32 33 32 RadioExtender232 0030 - 45 44 00 00 00 00 00 00 00 00 00 00 00 00 8D 9B ED.............. 0040 - FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 0050 - FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 0060 - FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ 0070 - FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ................ ---------------------------------- 7 8427A-AVR-10/11 4.3 Supply current sensing The power supply pins of the radio transceiver are protected against overvoltage stress and reverse polarity at the EXPAND1 pins (net CVTG, net DGND) using a Zener diode (D1) and a thermal fuse (F1) (see Exhibit Appendix A). This is required because the Atmel STK500 will provide 5V as default voltage, and the board can also be mounted with reverse polarity. Depending on the actual supply voltage, the diode D1 can consume several milliamperes. This has to be considered when the current consumption of the whole system is measured. In such a case, D1 should be removed from the board. To achieve the best RF performance, the analog (EVDD) and digital (DEVDD) supply are separated from each other by a CLC PI-filter. Digital and analog ground planes are connected together on the bottom layer, underneath the radio transceiver IC. Further details are described in Section 5, page 10. A jumper, JP1, is placed in the supply voltage trace to offer an easy way for current sensing to occur. NOTE All components connected to nets DEVDD/EVDD contribute to the total current consumption. While in radio transceiver SLEEP state, most of the supply current is drawn by the 1MΩ pull-up resistor, R9, connected to the ID EEPROM and the EEPROM standby current. Figure 4-4. Power supply routing. 4.4 Radio transceiver reference clock The integrated radio transceiver is clocked by a 16MHz reference crystal. The 2.4GHz modulated signal is derived from this clock. Operating the node according to IEEE 802.15.4 [4], the reference frequency must not exceed a deviation of ±40ppm. The absolute frequency is mainly determined by the external load capacitance of the crystal, which depends on the crystal type and is given in its datasheet. The radio transceiver reference crystal, Q1, shall be isolated from fast switching digital signals and surrounded by a grounded guard trace to minimize disturbances of the oscillation. Detailed layout considerations can be found in Section 5.3, page 12. The REB uses a Siward CX4025 crystal with load capacitors of 10pF and 12pF. The imbalance between the load capacitors was chosen to be as close as possible to the desired resonance frequency with standard components. To compensate for fabrication and environment variations, the frequency can be further tuned using the radio transceiver register XOSC_CTRL (0x12) (refer to [1], Section References, page 36). The REB production test guarantees a tolerance of within +20ppm and -5ppm. The correction value, to be applied to TRX register XOSC_CTRL (0x12), is stored in the onboard EEPROM (see Section 4.2, page 6). 8 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 The reference frequency is also available at pin CLKM of the radio transceiver and, depending on the related register setting; it is divided by an internal prescaler. CLKM clock frequencies of 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 250kHz, or 62.5kHz are programmable (refer to [1]). The CLKM signal is filtered by a low-pass filter to reduce harmonic emissions within the 2.4GHz ISM band. The filter is designed to provide a stable 1MHz clock signal with correct logic level to a microcontroller pin with sufficiently suppressed harmonics. CLKM frequencies above 1MHz require a redesign of R8 and C36. In case of RC cut-off frequency adjustments, depending on the specific load and signal routing conditions, one may observe performance degradation of channel 26. NOTE Channel 26 (2480MHz) is affected by the following harmonics: 155 x 16MHz or 310 x 8MHz. By default, CLKM is routed to a microcontroller timer input; check the individual configuration resistors in the schematic drawing. To connect CLKM to the microcontroller main clock input, assemble R3 with a 0Ω resistor. 4.5 RF section The Atmel AT86RF232 radio transceiver incorporates all RF and BB critical components necessary to transmit and receive signals according to IEEE 802.15.4 or proprietary ISM data rates. A balun, B1, performs the differential to single-ended conversion of the RF signal to connect the AT86RF232 to the RF switch, U1. The RF switch is controlled by the radio transceiver output, DIG1, and selects one of the two antennas. The signal is routed to the ceramic antenna, passing a tuning line. Solder pads located along the tuning line allow for the optimization of antenna matching without the need for redesigning the REB. Detailed information about the antenna diversity feature is given in [1] and [3]. Optionally, one or two SMA connectors can be assembled if conducted measurements are to be performed. Refer to the schematic and populate coupling capacitors C11/C12 and C18/C19 accordingly. 9 8427A-AVR-10/11 5 PCB layout description This section describes critical layout details to be carefully considered during a PCB design. The PCB design requires an optimal solution for the following topics: • Create a solid ground plane for the antenna. The PCB has to be considered as a part of the antenna; it interacts with the radiated electromagnetic wave • Isolate digital noise from the antenna and the radio transceiver to achieve optimum range and RF performance • Isolate digital noise from the 16MHz reference crystal to achieve optimum transmitter and receiver performance • Reduce any kind of spurious emissions below the limits set by the individual regulatory organizations The REB232ED PCB design further demonstrates a low-cost, two-layer PCB solution without the need of an inner ground plane. The drawing in Figure 5-1 shows critical sections using numbered captions. Each caption number has its own subsection below with detailed information. Figure 5-1. Board layout – RF section. 10 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 5.1 PCB detail 1 – balanced RF pin fan out Figure 5-2. Board layout – RF pin fan out. The Atmel AT86RF232 antenna port should be connected to a 100Ω load with a small series inductance of 1nH to 2nH. This is achieved with the connection fan out in between the IC pins and the filter balun combination B1. The trace width is kept small at 0.2mm for a length of approximately 1.5mm. The REB232ED is a two-layer FR4 board with a thickness of 1.5mm. Therefore, the distributed capacitance between top and bottom is low, and transmission lines are rather inductive. B1 has the DC blocking built in. Only pin 2 requires DC blocking within its GND connection since this is considered as bias access pin. The distance of 1.5mm also allows GND vias for pin 3 and pin 6 of the AT86RF232. Such a low inductance GND connection is really desirable for the RF port. 11 8427A-AVR-10/11 5.2 PCB detail 2 – RF switch Figure 5-3. Board layout – RF switch. RF RF RF The RF switch requires a solid grounding to achieve the full isolation and RF filter capacitors for the control pins. A parasitic inductance within the ground connection may reduce the RF isolation of the switch in the off state. To achieve a hard, low-impedance ground connection, vias are placed on each side of the ground pad. Additionally, the ground pad is connected to the top layer ground plane. Blocking capacitors C24 and C25 are placed as close as possible to the RF switch to short any control line noise. Noise interfering on the control pins may cause undesired modulation of the RF signal. C11 and C12 will block any DC voltage on the RF line. On the input side, C28, next to the balun provides the required DC blocking. 5.3 PCB detail 3 – crystal routing The reference crystal PCB area requires optimization to minimize external interference and to keep any radiation of 16MHz harmonics low. Since the board design incorporates a shield, the crystal housing has been tied hard to ground. This method will minimize the influence of external impairments such as burst and surge. Against board internal crosstalk, the crystal signal lines are embedded within ground areas. Special care has to be taken in the area between the IRQ line and the crystal. Depending on the configuration, the interrupt may be activated during a frame receive. Crosstalk into the crystal lines will increase the phase noise and therefore reduce the signal to noise ratio. 12 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 Figure 5-4. Board layout – XTAL section. The reference crystal and load capacitors C36/37 form the resonator circuit. These capacitors are to be placed close to the crystal. The ground connection in between the capacitors should be a solid copper area right underneath the crystal, including the housing contacts. 5.4 PCB detail 4 – transceiver analog GND routing With the Atmel AT86RF232, consider pins 3, 6, 27, 30, 31, and 32 as analog ground pins. Analog ground pins are to be routed to the paddle underneath the IC. The trace width has to be similar to the pad width when connecting the pads, and increase, if possible, in some distance from the pad. Each ground pin should be connected to the bottom plane with at least one via. Move the vias as close to the IC as possible. It is always desired to integrate the single-pin ground connections into polygon structures after a short distance. Top, bottom, and, on multilayer boards, the inner ground planes, should be tied together with a grid of vias. When ground loops are smaller than one tenth of the wavelength, it is safe to consider this as a solid piece of metal. 13 8427A-AVR-10/11 Figure 5-5. Board layout – transceiver GND. 7 6 3 32 31 30 12 27 16 18 21 The soldering technology used allows the placement of small vias (0.15mm drill) within the ground paddle underneath the chip. During reflow soldering, the vias get filled with solder, having a positive effect on the connection cross section. The small drill size keeps solder losses within an acceptable limit. During the soldering process vias should be open on the bottom side to allow enclosed air to expand. 5.5 PCB detail 5 – digital GND routing and shielding With the Atmel AT86RF232, consider pins 7, 12, 16, 18, and 21 as digital ground pins. Digital ground pins are not directly connected to the paddle. Digital ground pins may carry digital noise from I/O pad cells or other digital processing units within the chip. In case of a direct paddle connection, impedances of the paddle ground vias could cause a small voltage drop for this noise and may result in an increased noise level transferred to the analog domain. There is a number of pro’s and con’s when it comes to the shielding topic. The major con’s are: • Cost of the shield • Manufacturing effort • Inaccessibility for test and repair The number of pro’s might be longer but the cost argument is often very strong. However, the reasons to add the shield for this reference design are: • Shield is required for a certification in Japan • Shield is recommended for FCC certification in North America • Increased performance 14 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 Figure 5-6. Board layout – GND and shield. Besides the function to provide supply ground to the individual parts, the ground plane has to be considered as a counterpart for the antenna. Such an antenna base plate is required to achieve full antenna performance. It has to be a continuous, sustained metal plate for that purpose. The shield, covering the electronic section will help to form this antenna base plate. For that reason, any unused surface should be filled with a copper plane and connected to the other ground side using sufficient through hole contacts. Larger copper areas should also be connected to the other side layer with a grid of vias. This will form kind of a RF sealing for the FR4 material. Any wave propagation in between the copper layers across the RF4 will become impossible. This way, for an external electromagnetic field, the board will behave like a coherent piece of metal. When a trace is cutting the plane on one side, the design should contain vias along this trace to bridge the interrupted ground on the other side. Place vias especially close to corners and necks to connect lose polygon ends. The pads where the shield is mounted also need some attention. The shield has to be integrated in the ground planes. Vias, in a short distance to the pads, will ensure low impedance integration and also close the FR4 substrate as mentioned above. 5.6 PCB detail 6 – transceiver RF tuning The REB232ED implements a tuning structure to optimize the transceiver matching. A transmission line in combination with a capacitor is used to vary the load impedance. The capacitance value and the position of the capacitor can be changed to tune the system. To vary the position along that line, the tuning capacitor can be assembled on to the footprint of C23, C26 or C27. To measure the tuning result, U1 has to be removed and a piece of rigid 50Ω cable can be soldered to its pin 5. The measurement using X2 is not impossible but much harder to calibrate and a way to control U1 has also to be found. 15 8427A-AVR-10/11 Figure 5-7. Board layout – transceiver RF tuning. During tuning, the best compromise in between RX and TX performance has to be found. Tuning should be done for the receiver first. First step should be to verify the 50Ω matching at U1, pin 5. After that, the capacitor position and value can be slightly varied. The reception performance should be measured using a packet error test. Typical tuning capacitor values are 1pF ±0.5pF. To simplify the tuning, the receiver input power should be adjusted to a value where a PER of ~1% can be measured. For the measurement 5000 to 10.000 Frames should be used to get a clear PER value. After a board tuning change the PER should be measured with the same environment as before. Now the new sensitivity can be evaluated based on a simple rule of thumb. A PER change by one decimal power (from 1% up to 10%, or down to 0.1%) corresponds in average with a 1dB change in sensitivity. The tuning measurements have to take the whole frequency band into account. The matching point for best sensitivity can, but may not be identical with the best S11 matching point. The matching point for the lowest noise figure will be different from the best S11 matching point that can be measured. When satisfying reception sensitivity was achieved, the transmitter performance should be tested. Main parameters are transmitting power, EVM, spurious emissions and performance flatness over the whole frequency band. 5.7 Ceramic antenna 5.7.1 Antenna design study Part of the diversity board development was the evaluation of the antenna setup. A dedicated board was designed to determine the key design parameters for a diversity antenna configuration. 16 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 Because the antenna has to operate in an environment different from that of the manufacturer’s evaluation board, the correct frequency tuning has to be verified. The antenna distance, required for optimum diversity operation, provides enough board space to use a low-cost tuning method based on a transmission line and capacitors. The actual tuning procedure is explained in Section 5.7.3, page 20. Figure 5-8. Initial antenna tuning and test board. Besides the antenna tuning, the test board was used to measure the diversity effect and the coupling between the two antennas. The better the two antennas are isolated from each other, the higher is the diversity advantage for the receiver. It has to be considered that the unused antenna is operating against an open line end because the RF switch, U1, has high impedance in the off position. A low coupling in between the antennas is therefore required. Direct coupling measurement results between both antennas are shown in Figure 5-9, page 18. Over the operating frequency range, the antenna separation is >15dB. That is achieved mainly with the ±45-degree installation. The 90-degree turn between left and right antennas causes orthogonal radiation patterns and minimal coupling. Because the polarization of a received wave is not deterministic in a multipath environment, this setup is also capable of selecting the optimum polarization match for an incoming wave. The other design aspect is the antenna distance. The antenna distance has to be large enough to ensure only one of the two antennas is present in a local fading minimum. Figure 5-10, page 19, shows the field strength plot for both antennas, dependent on the board position. For this test, the antenna board was moved along a workbench using a stepper motor. The transmitter was positioned several meters away on another workbench. No direct line of sight connection is ensured using a 17 8427A-AVR-10/11 large metal plate. The graph shows receive signal strength variations caused by the interference of reflected waves reaching the receiver via different propagation paths. From Figure 5-10, page 19 one can conclude key parameters for such an indoor scenario: 1. For one antenna, multipath fades can exceed 30dB. 2. For the 2.4GHz ISM band, a local fading minimum is typically below 5cm (~2in). This number is expected considering the wavelength. Conclusion: an antenna diversity design should place antennas at a distance larger than that. 3. For almost all positions, only one antenna is in a deep fade. The setup prepared for this test demonstrates the advantage of using antenna diversity. Figure 5-9. Coupling between left and right antennas. If practical situations are further analyzed (see Figure 5-10, page 19), one can derive a practical “antenna gain” for the diversity setups. To ensure robust and reliable communication, a single antenna system has to consider at least a 30dB link margin as fade margin. Considering the multipath setup used for the experiment, a signal level of -70dBm is the worst case receiver signal strength when operating on antenna diversity. A single antenna system could get into a spot where the receive power is as low as -85dBm. It might be too optimistic in an indoor environment to take the 15dB and state that an antenna diversity system has four times the range compared to a non-antenna diversity system. But antenna diversity cuts deep fades and strongly increases the stability of a radio link. This is essential for radio nodes that get installed in a fixed position, as with wall mounted equipment. The location of deep fades can move over time due to small changes inside the room or building as there are doors, windows, furniture, and people that may move. 18 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 Figure 5-10. Local fading effects in an indoor multipath environment. 5.7.2 Antenna design-in This section describes the antenna design-in and the implementation of the antenna tuning structure. An overview of the layout can be found in Figure 5-11. Figure 5-11. Antenna PCB environment and tuning structure. 2 1 4 3 The antenna is available from two sources: 1. Johanson 2450AT45A100. 2. Würth 7488910245. 19 8427A-AVR-10/11 The antenna test board, as specified by the manufacturers, has a ground plane size of 20mm x 40mm, an antenna placed in a 12mm x 20mm FR4 area, and an FR4 substrate height of 0.8mm. This is the expected environment where the antenna performance should be equivalent to the datasheet values. On the REB232ED, the environment differs considerably because the FR4 height is 1.5mm, the antenna is placed in a triangular corner and the ground plane geometry is different, too. To compensate for the larger substrate height, a 2mm not-plated drill hole is placed underneath the antenna ceramic core (see Figure 5-11, detail 1). The PCB ground is designed with a 45 degree angle along the red line (Figure 5-11, detail 2), forming an optimum antenna ground reference. The antenna tuning requires two more elements, a series capacitor at the antenna feed point (Figure 5-11, detail 3) and a capacitor that can be moved in position along the feed line (Figure 5-11, detail 4). The series capacitor must be placed at the antenna feed point. Under normal conditions, only one capacitor is required within the detail 4 section of the PCB. By choosing the correct footprint, the capacitor can be moved along the line. The impedance transformation across the transmission line depends on the distance between the antenna feed point and the capacitor in detail 4, resulting in the tuning effect. The tuning procedure is explained in Section 5.7.3. 5.7.3 Antenna tuning The first step for the measurements is a board rework to access the RF line with a 50Ω coaxial cable. In the case of the REB232ED, the balun, B1, was removed and a small, rigid 50Ω cable with an SMA connector was connected to the balun pin 1 pad. The ground planes next to this feed point where used to create a solid ground connection for this cable. This feed point will allow the measurement of both antennas because of the on-board RF switch. The RF switch was controlled by applying the correct voltage levels from a lab power supply. Figure 5-12. Antenna feed line short for extended length calibration. 20 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 The second step is to calibrate the network analyzer (NWA) to the 50Ω connector as usual. After normal calibration, the reference point for the NWA is at the cable SMA connection. To determine the tuning elements, the reference point has to be moved to the antenna feed point using the extended length parameter inside the NWA. To determine this parameter, a hard short is required at the antenna feed line end. Remove the solder resist on the left and right sides of the feed line end and short the line end to ground with two solder bumps (see Figure 5-12). Do not use any wires to create a ground connection. The calibration procedure will only work when the short is exactly at the line end and has a minimum of parasitic inductance. Now the NWA extended length parameter can be adjusted until the NWA’s Smith chart displays a nice short for the desired frequency range. In the third step, the antenna behavior can be measured without any tuning elements. To see the real antenna behavior, the board must be placed in a position similar that of the final application. If the final application has a housing installed, then all these measurements must be done with the housing attached. Any piece of metal or plastic can tune the antenna to a different frequency. In the case of small boards with an edge length of less than 10cm, the connected RF cable is often a source of measurement errors. The outer conductor of the coaxial cable could interact with the field radiated by the antenna and, therefore, create an additional counterpart ground for the antenna. To avoid this effect, the coaxial cable can be fed through several ferrite beads. The ferrite beads need to be placed close to the test board. The initial measurement shows that the antenna is already working nicely in the desired frequency band. The feed resistance is a bit low, and the antenna has an inductive behavior. 21 8427A-AVR-10/11 Figure 5-13. Antenna without tuning elements. The first tuning step will use the series capacitor to tune the band center down to a pure resistive behavior. The band center is crossing the 30 degree (1/3 x Z0) line. Therefore, the tuning capacitor can be determined by: C= 1 2πfXc with Xc = 1 * 50Ohm 3 f = 2.450GHz We get a capacitance of 3.89pF, and can simply use a 3.9pF value. The result of this tuning step can be seen in Figure 5-14, page 23. 22 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 Figure 5-14. Antenna tuning with series capacitor. The final tuning step will use a shunt capacitor to correct the antenna load impedance. A 0.5pF capacitor has been used to tune the antenna resonance frequency to the band center. If the antenna resonance frequency is too low, the capacitor needs to be moved towards the antenna, and vice versa. Figure 5-15. Final tuning. 23 8427A-AVR-10/11 Figure 5-15, page 23, and Figure 5-16 show the final result as a diagram and on the board. Figure 5-16. Antenna tuning with series and shunt capacitor. In most cases, it is beneficial to tune the antenna a little towards higher frequencies. The reason is that environmental changes in most cases tune the antenna down to lower frequencies. Such environmental changes can be any kind of object that is situated near the antenna, such as a housing or table surface. The tuning determined in this example is only valid for the antenna example board. The REB232ED, with its different ground plane design and many more differences, may have other parts assembled. 5.7.4 Final board antenna radiation pattern The actual radiation pattern for the final board is rather complicated and very difficult to describe. Traditional radiation diagrams where the device under test is turned in all three axes and the received power for a vertical and a horizontal antenna are shown in a polar diagram do not provide a correct picture. Due to the antenna placement in a 45deg angle, the polarization changes dramatically for such a turn. To see the full RF power the RX Antenna would require maintaining the correct polarization angel for such a measurement. No matter what problems this setup creates when measuring the radiated power, such a radiation pattern is exactly what is required to reduce fading effects in indoor 24 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 multipath environments. The dual antenna setup has access to many more propagation modes than a single antenna. By switching from one antenna to the other, the physical antenna location is changing because of the antenna distance and on top of that the wave polarization is changing as well. The achieved propagation path effect of this switch was already illustrated in Figure 5-10, page 19. Figure 5-17. Radiated measurement for Azimut -50deg, Phi -35deg, Polarization 65deg. The measurement setup inside of an anechoic chamber is shown in Figure 5-17. A measurement position is characterized by three angels. There is the azimuth angle, where the whole test device carrier is turning around a vertical axis. The turning angle of the test board around a horizontal axis is called Phi. In Addition the receive antenna can be turned to adjust the polarization angle. The following 3D models show the board and the radiation properties for some of the main radiation directions. The cylinders point into the measured radiation direction, the arrows at the end of each pointer indicate the wave polarization direction. The yellow pointers belong to antenna A1 while the green pointers indicate radiations from A2. Please refer to Figure 5-1 for the antenna reference markers A1 and A2 or have a look at the physical board. 25 8427A-AVR-10/11 Figure 5-18. Some main radiation directions with polarization angle, seen from Antenna A1. All three figures show the same 3D model from different directions. The board has a rather smooth radiation characteristic but these spots have been selected to show the varying polarization. Figure 5-19. Some main radiation directions with polarization angle, seen from Antenna A2. 26 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 Figure 5-20. Some main radiation directions with polarization angle, seen from the PCB bottom side. There is one radiation direction where no diversity effect exists. The direction is A=0, F=180 and P=0. For that case both antennas have a polarization that is turned by 180deg against each other. However, it is still horizontal and the antenna gain is similar for both antennas. Table 5-1. Measured radiation power for different radiation directions. Antenna Azimuth (A) Phi (F) Polarization (P) dBm EIRP A1 -60 135 45 4 A2 -15 25 -30 5.8 A1 0 180 0 5.9 A2 0 180 0 6.6 A1 70 55 -70 7 A1 105 180 0 3.7 A2 110 85 65 4.3 A1 110 -90 45 4.5 A2 110 -90 -45 5.5 According to the manufacturer datasheet, the antenna has a typical average gain of 1dBi with a peak gain of 3dBi. Considering the fact that the RF232 provides 3dBm of transmitting power after the balun, these measurements prove the maximum TX performance. 27 8427A-AVR-10/11 6 Mechanical description The REB232ED is manufactured using a low-cost, two-layer printed circuit board. All components and connectors are mounted on the top side of the board. The format was defined to fit the EXPAND1 connector on the Atmel AVR STK500 / STK501 microcontroller evaluation board. The upright position was chosen for best antenna performance. Table 6-1. REB232ED mechanical dimensions. 28 Dimension Value Width x 57mm Width y 61mm Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 7 Electrical characteristics 7.1 Absolute maximum ratings Stresses beyond the values listed in Table 7-1 may cause permanent damage to the board. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this manual are not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. For more details about these parameters, refer to individual datasheets of the components used. Table 7-1. Absolute maximum ratings. No. Parameter Condition 7.1.1 Storage temperature range 7.1.2 Humidity 7.1.3 Minimum Typical Maximum Unit -40 +85 Supply voltage -0.3 +3.6 V 7.1.4 EXT I/O pin voltage -0.3 Vcc + 0.3 V 7.1.5 Supply current from batteries -0.5 A 7.1.6 Note: Battery charge current Non-condensing 90 Sum over all power pins (1) °C % r.H. 0 mA Maximum Unit 1. Keep power switch off or remove battery from REB-CBB when external power is supplied. 7.2 Recommended operating range Table 7-2. Recommended operating range. No. Parameter 7.2.1 Operating temperature range 7.2.2 7.2.3 Supply voltage (Vcc) 7.2.4 Condition Minimum Typical -20 +70 °C Plain REB-CBB 1.6 3.0 3.6 V REB plugged on REB-CBB 1.6 3.0 3.6 V Serial flash access in usage 2.3 3.0 3.6 V 7.3 Current consumption Test conditions (unless otherwise stated): VDD = 3.0V, TOP = 25°C Table 7-3 lists current consumption values for typical scenarios of a complete system composed of REB-CBB and REB232. The Zener diode has been removed as described above. Table 7-3. Current consumption of REB-CBB populated with REB232. No. Parameter Condition Minimum Typical Maximum Unit 7.3.1 Supply current MCU @ power down, transceiver in state SLEEP, serial flash in Deep-Sleep 17 µA 7.3.2 Supply current MCU @ 2MHz, transceiver in state TRX_OFF 3 mA 7.3.3 Supply current MCU @ 16MHz (int. RC 32MHz), transceiver in state TRX_OFF 15 mA 29 8427A-AVR-10/11 No. Parameter Condition 7.3.4 Supply current MCU @ 16MHz (int. RC 32MHz), transceiver in state TRX_ON 28 mA 7.3.5 Supply current MCU @ 16MHz (int. RC 32MHz), transceiver in state BUSY_TX 26 mA 30 Minimum Typical Maximum Unit Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 8 Abbreviations AD - Antenna diversity AES - Advanced encryption standard BB - Baseband CBB/REB-CBB - Controller base board ETSI - European Telecommunications Standards Institute EVM - Error Vector Magnitude FCC - Federal Communications Commission ISM - Industrial, scientific and medical (frequency band) LNA - Low-noise amplifier MAC - Medium access control NWA - Network analyzer PA - Power amplifier PDI - Program/debug interface PER - Packet error rate R&TTE - Radio and Telecommunications Terminal Equipment (Directive of the European Union) REB - Radio extender board RF - Radio frequency RX - Receiver SMA - Sub-miniature-A (connection) SPI - Serial peripheral interface TX - Transmitter USART - Universal synchronous/asynchronous receiver/transmitter XTAL - Crystal 31 8427A-AVR-10/11 D C B A MAC S/N S/N SNr RF1 RF2 SEL GND 1 PD2 PB4 PB5 PB6 PB7 PB1 PD7 PD6 GND GND DEVDD 1M 23849 R24 DEVDD NC NC SLPTR RSTN MCLK TP1 TP2 TP3 TP4 NC R3 U6A 3 2 5 1 RSTN 4 6 NC7WV04 23860 GND U6B VCC 16 2 GND DEVDD 19514 1 U4A GND 5 6 4 8 2 1 3 SEL_TRX NC7WP32 23861 GND U4B 7 NC7WP32 23861 VCC 1 17 2 3561 J3 4428 PD0 PB0 PB2 PB3 PB1 PD6 PB4 PD4 PB5 2229 D1 IRQ SEL MOSI MISO SCK MCLK SLPTR DIG2 19512 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 CVTG GND PB6 PB4 PB2 PB0 PD6 PD4 PD2 PD0 EE#WP GND 3 0R 0R R23 R21 0R 0R R19 0R 0R R17 R14 R12 0R 0R R10 R7 0R R5 19761 100n C33 L1 GND 4 3 2 MISO EE#WP 1 SEL_EE GND 30551 AT25010A GND #WP SO #CS C2 0 NC C14 0 NC TP5 19761 100n C34 4 23849 1M R26 SI SCK #HOLD VCC 5 6 7 8 23848 2k2 R15 GND 19761 100n C30 23848 2k2 R8 DVDD EVDD AT25010A 14411 220Ohm@100MHz IRQ SEL MOSI MISO SCK MCLK SLPTR DIG2 Connection analog/digital Ground, to be done on bottom layer underneath the radio IC U5 DEVDD 9942 9942 9942 9942 9942 9942 9942 9942 9942 RSTN C13 0 NC 23838 2.45GHz C3 0 NC C15 20700 0p56 NetClass i C16 0 NC MOSI 19761 100n 19761 100n C39 DEVDD GND DEVDD C35 5 Route DVSS pins to plane on top and not directly to the paddle underneath the IC GND 26942 1uF 16 15 14 13 12 11 SLPTR DVDD 9 GND RFSW1 MCLK DVSS DEVDD DVDD DVDD DVSS C27 0 NC NetClass i GND GND 23847 2p2 C40 19764 470 GND C11 6 19768 22p 26869 R25 GND 1p2 GND C23 13875 10k R27 SLP_TR DIG2 DIG1 19768 GND 22p 10 GND SCK 4 RFSW2 NC7WV04 23860 GND U2B VCC 16 6 NC7WV04 23860 19768 22p C24 1 C29 GND RFSW1 IN DIG2 C32 3 2 5 U2A 50 Ohm Hirose CL358-150-5-06 30595 X2 OUT DIG1 RSTN GND 1 2 ClassName: GCPL50OHM C4 0 NC 0 4.3 5.1 5.9 6.7 7.5 8.3 9.1 mm Antenna Tuning Line Scale 25178 3p3 C1 2 nc A 1 X1 ATmega1281 config JP1 RST NC NC NC NC NC NC NC NC NC RSTN XT1 CVTG GND PB7 PB5 PB3 PB1 PD7 PD5 PD3 PD1 GND GND F1 NC7WV04 23860 R22 R20 R18 R16 R13 R11 R9 R6 R4 ATmega644 config R2 R1 PB2 CVTG DEVDD To make use of BOD, assemble resistors with 1M0 to avoid radio wake up in case of a BOD reset condition. GND 4 5 GND 3 4 3 1 A1 3 7 3 8 RSTN CLKM 17 V Balanced P1 GND 19768 22p 6 GND nc GND GND 6 GND 0 NC GND 33 25 26 27 28 29 30 31 32 GND 20700 0p56 0 NC 0 NC C21 C8 0 NC 0 NC C22 C9 16674 10p Q1 GND GND Siward 19513 16MHz 3 GND 7 8 0 mm 25178 3p3 C10 23838 2.45GHz A2 GND 8 16674 10p C38 PCB 32949 5 449 38 00.250.01 PCB1 26517 Shield_BMIS S1 ATMEL Germany GmbH CMOS-RF 01099 Dresden C37 1 19761 100n C31 26942 1uF GND EVDD GND TP6 TP7 0 NC C20 C7 9.1 8.3 7.5 6.7 5.9 5.1 4.3 Antenna Tuning Line Scale 0 NC C6 C36 7 Size: A3 Project: REB232_V7.1.0.PRJPCBKoenigsbruecker Landstrasse 61 1 Date: 19.07.2011 Revision: 0.1 Sheet 1 of Germany File: REB232_V7.1.0.SchDoc REB232ED V7.1.0 DIE XTAL2 XTAL1 AVSS EVDD AVDD AVSS AVSS AVSS U3 AT86RF232 28436 GND 26949 JCI 2450FB15L0001 B1 GND 19768 22p C25 RFSW2 ClassName: GCPL50OHM NetClass i 23859 2.45GHz U1 C26 C28 MLF32 Title C12 19768 22p AT86RF232 19 SCK DVSS 6 AVSS SCLK 20 MISO MISO STK501 - EXPAND1 22 MOSI DVSS 18 1 J3 2 2 GND ! V J1 J2 = H V1 4 2 DC_GND 5 5 GND 5 H V2 6 ClassName: GCPL50OHM unbalanced 21 Balanced P2 1 RFN 4 RFP 4 23 SEL_TRX DVSS 2 AVSS MOSI 1 DIG4 SEL 3 DIG3 IRQ 24 IRQ 1 2 2 4 2 nc A 32 1 1 D C B A Appendix A – PCB design data A.1 Schematic Figure 8-1. REB232ED schematic. Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 A.2 Assembly drawing Figure 8-2. REB232ED assembly drawing. 33 8427A-AVR-10/11 A.3 Bill of materials Table 8-1. Bill of materials. Qty. Designator Description Footprint Manuf. Part# Manufacturer Comment 1 X2 RF Connector MS-147 MS147 CL358-150-5-06 Hirose Build in antenna switch, 50Ω 1 X1 Pin header 2x20 90 degree JP_2x20_90°_ Top_Invers 1007-121-40 CAB HEADER-20X2 1 U5 EEPROM MiniMap-8-2X3 AT25010AY610YH-1.8 Atmel AT25010A 1 U4 Logic gate MO-187 NV7WP32K8X Fairchild NC7WP32K8X 1 U3 802.15.4 2.4GHz radio transceiver MLF-32 AT86RF232 Atmel AT86RF232 2 U2, U6 Dual INV, ULP SC-70/6 NC7WV04P6X Fairchild NC7WV04 1 U1 RF switch SC-70/6 AS222-92 SkyWorks AS222-92 1 S1 SMT RF Shield Shield-BMIS LT08AD4303 Laird Frame&Lid 9 R5, R7, R10, R12, R14, R17, R19, R21, R23 Resistor 0603H0.4 Generic 0Ω 1 R25 Resistor 0402A Generic 470Ω 2 R8, R15 Resistor 0402A Generic 2.2kΩ 1 R27 Resistor 0402A Generic 10kΩ 2 R24, R26 Resistor 0402A Generic 1MΩ 1 Q1 Crystal 16MHz XTAL_4X2_5_ small XTL551150NLE16MHz-9.0R Siward CX-4025 16MHz 1 L1 SMT ferrite bead 0603H0.8 74279263 Würth 220Ω@100MHz 1 JP1 Jumper 2-pol. JP_2x1 1001-121-002 CAB JP-2 1 F1 PTC fuse 1812 miniSMDC020 Raychem miniSMDC020 1 D1 Z-Diode DO-214AC BZG05C3V9 Vishay BZG05C3V9 1 C35 Capacitor 0402A Generic C0G 12pF/5% 2 C37, C38 Capacitor 0402A Generic C0G 10pF/5% 2 C35, C36 Capacitor 0603H0.8 Generic X5R 1µF 6 C30, C31, C32, C33, C34, C39 Capacitor 0402A Generic X7R 100n 2 C15, C20 Capacitor 0402A Generic C0G 0.56pF 6 C11, C12, C24, C25, C28, C29 Capacitor 0402A Generic C0G 22pF 2 C1, C10 Capacitor 0402A Generic C0G 3.3pF 1 C40 Capacitor 0402A Generic C0G 2.2pF 1 C23 Capacitor 0402A Generic C0G 1.2pF 1 B1 Balun 0805-6 2450FB15L0001 JTI Johanson 2.4GHz Filtered Balun 2 A1, A2 Ceramic antenna ANT_AT45_45 deg 2450AT45A100 JTI 2.45GHz 34 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 Appendix B – Radio certification The REB232ED, mounted on a REB controller base board (REB-CBB), has received regulatory approvals for modular devices in the United States and European countries. B.1 United States (FCC) Compliance Statement (Part 15.19) The device complies with Part 15 of the FCC rules. To fulfill FCC Certification requirements, an Original Equipment Manufacturer (OEM) must comply with the following regulations: • The modular transmitter must be labeled with its own FCC ID number, and, if the FCC ID is not visible when the module is installed inside another device, the outside of the device into which the module is installed must also display a label referring to the enclosed module • This exterior label can use wording such as the following. Any similar wording that expresses the same meaning may be used Contains FCC-ID: VNR-E32ED-X5B-00 This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) this device may not cause harmful interference, and (2) this device must accept any interference received, including interference that may cause undesired operation. Use in portable exposure conditions (FCC 2.1093) requires separate equipment authorization. Modifications not expressly approved by this company could void the user's authority to operate this equipment (FCC Section 15.21). Compliance Statement (Part 15.105(b)) This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures: • Reorient or relocate the receiving antenna • Increase the separation between the equipment and receiver • Connect the equipment into an outlet on a circuit different from that to which the receiver is connected • Consult the dealer or an experienced radio/TV technician for help Warning (Part 15.21) Changes or modifications not expressly approved by this company could void the user’s authority to operate the equipment. 35 8427A-AVR-10/11 B.2 Europe (ETSI) If the device is incorporated into a product, the manufacturer must ensure compliance of the final product to the European harmonized EMC and low-voltage/safety standards. A Declaration of Conformity must be issued for each of these standards and kept on file as described in Annex II of the R&TTE Directive. The manufacturer must maintain a copy of the device documentation and ensure the final product does not exceed the specified power ratings, and/or installation requirements as specified in the user manual. If any of these specifications are exceeded in the final product, a submission must be made to a notified body for compliance testing to all required standards. The “CE“ marking must be affixed to a visible location on the OEM product. The CE mark shall consist of the initials "CE" taking the following form: • If the CE marking is reduced or enlarged, the proportions given in the above graduated drawing must be respected • The CE marking must have a height of at least 5mm except where this is not possible on account of the nature of the apparatus • The CE marking must be affixed visibly, legibly, and indelibly More detailed information about CE marking requirements you can find at "DIRECTIVE 1999/5/EC OF THE EUROPEAN PARLIAMENT AND OF THE COUNCIL" on 9 March 1999 at section 12. References 36 [1] AT86RF232: Low Power, 2.4GHz Transceiver for ZigBee, IEEE 802.15.4, 6LoWPAN, RF4CE, and ISM Applications; Datasheet; Rev. 8321A-MCU Wireless-10/11; Atmel Corporation [2] AVR2042: REB Controller Base Board – Hardware User Guide; Application Note; Rev. 8334A-AVR-08/10; Atmel Corporation [3] AVR2021: AT86RF232 Antenna Diversity; Application Note; Rev. 8158B-AVR07/08; Atmel Corporation [4] IEEE Std 802.15.4™-2006: Wireless Medium Access Control (MAC) and Physical Layer (PHY) Specifications for Low-Rate Wireless Personal Area Networks (LR-WPANs) [5] FCC Code of Federal Register (CFR); Part 47; Section 15.35, Section 15.205, Section 15.209, Section 15.232, Section 15.247, and Section 15.249. United States. [6] ETSI EN 300 328, Electromagnetic Compatibility and Radio Spectrum Matters (ERM); Wideband Transmission Systems; Data transmission equipment operating in the 2.4GHz ISM band and using spread spectrum modulation techniques; Part 1-3. [7] ARIB STD-T66, Second Generation Low Power Data Communication System/Wireless LAN System 1999.12.14 (H11.12.14) Version 1.0. [8] AT25010A; SPI Serial EEPROM; Datasheet; Rev. 3348J SEEPR 8/06; Atmel Corporation. Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 EVALUATION BOARD/KIT IMPORTANT NOTICE This evaluation board/kit is intended for use for FURTHER ENGINEERING, DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY. It is not a finished product and may not (yet) comply with some or any technical or legal requirements that are applicable to finished products, including, without limitation, directives regarding electromagnetic compatibility, recycling (WEEE), FCC, CE or UL (except as may be otherwise noted on the board/kit). Atmel supplied this board/kit “AS IS,” without any warranties, with all faults, at the buyer’s and further users’ sole risk. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies Atmel from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge and any other technical or legal concerns. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER USER NOR ATMEL SHALL BE LIABLE TO EACH OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. No license is granted under any patent right or other intellectual property right of Atmel covering or relating to any machine, process, or combination in which such Atmel products or services might be or are used. Mailing Address: Atmel Corporation, 2325 Orchard Parkway, San Jose, CA 95131 Copyright © 2009, Atmel Corporation 37 8427A-AVR-10/11 9 Table of contents Features ............................................................................................... 1 1 Introduction ...................................................................................... 1 2 Disclaimer......................................................................................... 2 3 Overview ........................................................................................... 3 4 Functional description..................................................................... 4 4.1 Interface connector specification......................................................................... 4 4.1.1 Atmel ATmega1281 configuration ............................................................................. 5 4.1.2 Atmel ATmega644 configuration ............................................................................... 5 4.2 ID EEPROM ........................................................................................................ 6 4.3 Supply current sensing........................................................................................ 8 4.4 Radio transceiver reference clock ....................................................................... 8 4.5 RF section ........................................................................................................... 9 5 PCB layout description ................................................................. 10 5.1 PCB detail 1 – balanced RF pin fan out ............................................................ 11 5.2 PCB detail 2 – RF switch................................................................................... 12 5.3 PCB detail 3 – crystal routing ............................................................................ 12 5.4 PCB detail 4 – transceiver analog GND routing................................................ 13 5.5 PCB detail 5 – digital GND routing and shielding.............................................. 14 5.6 PCB detail 6 – transceiver RF tuning ................................................................ 15 5.7 Ceramic antenna ............................................................................................... 16 5.7.1 Antenna design study .............................................................................................. 16 5.7.2 Antenna design-in ................................................................................................... 19 5.7.3 Antenna tuning ........................................................................................................ 20 5.7.4 Final board antenna radiation pattern...................................................................... 24 6 Mechanical description ................................................................. 28 7 Electrical characteristics............................................................... 29 7.1 Absolute maximum ratings ................................................................................ 29 7.2 Recommended operating range........................................................................ 29 7.3 Current consumption ......................................................................................... 29 8 Abbreviations ................................................................................. 31 Appendix A – PCB design data........................................................ 32 A.1 Schematic ..................................................................................................... 32 A.2 Assembly drawing ........................................................................................ 33 A.3 Bill of materials ............................................................................................. 34 Appendix B – Radio certification..................................................... 35 B.1 38 United States (FCC) ..................................................................................... 35 Atmel AVR2092 8427A-AVR-10/11 Atmel AVR2092 B.2 Europe (ETSI)............................................................................................... 36 References......................................................................................... 36 EVALUATION BOARD/KIT IMPORTANT NOTICE ........................... 37 9 Table of contents ........................................................................... 38 39 8427A-AVR-10/11 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: (+1)(408) 441-0311 Fax: (+1)(408) 487-2600 www.atmel.com Atmel Asia Limited Unit 01-5 & 16, 19F BEA Tower, Milennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon HONG KONG Tel: (+852) 2245-6100 Fax: (+852) 2722-1369 Atmel Munich GmbH Business Campus Parkring 4 D-85748 Garching b. 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EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. 8427A-AVR-10/11