AT24CS04 and AT24CS08 I2C-Compatible (2-wire) Serial EEPROM with a Unique, Factory Programmed 128-bit Serial Number 4-Kbit (512 x 8) or 8-Kbit (1,024 x 8) DATASHEET Standard Features Low-voltage Operation ̶ VCC = 1.7V to 5.5V Internally Organized as 512 x 8 (4-Kbit) or 1,024 x 8 (8-Kbit) I2C-compatible (2-wire) Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bidirectional Data Transfer Protocol 400kHz (1.7V) and 1MHz (2.5V, 2.7, 5.0V) Compatibility Write Protect Pin for Hardware Data Protection 16-byte Page Write Mode ̶ Partial Page Writes Allowed Self-timed Write Cycle (5ms Max) High-reliability ̶ Endurance: 1,000,000 Write Cycles Data Retention: 100 Years ̶ Green Package Options (Pb/Halide-free/RoHS-compliant) ̶ 8-lead JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, and 5-lead SOT23 Die Sale Options: Wafer Form and Tape and Reel Available Enhanced Features in the CS Serial EEPROM Series All Standard Features Supported 128-bit Unique Factory-programmed Serial Number ̶ ̶ ̶ Permanently Locked, Read-only Value Stored in a Separate Memory Area Guaranteed Unique Across Entire CS Series of Serial EEPROMs Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 1. Description The Atmel® AT24CS04 and AT24CS08 provides 4,096/8,192 bits of Serial Electrically Erasable and Programmable Read-only Memory (EEPROM) organized as 512/1,024 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT24CS04/08 is available in space-saving, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN and 5-lead SOT23 packages and is accessed via a 2-wire serial interface. In addition, both devices fully operate from 1.7V to 5.5V VCC. The AT24CS04/08 provides the additional feature of a factory programmed, guaranteed unique 128-bit serial number, while maintaining all of the traditional features available in the 4-Kbit or 8-Kbit Serial EEPROM. The time consuming step of performing and ensuring true serialization of product on a manufacturing line can be removed from the production flow by employing the CS Series Serial EEPROM. The 128-bit serial number is programmed and permanently locked from future writing during the Atmel production process. Further, this 128-bit location does not consume any of the user read/write area of the 4-Kbit or 8-Kbit Serial EEPROM. The uniqueness of the serial number is guaranteed across the entire CS Series of Serial EEPROMs, regardless of the size of the memory array or the type of interface protocol. This means that as an application's needs for memory size or interface protocol evolve in future generations, any previously deployed serial number from any Atmel CS Series Serial EEPROM part will remain valid. 2. Pin Descriptions and Pinouts Figure 2-1. Pin Name Function NC No Connect A1 Address Input (4K only) A2 Address Input SDA Serial Data SCL Serial Clock Input WP Write Protect GND Ground VCC Power Supply Notes: 1. 2. 2 Pin Configuration 8-lead SOIC 8-lead TSSOP (Top View) (Top View) NC 1 8 VCC A1/NC 2 7 WP A2 3 6 SCL GND 4 5 SDA NC A1/NC A2 GND NC A1/NC A2 GND 1 2 3 4 8 7 6 5 8-pad UDFN 5-lead SOT23 (Top View) (Top View) 1 2 3 4 8 7 6 5 VCC WP SCL SDA SCL 1 GND 2 SDA 3 5 WP 4 VCC For use of 5-lead SOT23, the software A2, A1, and A0 bits in the device address word must be set to zero to properly communicate with the device. Drawings are not to scale. AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 VCC WP SCL SDA Absolute Maximum Ratings *Notice: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Operating Temperature .........................-55C to +125C Storage Temperature ............................-65C to +150C Voltage on any pin with respect to ground ..............................-1.0V to +7.0V Maximum Operating Voltage................................. 6.25V DC Output Current ............................................... 5.0mA 4. Block Diagram Figure 4-1. Block Diagram VCC GND WP Start Stop Logic SCL SDA Serial Control Logic Device Address Comparator Data Latches A1 Read Load COMP Read/Write A2 High Voltage Pump & Timing Enable INC Data Word ADDR/Counter 128-bit Serial Number Row Decoder 3. EEPROM Array Column Decoder Serial MUX DOUT / ACK Logic DOUT DIN AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 3 5. Pin Description Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. Serial Data (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open-collector devices. Device Addresses (A2, A1): The AT24CS04 uses the A2 and A1 inputs for hard wire addressing allowing a total of four 4-Kbit devices to be addressed on a single bus system. Pin 1 is a no connect and can be connected to ground. The AT24CS08 only uses the A2 input for hardware addressing and a total of two 8K devices may be addressed on a single bus system. Pins 1 and 2 are no connects and can be connected to ground. Refer to Section 8. “Device Addressing” on page 10 for details about the pin state and the required protocol for communication. The device address pins are not available on the SOT23 package offering. Refer to Section 8., “Device Addressing” for details on the protocol requirements with this package. Write Protect (WP): AT24CS04/08 has a Write Protect (WP) pin that provides hardware data protection. When the Write Protect pin is connected to ground (GND), normal read/write operations to the full array are possible. When the Write Protect pin is connected to VCC, all write operations to the memory are inhibited but read operations are still possible. This operation is summarized in Table 5-1 below. Table 5-1. 4 Write Protect WP Pin Status Part of the Array Protected At VCC Full Array At GND Normal Read/Write Operations AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 6. Memory Organization AT24CS04, 4K Serial EEPROM: Internally organized with 32 pages of 16 bytes each, the 4-Kbit device requires a 9-bit data word address for random word addressing. AT24CS08, 8K Serial EEPROM: Internally organized with 64 pages of 16 bytes each, the 8-Kbit device requires a 10-bit data word address for random word addressing. 6.1 Pin Capacitance Table 6-1. Pin Capacitance(1) Applicable over recommended operating range from TA = 25°C, f = 1.0MHz, VCC = 1.7V to 5.5V. Symbol Test Condition CI/O CIN Note: 6.2 1. Max Units Conditions Input/Output Capacitance (SDA) 8 pF VI/O = 0V Input Capacitance (A1, A2, SCL) 6 pF VIN = 0V This parameter is characterized and is not 100% tested. DC Characteristics Table 6-2. DC Characteristics Applicable over recommended operating range from: TAI = -40C to +85C, VCC = 1.7V to 5.5V (unless otherwise noted). Symbol Parameter Test Condition VCC Supply Voltage ICC1 Supply Current VCC = 5.0V Read at 400kHz ICC2 Supply Current VCC = 5.0V Write at 400kHz ISB1 Standby Current VCC = 1.7V ISB2 Min Typ Max Units 5.5 V 0.4 1.0 mA 2.0 3.0 mA VIN = VCC or VSS 1.0 μA Standby Current VCC = 5.5V VIN = VCC or VSS 6.0 μA ILI Input Leakage Current VIN = VCC or VSS 0.10 3.0 μA ILO Output Leakage Current VOUT = VCC or VSS 0.05 3.0 μA -0.6 VCC x 0.3 V VCC x 0.7 VCC + 0.5 V 1.7 (1) VIL Input Low Level VIH Input High Level(1) VOL1 Output Low Level VCC = 1.7V IOL = 0.15mA 0.2 V VOL2 Output Low Level VCC = 3.0V IOL = 2.1mA 0.4 V Note: 1. VIL min and VIH max are reference only and are not tested. AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 5 6.3 AC Characteristics Table 6-3. AC Characteristics Applicable over recommended operating range from TAI = -40C to +85C, VCC = 1.7V to 5.5V, CL = 1TTL Gate and 100pF (unless otherwise noted). 1.7V Symbol Parameter fSCL Clock Frequency, SCL tLOW Clock Pulse Width Low 1.2 0.4 μs tHIGH Clock Pulse Width High 0.6 0.4 μs tI Noise Suppression Time tAA Clock Low to Data Out Valid 0.1 tBUF Time the bus must be free before a new transmission can start 1.3 0.5 μs tHD.STA Start Hold Time 0.6 0.25 μs tSU.STA Start Setup Time 0.6 0.25 μs tHD.DAT Data In Hold Time 0 0 μs tSU.DAT Data In Setup Time 100 100 ns tR Inputs Rise Time(1) Max Min 400 100 (1) 0.9 0.05 Max Units 1000 kHz 50 ns 0.55 μs 0.3 0.3 μs 300 100 ns tF Inputs Fall Time tSU.STO Stop Setup Time 0.6 0.25 μs tDH Data Out Hold Time 50 50 ns tWR (1) Endurance Note: 6 Min 2.5V, 5.0V 1. Write Cycle Time 5 25C, Page Mode, 3.3V 1,000,000 This parameter is ensured by characterization only. AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 5 ms Write Cycles 7. Device Operation Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods. Data changes during SCL high periods will indicate a Start or Stop condition as defined below. Figure 7-1. Data Validity SDA SCL Data Stable Data Stable Data Change Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any other command. Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the Stop command will place the EEPROM in a standby power mode. Figure 7-2. Start and Stop Definition SDA SCL Start Stop AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 7 Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle. Figure 7-3. Output Acknowledge 1 SCL 8 9 DATA IN DATA OUT Start Acknowledge Standby Mode: The AT24CS04/08 features a low-power standby mode which is enabled upon power-up as well as after the receipt of the Stop condition and the completion of any internal operations. 2-wire Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be reset by following these steps: 1. Create a Start condition (if possible). 2. 3. Clock nine cycles. Create another Start condition followed by Stop condition as shown in Figure 7-4. The device should be ready for the next communication after above steps have been completed. In the event that the device is still non-responsive or remains active on the SDA bus, a power cycle must be used to reset the device. Figure 7-4. Software reset Dummy Clock Cycles SCL 1 Start Condition SDA 8 AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 2 3 8 9 Start Condition Stop Condition Figure 7-5. Bus Timing SCL: Serial Clock, SDA: Serial Data I/O tHIGH tF tR tLOW SCL tSU.STA tLOW tHD.STA tHD.DAT tSU.DAT tSU.STO SDA IN tAA tDH tBUF SDA OUT Figure 7-6. Write Cycle Timing SCL: Serial Clock, SDA: Serial Data I/O SCL th SDA 8 Bit ACK WORDN tWR Stop Condition Note: 1. (1) Start Condition The write cycle time tWR is the time from a valid Stop condition of a write sequence to the end of the internal clear/write cycle. AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 9 8. Device Addressing Standard EEPROM Access: The 4-Kbit and 8-Kbit EEPROM device requires an 8-bit device address word following a Start condition to enable the chip for a read or write operation. The device address word consists of a mandatory ‘1010’ (Ah) sequence for the first four most significant bits as shown in Figure 8-1 below. This is common to all Serial EEPROM devices. The 4K EEPROM only uses the A2 and A1 device address bits with the third bit being a memory page address bit (P0). The two device address bits must compare to their corresponding hard-wired input pins. Pin 1 is a no connect. The 8K EEPROM only uses the A2 device address bit with the next two bits being for memory page addressing (P1, P0). The A2 must compare to its corresponding hard-wired A2 input pin. Pins 1 and 2 are not connected. The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is high and a write operation is initiated if this bit is low. Upon a compare of the device address, the EEPROM will output a zero. If a compare is not made, the chip will return to a standby state. Note: For the SOT23 package offering, the 4-Kbit EEPROM software A2 and A1 bits in the device address word must be set to zero to properly communicate. The 8-Kbit EEPROM software A2 bit in the device address word must be set to zero to properly communicate in the SOT23 package. Serial Number Access: The AT24CS04 and AT24CS08 utilizes a separate memory block containing a factory programmed 128-bit serial number. Access to this memory location is obtained by beginning the device address word with a ‘1011’ (Bh) sequence. The behavior of the next three bits remain the same as during a standard EEPROM addressing sequence. These three bits must compare to their corresponding hard-wired input pins A2 and A1 (4-Kbit only) in order for the part to acknowledge. The restrictions for these bits with a SOT23 package are the same when accessing the serial number feature. The eighth bit of the device address needs be set to a one to read the Serial Number. A zero in this bit position, other than during a dummy write sequence to set the address pointer, will result in a unknown data read from the part. Writing or altering the 128-bit serial number is not possible. Further specific protocol is needed to read the serial number from of the device. See Section 10., “Read Operations” on page 12 for more details on accessing the special feature. Table 8-1. Device Address Density Access Area 4-Kbit 8-Kbit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 EEPROM 1 0 1 0 A2 A1 P0 R/W Serial Number 1 0 1 1 A2 A1 0 1 EEPROM 1 0 1 0 A2 P1 P0 R/W Serial Number 1 0 1 1 A2 0 0 1 MSB 10 AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 LSB 9. Write Operations Byte Write: A Byte Write operation requires an 8-bit word address following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the addressing device, such as a microcontroller, must terminate the write sequence with a Stop condition. At this time the EEPROM enters an internally timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled during this write cycle and the EEPROM will not respond until the Write is complete. Figure 9-1. Byte Write S T A R T Device Address W R I T E Word Address S T O P Data SDA LINE R A / C WK M S B A C K A C K Page Write: The 4-Kbit and 8-Kbit devices are capable of 16-byte Page Writes. A Page Write is initiated in the same way as a Byte Write, but the microcontroller does not send a Stop condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to fifteen additional data words. The EEPROM will respond with a zero after each data word received. The microcontroller must terminate the Page Write sequence with a Stop condition. The data word address lower four bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the internally generated word address reaches the page boundary, the subsequent byte loaded will be placed at the beginning of the same page. If more than sixteen data words are transmitted to the EEPROM, the data word address will roll-over and previously loaded data will be overwritten. Figure 9-2. Page Write S T A R T W R I T Device Address E Word Address (n) Data (n) Data (n + 1) S T O P Data (n + x) SDA LINE M S B R A / C WK A C K A C K A C K A C K Acknowledge Polling: Once the internally timed write cycle has started and the EEPROM inputs are disabled, acknowledge polling can be initiated. This involves sending a Start condition followed by the device address word. The Read/Write bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM respond with a zero allowing the next read or write sequence to begin. AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 11 10. Read Operations Read operations are initiated in the same way as Write operations with the exception that the Read/Write select bit in the device address word is set to one. There are four types of read operations: Current Address Read Random Address Read Sequential Read Serial Number Read Current Address Read: The internal data word address counter maintains the last address accessed during the last Read or Write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address roll-over during read is from the last byte of the last memory page to the first byte of the first page. The address roll-over during write is from the last byte of the current page to the first byte of the same page. Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an zero but does generate a following Stop condition. Figure 10-1. Current Address Read S T A R T Device Address R E A D S T O P Data SDA LINE M S B N O R A / C WK A C K Random Read: A Random Read requires a dummy byte write sequence to load in the data word address. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another Start condition. The microcontroller now initiates a Current Address Read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller does not respond with a zero but does generate a following Stop condition. Figure 10-2. Random Read S T A R T W R I T Device Address E S T A R T Device Address Word Address (n) R E A D S T O P Data (n) SDA LINE M S B R A / C WK Dummy Write 12 AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 A C K A C K N O A C K Sequential Read: Sequential reads are initiated by either a current address read or a random address read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will roll-over and the Sequential Read will continue. The Sequential Read operation is terminated when the microcontroller does not respond with a zero but does generate a following Stop condition. Figure 10-3. Device Address Sequential Read R E A D Data (n) Data (n + 1) Data (n + 2) S T O P Data (n + x) SDA LINE R A / C WK A C K A C K A C K N O A C K Serial Number Read: Reading the serial number is similar to the sequential read sequence but requires use of the device address seen in Figure 9-1 on page 11, a dummy write, and the use of specific word address. Note: The entire 128-bit value must be read from the starting address of the serial number block to guarantee a unique number. Since the address pointer of the device is shared between the regular EEPROM array and the serial number block, a dummy write sequence, as part of a Random Read or Sequential Read protocol, should be performed to ensure the address pointer is set to zero. A Current Address Read of the serial number block is supported but if the previous operation was to the EEPROM array, the address pointer will retain the last location accessed, incremented by one. Reading the serial number from a location other than the first address of the block will not result in a unique serial number. Additionally, the word address must begin with a ‘10’ sequence regardless of the intended address. If a word address other than ‘10’ is used, then the device will output undefined data. Therefore, if the application desires to read the first byte of the serial number, the word address input would need to be 80h. When the end of the 128-bit serial number is reached (16 bytes of data), the data word address will roll-over back to the beginning of the 128-bit serial number. The Serial Number Read operation is terminated when the microcontroller does not respond with an zero (ACK) and instead issues a Stop condition (see Figure 10-4 on page 14). AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 13 Figure 10-4. Serial Number Read S T A R T SDA LINE Device Address W R I T E 1 0 1 1 M S B S T A R T Word Address n 1 0 0 0 0 0 0 0 R A / C W K R E A D Device Address 1 0 1 1 A C K * 0 1 A C K Serial Number Data Byte 0x0 A C K Dummy Write S T O P Serial Number Data Byte 0x1 Serial Number Data Byte 0x2 Serial Number Data Byte 0x3 Serial Number Data Byte 0xF N O A C K Note: 14 * This bit is A1 hardware address bit for the AT24CS04, and this bit is a zero for the AT24CS08. AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 11. Part Markings AT24CS04 and AT24CS08: Package Marking Information 8-lead SOIC 8-lead TSSOP ATMLHYWW ## M @ AAAAAAAA ATHYWW ## M @ AAAAAAA 5-lead SOT-23 8-lead UDFN 2.0 x 3.0 mm Body ## MU ## HM@ YXX Note 1: YMXX Top Mark Bottom Mark designates pin 1 Note 2: Package drawings are not to scale Catalog Number Truncation AT24CS04 Truncation Code ##: N4 AT24CS08 Truncation Code ##: N8 Date Codes Y = Year 2: 2012 3: 2013 4: 2014 5: 2015 Voltages 6: 2016 7: 2017 8: 2018 9: 2019 M = Month A: January B: February ... L: December WW = Work Week of Assembly 02: Week 2 04: Week 4 ... 52: Week 52 Country of Assembly Lot Number @ = Country of Assembly AAA...A = Atmel Wafer Lot Number M: 1.7V min Grade/Lead Finish Material H: Industrial/NiPdAu U: Industrial/Matte Tin Trace Code Atmel Truncation XX = Trace Code (Atmel Lot Numbers Correspond to Code) Example: AA, AB.... YZ, ZZ AT: Atmel ATM: Atmel ATML: Atmel 5/7/12 TITLE Package Mark Contact: [email protected] 24CS04-08SM, AT24CS04 and AT24CS08 Package Marking Information DRAWING NO. REV. 24CS04-08SM A AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 15 12. Ordering Code Detail AT2 4 C S 0 4 - S S H M - B Atmel Designator Product Family 24CS = Serial EEPROM, Plus 128-bit Serial Number Feature Shipping Carrier Option B T E Operating Voltage M Device Density 04 = 4K 08 = 8K = Bulk (Tubes) = Tape and Reel, Standard Quantity Option = Tape and Reel, Expanded Quantity Option = 1.7V to 5.5V Package Device Grade or Wafer/Die Thickness H = Green, NiPdAu Lead Finish, Industrial Temperature Range (-40˚C to +85˚C) U = Green, Matte Sn Lead Finish, Industrial Temperature Range (-40˚C to +85˚C) 11 = 11mil Wafer Thickness Package Option SS = JEDEC SOIC X = TSSOP MA = UDFN ST = SOT23 WWU = Wafer Unsawn 16 AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 13. Ordering Information Additional package types that are not listed may be available. Please contact Atmel for more details. Delivery Information Atmel Ordering Code Finish Package Form Quantity Bulk (Tubes) 100 per Tube Tape and Reel 4,000 per Reel Bulk (Tubes) 100 per Tube Tape and Reel 5,000 per Reel Tape and Reel 5,000 per Reel Tape and Reel 15,000 per Reel Tape and Reel 5,000 per Reel AT24CS04-SSHM-B Operation Range 8S1 AT24CS04-SSHM-T AT24CS04-XHM-B AT24CS04-XHM-T NiPdAu 8X (Lead-free/Halogen-free) AT24CS04-MAHM-T Industrial Temperature (-40C to +85C) 8MA2 AT24CS04-MAHM-E AT24CS04-STUM-T AT24CS04-WWU11M(1) 5TS1 N/A Wafer Sale Note 1 AT24CS08-SSHM-B Bulk (Tubes) 100 per Tube Tape and Reel 4,000 per Reel Bulk (Tubes) 100 per Tube Tape and Reel 5,000 per Reel Tape and Reel 5,000 per Reel Tape and Reel 15,000 per Reel Tape and Reel 5,000 per Reel 8S1 AT24CS08-SSHM-T AT24CS08-XHM-B AT24CS08-XHM-T NiPdAu 8X (Lead-free/Halogen-free) AT24CS08-MAHM-T Industrial Temperature (-40C to +85C) 8MA2 AT24CS08-MAHM-E AT24CS08-STUM-T AT24CS08-WWU11M(1) Note: 1. 5TS1 N/A Wafer Sale Note 1 For Wafer sales, please contact Atmel Sales. Package Type 8S1 8-lead, 0.150" wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8X 8-lead, 4.4mm body, Plastic Thin Shrink Small Outline (TSSOP) 8MA2 8-pad, 2.00mm x 3.00mm body, 0.50mm pitch, Dual No Lead (UDFN) 5TS1 5-lead, 2.90mm x 1.60mm body, Plastic Thin Shrink Small Outline (SOT23) AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 17 14. Packaging Information 14.1 8S1 — 8-lead JEDEC SOIC C 1 E E1 L N Ø TOP VIEW END VIEW e b COMMON DIMENSIONS (Unit of Measure = mm) A A1 D SIDE VIEW Notes: This drawing is for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. SYMBOL MIN A 1.35 NOM MAX – 1.75 A1 0.10 – 0.25 b 0.31 – 0.51 C 0.17 – 0.25 D 4.80 – 5.05 E1 3.81 – 3.99 E 5.79 – 6.20 e NOTE 1.27 BSC L 0.40 – 1.27 Ø 0° – 8° 6/22/11 Package Drawing Contact: [email protected] 18 TITLE 8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 GPC SWB DRAWING NO. REV. 8S1 G 14.2 8X — 8-lead TSSOP C 1 Pin 1 indicator this corner E1 E L1 N L Top View End View A b A1 e D SYMBOL Side View Notes: COMMON DIMENSIONS (Unit of Measure = mm) A2 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, etc. 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15mm (0.006in) per side. 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25mm (0.010in) per side. 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07mm. 5. Dimension D and E1 to be determined at Datum Plane H. MIN NOM MAX A - - 1.20 A1 0.05 - 0.15 A2 0.80 1.00 1.05 D 2.90 3.00 3.10 2, 5 E NOTE 6.40 BSC E1 4.30 4.40 4.50 3, 5 b 0.19 0.25 0.30 4 e L 0.65 BSC 0.45 L1 C 0.60 0.75 1.00 REF 0.09 - 0.20 2/27/14 TITLE Package Drawing Contact: [email protected] 8X, 8-lead 4.4mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) GPC TNR DRAWING NO. 8X AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 REV. E 19 14.3 8MA2 — 8-pad UDFN E 1 8 Pin 1 ID 2 7 3 6 4 5 D C TOP VIEW A2 SIDE VIEW A A1 E2 b (8x) 8 7 1 D2 6 3 5 4 e (6x) K L (8x) BOTTOM VIEW Notes: COMMON DIMENSIONS (Unit of Measure = mm) 2 Pin#1 ID 1. This drawing is for general information only. Refer to Drawing MO-229, for proper dimensions, tolerances, datums, etc. 2. The Pin #1 ID is a laser-marked feature on Top View. 3. Dimensions b applies to metallized terminal and is measured between 0.15 mm and 0.30 mm from the terminal tip. If the terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area. 4. The Pin #1 ID on the Bottom View is an orientation feature on the thermal pad. SYMBOL MIN NOM MAX A 0.50 0.55 0.60 A1 0.0 0.02 0.05 A2 - - 0.55 D 1.90 2.00 2.10 D2 1.40 1.50 1.60 E 2.90 3.00 3.10 E2 1.20 1.30 1.40 b 0.18 0.25 0.30 C L 3 1.52 REF 0.30 e K NOTE 0.35 0.40 0.50 BSC 0.20 - - 11/26/14 Package Drawing Contact: [email protected] 20 TITLE 8MA2, 8-pad 2 x 3 x 0.6mm Body, Thermally Enhanced Plastic Ultra Thin Dual Flat No-Lead Package (UDFN) AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 GPC DRAWING NO. REV. YNZ 8MA2 G 14.4 5TS1 — 5-lead SOT23 e1 C 4 5 E1 C L E L1 1 3 2 END VIEW TOP VIEW b A2 SEATING PLANE e A A1 D SIDE VIEW COMMON DIMENSIONS (Unit of Measure = mm) 1. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm per end. Dimension E1 does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.15 mm per side. 2. The package top may be smaller than the package bottom. Dimensions D and E1 are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch between the top and bottom of the plastic body. 3. These dimensions apply to the flat section of the lead between 0.08 mm and 0.15 mm from the lead tip. 4. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion shall be 0.08 mm total in excess of the "b" dimension at maximum material condition. The dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and an adjacent lead shall not be less than 0.07 mm. This drawing is for general information only. Refer to JEDEC Drawing MO-193, Variation AB for additional information. SYMBOL MIN A A1 A2 c D E E1 L1 e e1 b 0.00 0.70 0.08 NOM 0.90 2.90 BSC 2.80 BSC 1.60 BSC 0.60 REF 0.95 BSC 1.90 BSC 0.30 - MAX 1.00 0.10 1.00 0.20 0.50 NOTE 3 1,2 1,2 1,2 3,4 5/31/12 Package Drawing Contact: [email protected] TITLE GPC 5TS1, 5-lead 1.60mm Body, Plastic Thin Shrink Small Outline Package (Shrink SOT) TSZ DRAWING NO. 5TS1 AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 REV. D 21 15. Revision History Doc. Rev. Date Comments Add the UDFN Expanded Quantity Option and bulk SOIC and TSSOP ordering codes. 8766E 01/2015 Update ordering code table, 8X and 8MA2 package drawings, the ordering information section, and the disclaimer page. Correct pinouts from bottom to top view and reorganization figures. No changes to functional specification. 8766D 07/2013 Update status from preliminary to complete release and footers and disclaimer page. 8766C 09/2012 Update ordering information Update the device address table: 4-Kbit serial number bit 1 changed from P0 to 0. 8-Kbit serial number bit 2 changed from P1 to 0 and bit 2 from P0 to 0. Update the serial number read figure’s device address. 8766B 08/2012 Correct figure, Serial Number Read, to change 0 to * and add note. 8766A 22 06/2012 Initial document release. AT24CS04/08 [DATASHEET] Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015 XXXXXX Atmel Corporation 1600 Technology Drive, San Jose, CA 95110 USA T: (+1)(408) 441.0311 F: (+1)(408) 436.4200 | www.atmel.com © 2015 Atmel Corporation. / Rev.: Atmel-8766E-SEEPROM-AT24CS04-08-Datasheet_012015. Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities®, and others are registered trademarks or trademarks of Atmel Corporation in U.S. and other countries. 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