Atmel AT24C16C I2C Automotive Temperature Serial EEPROM 16K (2048 x 8) DATASHEET Features Standard-voltage operation VCC = 2.5V to 5.5V Automotive temperature range –40C to 125C Internally organized 2048 x 8 (16K) 2-wire serial interface compatible with I2C Schmitt Trigger, filtered inputs for noise suppression Bidirectional data transfer protocol 400kHz compatibility Write protect pin for hardware data protection 16-byte page write modes Partial page writes are allowed Self-timed write cycle (5ms max) High-reliability Endurance: 1 million write cycles Data retention: 100 years 8-lead JEDEC SOIC and 8-lead TSSOP packages Description The Atmel® AT24C16C provides 16384 bits of Serial Electrically Erasable and Programmable Read-Only Memory (EEPROM) organized as 2048 words of eight bits each. The device is optimized for use in many automotive applications where low-power and low-voltage operation are essential. AT24C16C is available in space saving 8-lead JEDEC SOIC and 8-lead TSSOP packages and is accessed via a 2-wire serial interface. This device operates from 2.5V to 5.5V. Figure 1. Pin Configurations Pin Name Function SDA Serial Data SCL Serial Clock Input WP Write Protect NC No Connect 8-lead TSSOP 8-lead SOIC NC NC NC GND 1 2 3 4 8 7 6 5 VCC WP SCL SDA NC NC NC GND 1 2 3 4 8 7 6 5 VCC WP SCL SDA 8799B–SEEPR–8/12 Absolute Maximum Ratings* Operating Temperature 55C to +125C Storage Temperature 65C to +150C Voltage on any pin with respect to ground 1.0V to +7.0V Maximum Operating Voltage . . . . . . . . . . . . .6.25V DC Output Current. . . . . . . . . . . . . . . . . . . . 5.0mA 2. *Notice: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Block Diagram VCC GND WP Start Stop Logic SCL SDA Serial Control Logic LOAD Device Address Comparator R/W EN COMP LOAD Data Word Addr/Counter Y DEC H.V. Pump/Timing Data Recovery INC X DEC 1. EEPROM Serial MUX DOUT/ACK Logic DIN DOUT Atmel AT24C16C Automotive [DATASHEET] 8799B–SEEPR–8/12 2 3. Pin Description Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. Serial Data (SDA): The SDA pin is bi-directional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open-collector devices. Device/Page Addresses (A2, A1, A0): I2C signals A0, A1, and A2 (device package pins 1, 2, and 3) are no connects. AT24C16C does not use the device address pins, which limits the number of devices on a single bus to one. Write Protect (WP): AT24C16C has a Write Protect pin that provides hardware data protection. The Write Protect pin allows normal read/write operations when connected to ground (GND). When the Write Protect pin is connected to VCC, the write protection feature is enabled and operates as shown in the following table. Table 3-1. WP Pin Status Write Protect Part of the Array Protected Atmel AT24C16C At VCC Full (16K) Array At GND Normal Read/Write Operations Atmel AT24C16C Automotive [DATASHEET] 8799B–SEEPR–8/12 3 4. Memory Organization AT24C16C, 16K Serial EEPROM: Internally organized with 128 pages of 16 bytes each, the 16K requires an 11-bit data word address for random word addressing. 4.1 Pin Capacitance(1) Symbol Test Condition CI/O CIN Note: 4.2 1. Max Units Conditions Input/Output Capacitance (SDA) 8 pF VI/O = 0V Input Capacitance (SCL) 6 pF VIN = 0V This parameter is characterized and is not 100% tested. DC Characteristics Applicable over recommended operating range from: TA = -40°C to +125°C, VCC = +2.5V to +5.5V (unless otherwise noted). Symbol Parameter Max Units VCC1 Supply Voltage 5.5 V ICC Supply Current VCC = 5.0V Read at 100kHz 0.4 1.0 mA ICC Supply Current VCC = 5.0V Write at 100kHz 2.0 3.0 mA ISB1 Standby Current VCC = 2.5V VIN = VCC or VSS 1.6 4.0 μA ISB2 Standby Current VCC = 5.0V VIN = VCC or VSS 4.0 6.0 μA ILI Input Leakage Current VIN = VCC or VSS 0.10 3.0 μA ILO Output Leakage Current VOUT = VCC or VSS 0.05 3.0 μA VIL Input Low Level(1) 0.6 VCC x 0.3 V VIH Input High Level(1) VCC x 0.7 VCC + 0.5 V VOL2 Output Low Level VCC = 3.0V IOL = 2.1mA 0.4 V VOL1 Output Low Level VCC = 1.8V IOL = 0.15mA 0.2 V Note: 1. Test Condition Min Typ 2.5 VIL min and VIH max are reference only and are not tested. Atmel AT24C16C Automotive [DATASHEET] 8799B–SEEPR–8/12 4 4.3 AC Characteristics Applicable over recommended operating range from TA = -40°C to +125°C, VCC = +2.5V to +5.5V, CL = 1 TTL Gate and 100pF (unless otherwise noted). Atmel AT24C16C Symbol Parameter fSCL Clock Frequency, SCL tLOW Clock Pulse Width Low 1.2 μs tHIGH Clock Pulse Width High 0.6 μs tI Noise Suppression Time(1) tAA Clock Low to Data Out Valid 0.1 tBUF Time the bus must be free before a new transmission can start(2) 1.2 μs tHD.STA Start Hold Time 0.6 μs tSU.STA Start Set-up Time 0.6 μs tHD.DAT Data In Hold Time 0 μs tSU.DAT Data In Set-up Time 100 ns tR Inputs Rise Time(2) 300 ns tF Inputs Fall Time(2) 300 ns tSU.STO Stop Set-up Time 0.6 μs tDH Data Out Hold Time 50 ns tWR Write Cycle Time Endurance(2) 5.0V, 25C, Page Mode Note: Min Max Units 400 kHz 50 ns 0.9 μs 5 1M 1. This parameter is characterized and is not 100% tested (TA = 25C). 2. This parameter is characterized. ms Write Cycles Atmel AT24C16C Automotive [DATASHEET] 8799B–SEEPR–8/12 5 5. Device Operation Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only during SCL low time periods (see Figure 5-4 on page 7). Data changes during SCL high periods will indicate a start or stop condition as defined below. Start Condition: A high-to-low transition of SDA with SCL high is a start condition which must precede any other command (see Figure 5-5 on page 7). Stop Condition: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop command will place the EEPROM in a standby power mode (see Figure 5-5 on page 7). Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle. Standby Mode: AT24C16C features a low-power standby mode which is enabled: Upon power-up. After the receipt of the stop bit and the completion of any internal operations. Memory Reset: After an interruption in protocol, power loss or system reset, any 2-wire part can be reset by following these steps: 1. Clock up to nine cycles, 2. Look for SDA high in each cycle while SCL is high, 3. Create a start condition. Figure 5-1. Memory Reset Dummy Clock Cycles 1 SCL 2 3 8 9 Start Bit Start Bit Stop Bit SDA Figure 5-2. Bus Timing SCL: Serial Clock, SDA: Serial Data I/O tHIGH tF tR tLOW tLOW SCL tSU.STA tHD.STA tHD.DAT tSU.DAT tSU.STO SDA In tAA tDH tBUF SDA Out Atmel AT24C16C Automotive [DATASHEET] 8799B–SEEPR–8/12 6 Figure 5-3. Write Cycle Timing SCL: Serial Clock, SDA: Serial Data I/O SCL 8th bit SDA ACK WORDn twr(1) Start Condition Stop Condition Note: 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal clear/write cycle. Figure 5-4. Data Validity SDA SCL Data Stable Data Stable Data Change Figure 5-5. Start and Stop Definition SDA SCL Start Stop Atmel AT24C16C Automotive [DATASHEET] 8799B–SEEPR–8/12 7 Figure 5-6. Output Acknowledge 1 SCL 8 9 Data In Data Out Start 6. Acknowledge Device Addressing The 16K EEPROM requires an 8-bit device address word following a start condition to enable the chip for a read or write operation (see Figure 8-1 on page 9). The device address word consists of a mandatory one, zero sequence for the first four most significant bits as shown. This is common to all the Serial EEPROM devices. The next three bits are used for memory page addressing. These page addressing bits on the 16K devices should be considered the most significant bits of the data word address which follows. The eighth bit of the device address is the read/write operation select bit. A read operation is initiated if this bit is high and a write operation is initiated if this bit is low. If the device address meets the requirements listed above, the device will acknowledge with a zero by pulling the SDA signal low. If the comparison is not made, the device will return to a standby state and the SDA signal will float high. 7. Write Operations Byte Write: A write operation requires an 8-bit data word address following the device address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the addressing device, such as a microcontroller, must terminate the write sequence with a stop condition. At this time the EEPROM enters an internally timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled during this write cycle and the EEPROM will not respond until the write is complete (see Figure 8-2 on page 9). Page Write: The EEPROM is capable of 16-byte page writes. A Page Write is initiated the same as a Byte Write, but the microcontroller does not send a stop condition after the first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to fifteen more data words. The EEPROM will respond with a zero after each data word received. The microcontroller must terminate the page write sequence with a stop condition (see Figure 8-3 on page 10). The data word address lower four bits are internally incremented following the receipt of each data word. The higher data word address bits are not incremented, retaining the memory page row location. When the word address, internally generated, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than sixteen data words are transmitted to the EEPROM, the data word address will roll-over and previous data will be overwritten. Atmel AT24C16C Automotive [DATASHEET] 8799B–SEEPR–8/12 8 Acknowledge Polling: Once the internally timed write cycle has started and the EEPROM inputs are disabled, acknowledge polling can be initiated. This involves sending a start condition followed by the device address word. The read/write bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM respond with a zero, allowing the read or write sequence to continue. 8. Read Operations Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to one. There are three read operations: Current Address Read, Random Address Read, and Sequential Read. Current Address Read: The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address roll-over during read is from the last byte of the last memory page to the first byte of the first page. The address roll-over during write is from the last byte of the current page to the first byte of the same page. Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an input zero but does generate a following stop condition (see Figure 8-4 on page 10). Random Read: A Random Read requires a dummy byte write sequence to load in the data word address. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another start condition. The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller does not respond with a zero but does generate a following stop condition (see Figure 8-5 on page 10). Sequential Read: Sequential Reads are initiated by either a Current Address Read or a Random Address Read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will roll-over and the Sequential Read will continue. The Sequential Read operation is terminated when the microcontroller does not send an acknowledge (pull the SDA signal low), but does generate the stop condition. (see Figure 8-6 on page 10). Figure 8-1. Device Address 16K 1 0 1 0 P2 P1 P0 R/W Figure 8-2. Byte Write S T A R T Device Address W R I T E Word Address S T O P Data SDA Line M S B L R A S / C B W K M S B L A S C B K A C K Atmel AT24C16C Automotive [DATASHEET] 8799B–SEEPR–8/12 9 Figure 8-3. Page Write S T A R T W R I T E Device Address Word Address (n) Data (n) Data (n + 1) S T O P Data (n + x) SDA Line M S B L R A S / C B W K A C K A C K A C K A C K Figure 8-4. Current Address Read S T A R T R E A D Device Address S T O P Data SDA Line M S B N O L R A S / C B WK A C K Figure 8-5. Random Read S T A R T Device Address W R I T E S T A R T Word Address (n) R E A Device Address D S T O P Data (n) SDA Line M S B L R A S / C B W K M S B L A S C B K M S B L S B A C K N O A C K Dummy Write Figure 8-6. Sequential Read Device Address R E A D Data (n) A C K Data (n + 1) A C K Data (n + 2) A C K S T O P Data (n + x) SDA Line R A / C WK 8.1 N O A C K Power Recommendation The device internal POR (Power-On Reset) threshold is just below the minimum operating voltage of the device. Power shall rise monotonically from 0.0Vdc to full VCC in less than 1ms. Hold at full VCC for at least 100μs before the first operation. Power shall drop from full VCC to 0.0Vdc in less than 1ms. Power dropping to a non-zero level and then slowly going to zero is not recommended. Power shall remain off (0.0Vdc) for 0.5s minimum. Please consult Atmel if your power conditions do not meet the above recommendations. Atmel AT24C16C Automotive [DATASHEET] 8799B–SEEPR–8/12 10 9. Product Marking 8 lead SOIC 8 lead TSSOP 3 Rows of 8 Characters 3 Rows 2 of 6 and 1 of 7 Characters ATPYWW 16CD @ AAAAAAA ATMLPYWW 16CD @ AAAAAAAA Catalog Truncation: 16C Catalog Number: AT24C16C Date Codes Y = Year 2: 2012 3: 2013 4: 2014 5: 2015 6: 7: 8: 9: Voltages 2016 2017 2018 2019 M = Month A: January B: February “ ” “ L: December WW = Work Week of Assembly 02: Week 2 04: Week 4 ” “ ” 52: Week 52 Trace Code D: 2.5v min Grade/Lead Finish Material XX = Trace Code (ATMEL Lot Numbers to Correspond to Code) (e.g. XX: AA, AB...YZ, ZZ) P: Automotive/NiPdAu Lot Number AAAAAAA = ATMEL Wafer Lot Number ATMEL Truncation AT: ATMEL ATM: ATMEL ATML: ATMEL Country of Assembly @ = Country of Assembly 2/3/12 Package Mark Contact: [email protected] TITLE 24C16CAM, AT24C16C Automotive Marking Information for Package Offering DRAWING NO. 24C16CAM Atmel AT24C16C Automotive [DATASHEET] 8799B–SEEPR–8/12 REV. A 11 10. Ordering Code Details AT 2 4 C 1 6 C - S S P D - T Atmel Designator Shipping Carrier Option B or blank = Bulk (tubes) T = Tape and reel Product Family Operating Voltage D = 2.5V to 5.5V Device Density 16 = 16k Package Device Grade or Wafer/Die Thickness P = Green, NiPdAu lead finish Automotive Temperature range (-40°C to +125°C) Device Revision Package Option SS X = JEDEC SOIC = TSSOP Atmel AT24C16C Automotive [DATASHEET] 8799B–SEEPR–8/12 12 11. Atmel AT24C16C Ordering Information Atmel Ordering Code AT24C16C-SSPD AT24C16C-SSPD-T(1) AT24C16C-XPD AT24C16C-XPD-T(1) Note: 1. Package 8S1 8X Operation Range NiPdAu Lead-free/Halogen-free/Automotive Temperature (40C to 125C) Tape and reel delivery: SOIC 4k/reel TSSOP 5k/reel Package Type 8S1 8-lead, 0.150" wide, Plastic Gull Wing Small Outline (JEDEC SOIC) 8X 8-lead, 0.170" wide, Thin Shrink Small Outline (TSSOP) Atmel AT24C16C Automotive [DATASHEET] 8799B–SEEPR–8/12 13 12. Packaging Information 8S1 — 8-lead JEDEC SOIC C 1 E E1 L N Ø TOP VIEW END VIEW e b COMMON DIMENSIONS (Unit of Measure = mm) A A1 D SIDE VIEW Notes: This drawing is for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. SYMBOL MIN A 1.35 NOM MAX – 1.75 A1 0.10 – 0.25 b 0.31 – 0.51 C 0.17 – 0.25 D 4.80 – 5.05 E1 3.81 – 3.99 E 5.79 – 6.20 e NOTE 1.27 BSC L 0.40 – 1.27 Ø 0° – 8° 6/22/11 Package Drawing Contact: [email protected] TITLE 8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) GPC SWB DRAWING NO. REV. 8S1 G Atmel AT24C16C Automotive [DATASHEET] 8799B–SEEPR–8/12 14 8X — 8-lead TSSOP C 1 Pin 1 indicator this corner E1 E L1 N L Top View End View A b A1 e COMMON DIMENSIONS (Unit of Measure = mm) A2 SYMBOL D Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, etc. 2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed 0.15mm (0.006in) per side. 3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25mm (0.010in) per side. 4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08mm total in excess of the b dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07mm. 5. Dimension D and E1 to be determined at Datum Plane H. MIN MAX NOM A - - 1.20 A1 0.05 - 0.15 A2 0.80 1.00 1.05 D 2.90 3.00 3.10 E NOTE 2, 5 6.40 BSC E1 4.30 4.40 4.50 3, 5 b 0.19 – 0.30 4 e L 0.65 BSC 0.45 0.60 0.75 L1 1.00 REF C 0.09 - 0.20 6/22/11 TITLE Package Drawing Contact: [email protected] GPC 8X, 8-lead 4.4mm Body, Plastic Thin Shrink Small Outline Package (TSSOP) TNR DRAWING NO. 8X Atmel AT24C16C Automotive [DATASHEET] 8799B–SEEPR–8/12 REV. D 15 13. Revision History Doc. Rev. Date 8799B 08/2012 8799A 03/2012 Comments Remove preliminary status. Update Atmel logos and disclaimer/copy page. Initial document release Atmel AT24C16C Automotive [DATASHEET] 8799B–SEEPR–8/12 16 Atmel Corporation 1600 Technology Drive Atmel Asia Limited Unit 01-5 & 16, 19F Atmel Munich GmbH Business Campus Atmel Japan G.K. 16F Shin-Osaki Kangyo Bldg San Jose, CA 95110 BEA Tower, Millennium City 5 Parkring 4 1-6-4 Osaki, Shinagawa-ku USA 418 Kwun Tong Roa D-85748 Garching b. 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