Features • Operating Voltage: 3.3V, 5V tolerant • Access Time: • • • • • • • • • • – 17 ns – 15 ns Very Low Power Consumption – Active: 610 mW (Max) @ 17 ns(1), 540 mW (Max) @ 25 ns – Standby: 3.3 mW (Typ) Wide Temperature Range: -55 to +125°C TTL-Compatible Inputs and Outputs Asynchronous Designed on 0.25 µm Radiation Hardened Process No Single Event Latch Up below LET Threshold of 80 MeV/mg/cm2@125°C Tested up to a Total Dose of 300 krads (Si) according to MIL-STD-883 Method 1019 500 Mils Wide FP36 Package ESD Better than 2000V Quality Grades: ESCC with 9301/052, QML-Q or V with smd 5962-05208 Note: 1. 650 mW (Max) @ 15 ns Description The AT60142FT is a very low power CMOS static RAM organized as 512K x 8 bits. Atmel brings the solution to applications where fast computing is as mandatory as low consumption, such as aerospace electronics, portable instruments, or embarked systems. Rad Hard 512K x 8 5V Tolerant Very Low Power CMOS SRAM AT60142FT Utilizing an array of six transistors (6T) memory cells, the AT60142FT combines an extremely low standby supply current (Typical value = 1 mA) with a fast access time at 15 ns over the full military temperature range. The high stability of the 6T cell provides excellent protection against soft errors due to noise. The AT60142FT is processed according to the methods of the latest revision of the MIL PRF 38535 or ESCC 9000. It is produced on a radiation hardened 0.25 µm CMOS process. 7726C–AERO–05/10 1 AT60142FT Block Diagram Pin Configuration A0 A1 A2 A4 CS I/O1 I/O2 Vcc GND I/O3 I/O4 WE A5 A6 A7 A8 A9 36 - pin -Flatpack - 500 Mils A3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 NC A18 A17 A16 A15 OE I/O8 I/O7 GND Vcc I/O6 I/O5 A14 A13 A12 A11 A10 N/C 2 7726C–AERO–05/10 Pin Description Table 1. Pin Names Name Description A0 - A18 Address Inputs I/O1 - I/O8 Data Input/Output CS Chip Select WE Write Enable OE Output Enable Vcc Power Supply GND Ground Table 2. Truth Table(1) CS WE OE Inputs/Outputs Mode H X X Z Deselect/ Power-down L H L Data Out Read L L X Data In Write L H H Z Output Disable Note: 3 1. L=low, H=high, X= L or H, Z=high impedance. AT60142FT 7726C–AERO–05/10 AT60142FT Electrical Characteristics Absolute Maximum Ratings* Supply Voltage to GND Potential: ....................... -0.5V + 4.6V *NOTE: Voltage range on any input: ...................... GND -0.5V to 7.0V Voltage range on any ouput: ..................... GND -0.5V to 7.0V Storage Temperature: ................................. -65°C to + 150°C Output Current from Output Pins: ................................ 20 mA Electro Statics Discharge Voltage: ............................ > 2000V (MIL STD 883D Method 3015.3) Stresses beyond those listed under "Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure between recommended DC operating and absolute maximum rating conditions for extended periods may affect device reliability. Military Operating Range Operating Voltage Operating Temperature 3.3 + 0.3V -55°C to + 125°C Military Recommended DC Operating Conditions Parameter Note: Description Vcc Supply voltage GND Ground Min Typ Max Unit 3 3.3 3.6 V 0.0 0.0 0.0 V VIL Input low voltage GND - 0.3 0.0 0.8 V VIH Input high voltage 2.2 – 5.5(1) V Min Typ Max Unit 1. 5.8V in transient conditions. Capacitance Parameter Note: Description Cin(1) Input capacitance – – 12 pF Cout(1) Output capacitance – – 12 pF 1. Guaranteed but not tested. 4 7726C–AERO–05/10 DC Parameters Parameter Minimum Typical Maximum Unit Input leakage current -1 – 1 μA IOZ(1) Output leakage current -1 – 1 μA IIH(2) at 5.5V Input Leakage Current – – 2 μA Output Leakage Current – – 1.5 μA VOL(3) Output low voltage – – 0.4 V VOH(4) Output high voltage 2.4 – – V IIX (1) IOZH(2) at 5.5V Description 1. GND < VIN < VCC, GND < VOUT < VCC Output Disabled. 2. 3. VIN = 5.5V, VOUT = 5.5V, Output Disabled. VCC min. IOL = 6 mA 4. VCC min. IOH = -4 mA. Consumption 1. 2. 3. 4. 5 TAVAV/TAVAW Test Condition AT60142FT-17 AT60142FT-15 Unit Value Standby Supply Current – 2 2.5 mA max Standby Supply Current – 1.8 2 mA max ICCOP(3) Read Dynamic Operating Current 15 ns 17 ns 25 ns 50 ns 1 µs 170 150 75 10 180 170 150 75 10 mA max ICCOP(4) Write Dynamic Operating Current 15 ns 17 ns 25 ns 50 ns 1 µs 145 130 120 100 150 145 130 120 100 mA max Symbol Description ICCSB (1) ICCSB1 (2) CS >VIH CS > VCC - 0.3V F = 1/TAVAV, Iout = 0 mA, WE = OE = VIH, VIN = GND/VCC, VCC max. F = 1/TAVAW, Iout = 0 mA, WE = VIL, OE = VIH , VIN = GND/VCC, VCC max. AT60142FT 7726C–AERO–05/10 AT60142FT Data Retention Mode Atmel CMOS RAM's are designed with battery backup in mind. Data retention voltage and supply current are guaranteed over temperature. The following rules insure data retention: 1. During data retention chip select CS must be held high within VCC to VCC -0.2V. 2. Output Enable (OE) should be held high to keep the RAM outputs high impedance, minimizing power dissipation. 3. During power-up and power-down transitions CS and OE must be kept between VCC + 0.3V and 70% of VCC. 4. The RAM can begin operation > tR ns after VCC reaches the minimum operation voltages (3V). Figure 1. Data Retention Timing Data Retention Characteristics Parameter Description Min Typ TA = 25°C Max Unit VCCDR VCC for data retention 2.0 – – V tCDR Chip deselect to data retention time 0.0 – – ns tR Operation recovery time – – ns ICCDR (2) Data retention current 1. 2. tAVAV – (1) 0.700 1.5 (AT60142FT-15) 1.3 (AT60142FT-17) mA TAVAV = Read cycle time. CS = VCC, VIN = GND/VCC. 6 7726C–AERO–05/10 AC Characteristics Temperature Range:................................................ -55 +125°C Supply Voltage:........................................................ 3.3 +0.3V Input Pulse Levels: .................................................. GND to 3.0V Input Rise and Fall Times:....................................... 3ns (10 - 90%) Input and Output Timing Reference Levels: ............ 1.5V Output Loading IOL/IOH:............................................ See Figure 2 Figure 2. AC Test Loads Waveforms 7 AT60142FT 7726C–AERO–05/10 AT60142FT Write Cycle Symbol Parameter AT60142FT-17 AT60142FT-15 Unit Value TAVAW Write cycle time 17 15 ns min TAVWL Address set-up time 0 0 ns min TAVWH Address valid to end of write 8 8 ns min TDVWH Data set-up time 7 7 ns min TELWH CS low to write end 12 10 ns min TWLQZ Write low to high Z(1) 7 6 ns max TWLWH Write pulse width 8 8 ns min TWHAX Address hold from end of write 0 0 ns min TWHDX Data hold time 0 0 ns min TWHQX Write high to low Z(1) 3 3 ns min Notes: 1. Parameters guaranteed, not tested, with output loading 5 pF. (See “AC Test Loads Waveforms” on page 7.) Figure 3. Write Cycle 1. WE Controlled, OE High During Write E Figure 4. Write Cycle 2. WE Controlled, OE Low E 8 7726C–AERO–05/10 Figure 5. Write Cycle 3. CS Controlled E Note: 9 The internal write time of the memory is defined by the overlap of CS Low and W LOW. Both signals must be activated to initiate a write and either signal can terminate a write by going in active mode. The data input setup and hold timing should be referenced to the active edge of the signal that terminates the write. Data out is high impedance if OE= VIH. AT60142FT 7726C–AERO–05/10 AT60142FT Read Cycle Symbol Parameter AT60142FT-17 AT60142FT-15 Unit Value TAVAV Read cycle time 17 15 ns min TAVQV Address access time 17 15 ns max TAVQX Address valid to low Z 5 5 ns min TELQV Chip-select access time 17 15 ns max TELQX CS low to low Z(1) 5 5 ns min TEHQZ CS high to high Z(1) 7 6 ns max TGLQV Output Enable access time 8 6 ns max TGLQX OE low to low Z(1) 2 2 ns min TGHQZ OE high to high Z (1) 6 5 ns max Note: 1. Parameters guaranteed, not tested, with output loading 5 pF. (See “AC Test Loads Waveforms” on page 7.) Figure 6. Read Cycle nb 1: Address Controlled (CS = OE = VIL, WE = VIH) Figure 7. Read Cycle nb 2: Chip Select Controlled (WE = VIH) 10 7726C–AERO–05/10 Ordering Information Part Number Temperature Range Speed Package Flow 25°C 17 ns/5V tol. FP36.5 grounded lid Engineering Samples AT60142FT-DS17M-E 5962-0520801QYC -55° to +125°C 17 ns/5V tol. FP36.5 grounded lid QML Q 5962-0520801VYC -55° to +125°C 17 ns/5V tol. FP36.5 grounded lid QML V -55° to +125°C 17 ns/5V tol. FP36.5 grounded lid QML V RHA -55° to +125°C 17 ns/5V tol. FP36.5 grounded lid ESCC 5962R0520801VYC AT60142FT-DS17ESCC AT60142FT-DD17M-E (3) (1) AT60142FT-DD17MSV(1) (2) AT60142FT-DS15M-E 25°C 17 ns/5V tol. Die Engineering Samples -55° to +125°C 17 ns/5V tol. Die QML V 25°C 15 ns/5V tol. FP36.5 grounded lid Engineering Samples FP36.5 grounded lid QML Q (1) (1) (2) -55° to +125°C 15 ns/5V tol. (1) (2) -55° to +125°C 15 ns/5V tol. FP36.5 grounded lid QML V AT60142FT-DS15MSR(1) (2) -55° to +125°C 15 ns/5V tol. FP36.5 grounded lid QML V RHA AT60142FT-DS15ESCC(3) -55° to +125°C 15 ns/5V tol. FP36.5 grounded lid ESCC 25°C 15 ns/5V tol. Die Engineering Samples -55° to +125°C 15 ns/5V tol. Die QML V 5962-0520801QXC -55⋅ to +125⋅C 17 ns/5V tol. FP36.5 QML Q 5962-0520801VXC -55⋅ to +125⋅C 17 ns/5V tol. FP36.5 QML V 5962R0520801VXC -55⋅ to +125⋅C 17 ns/5V tol. FP36.5 QML V RHA 930105201 -55⋅ to +125⋅C 17 ns/5V tol. FP36.5 ESCC AT60142FT-DS15MMQ AT60142FT-DS15MSV AT60142FT-DD15M-E (1) AT60142FT-DS15MSV Not recommended for new designs Note: 1. Contact Atmel for availability. 2. Will be replaced by SMD part number when available. 3. Will be replaced by ESCC part number when available. 11 AT60142FT 7726C–AERO–05/10 AT60142FT Package Drawings 36-lead Flat Pack (500 Mils) Notes: 1. package DC : lid is NOT connected to GROUND 2. package DS : lid is connected to GROUND 12 7726C–AERO–05/10 Document Revision History Changes from Rev. A to Rev. B 1. Update of “Absolute Maximum Ratings” section Changes from Rev. B to Rev. C 1. In “Features” section page 1 : – “ MeV/mg/cm2” unit replaced by “MeV/mg/cm2@125°C” 2. In “Absolute Maximum Ratings” section page 4 : – 4.6V replaced by 7.0V on “Voltage range on any input” parameter 3. In “AC Characteristics” section page 7 : – “See figure 1” replaced by “See figure 2” 4. In “Ordering Information” section page 11 : – 13 All parts supplied in FP3.5 without grounded lid are not recommended for new designs AT60142FT 7726C–AERO–05/10 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel: (33) 2-40-18-18-18 Fax: (33) 2-40-18-19-60 ASIC/ASSP/Smart Cards 1150 East Cheyenne Mtn. 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