Atmel LED Drivers MSL2010 Single String Linear constant current LED Controller with Integrated DC/DC Boost Controller Features Integrated Boost Controller Drives external N-Ch MOSFETS Over-Temperature Fault Detection 8-bit DAC for peak current control PWM Input for Dimming Duty Cycle Linear current control for ripple-free LED current regulation 8-bit Efficiency Optimizer Minimizes Power Use ± 3% Current Accuracy I2C Serial Interface (use Optional) 32 Bytes Free RAM, 32 Bytes Free EEPROM 24-Pin QFN Package -40°C To +105°C Operating Temperature Range Typical Applications General and Architectural Lamps Down Lights and Recessed Lights PAR Lamps DC Input LED lamps 42072A–LED–05/2013 1. Introduction The MSL2010 LED string driver features a constant off-time Boost Controller and provides very accurate, no ripple, linear controlled string current. The Atmel patent-pending Efficiency Optimizer (EO) controls the switch-mode converter output, optimizing the output voltage to achieve maximum power efficiency. Both the switching and linear controllers drive external MOSFETs to provide flexibility over a wide range of power levels (LED currents and voltages) and extremely low LED ripple current. The MSL2010 operates from a 9.5V to 15V power supply. The Boost controller voltage regulation loop uses a constant off-time control algorithm to achieve stable control with good transient behavior. For flexibility of design, off-time is set with an external resistor. External loop compensation offers additional flexibility for the Boost Controller. An I2C interface provides access to the control registers, and to 32 bytes of RAM. Integrated non-volatile EEPROM memory, also accessed through the I2C serial interface, allows configuration at final test in the case that the factory default settings must be modified. The MSL2010 is available in the space-saving 24-pin 4x4mm QFN package and operates over the extended -40°C to 105°C operating range. 2. Ordering Information Note: 3. Ordering code Description Package(1) MSL2010 One String LED Driver with DC-DC Controller 4 x 4mm 24-pin QFN 1. Lead-Free, Halogen-Free, RoHS Compliant Package Application Circuit L Q1 CIN WHITE LEDS D COUT RTOP CC2 RCS RC RBOTTOM CC1 CS DRV EAO PWM + 1uF - RD D PWM EN PVIN AVIN 12V FBO FB Q1 G S MSL2010 LED DRIVER RS 46.4k 10uF REXT TOFF VCC VDD PGND AGND RTOFF SDA SCL 10uF CONFIGURATION INTERFACE (OPTIONAL) Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 2 4. Absolute Maximum Ratings Voltage with respect to AGND AVIN, PVIN, EN VCC, PWM, FLTB, SDA, SCL, TOFF, REXT, FBO VDD CS, S D G, DRV PGND, AGND -0.3V to +16.5V -0.3V to +5.5V -0.3V to +2.75V -0.3V to VDD+0.3V -0.3V to +22V -0.3V to VIN+0.3V -0.3V to +0.3V Current (into pin) AVIN, PVIN, DRV, G (average) 100mA PVIN (peak, 1% duty) 1A DRV, G (peak, 1% duty) ±1A PGND (peak, 1% duty) -1A AGND, PGND (average) -100mA All other pins ±10mA Continuous Power Dissipation at 70°C 24-Pin 4mm x 4mm VQFN (derate 21.8mW/°C above TA = +70°C) Ambient Operating Temperature Range 1200mW -40°C to +105°C Junction Temperature Storage Temperature Range +125°C -65°C to +125°C Lead Soldering Temperature, 10s +300°C Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 3 5. Electrical Characteristics AVIN = PVIN = 12V, -40°C ≤TA ≤ 105°C, Typical Operating Circuit, unless otherwise noted. Typical values at TA = +25°C. Table 5-1. DC electrical characteristics Parameter Conditions AVIN, PVIN Operating Supply Voltage AVIN Operating Supply Current LEDs on at PWM = 100%, serial interface idle AVIN Disable Supply Current VEN = 0, all digital inputs = 0 VCC Regulation Voltage IVCC = 10mApeak(1) VDD Regulation Voltage (1) IVDD = 10mApeak PWM, SCL, SDA Input High Voltage Min. Typ. Max. Unit 9.5 12 15 V 10 5 5.5 V 2.25 2.5 2.75 V V 0.3VVDD 2 0.5 EN Input Hysteresis 100 Sinking 6mA SCL, SDA, PWM, FLTB leakage current -5 S Current Sense Regulation Voltage MREF = 0x64 S Current Sense Regulation Voltage Accuracy Main string at 100% duty cycle, TA = 25C, MREF = 0x64 194 200 -3 S Current Sense Regulation Voltage Temperature Coefficient AVIN – 3.5 D Regulation Threshold EOCTRL = 0xE5 CS Current Sense Regulation Voltage CAREF = 0x64 0.9 1 EA Unity Gain Bandwidth EA Open Loop Gain V 5 A 206 mV +3 % ppm/ºC AVIN – 2.0 V 1.1 V 200 mV 7 MHz 100 dB 5.6 9 Ω VDRV = 0V, IDRV = -20mA 5.6 9 Ω 255 340 A 170 FBO LSB Current Temperature rising Thermal Shutdown Hysteresis 1. 0.3 VDRV = 12V, IDRV = 20mA FBO Full Scale Current Note: V mV -220 G Maximum Output Voltage V V EN Input Low Voltage Thermal Shutdown Temperature μA 0.7VVDD EN Input High Voltage DRV Impedance 5 4.5 PWM, SCL, SDA Input Low Voltage SDA, FLTB Output Low Voltage mA 1.0 A 133 °C 15 °C Additional decoupling may be required when pulling current from VCC and/or VDD in noisy environments Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 4 Table 5-2. AC electrical characteristics Parameter Conditions DRV tOFF timing RTOFF = 46.5k PWM Input Frequency (1) Min. Table 5-3. Unit s 60 10,000 Hz 1 100 % PWM Duty Cycle Resolution 1. Max. 0.5 PWM Duty Cycle Note: Typ. 0.4 % 2µs minimum on time, 0% duty cycle is supported. PWM between 0% and 1% not guaranteed I2C switching characteristics Parameter Symbol SCL Clock Frequency STOP to START Condition Bus Free Time Conditions Min. (1) 0.05 Typ. Max. Unit 1,000 kHz tBUF 0.5 µs Repeated START condition Hold Time tHD:STA 0.26 µs Repeated START condition Setup Time tSU:STA 0.26 µs STOP Condition Setup Time tSU:STOP 0.26 µs SDA Data Hold Time tHD:DAT 5 ns SDA Data Valid Acknowledge Time (2) 0.05 0.55 µs SDA Data Valid Time (3) 0.05 0.55 µs SDA Data Set-Up Time tSU:DAT 100 ns SCL Clock Low Period tLOW 0.5 µs SCL Clock High Period tHIGH 0.26 µs SDA, SCL Fall Time tF SDA, SCL Rise Time tR SDA, SCL Input Suppression Filter Period Bus Timeout Notes: 1. 2. 3. 4. 5. 6. tTIMEOUT (4) (5) , 120 ns 120 ns (6) 50 ns (1) 25 ms Minimum SCL clock frequency is limited by the bus timeout feature, which resets the serial bus interface when either SDA or SCL is held low for tTIMEOUT. SDA Data Valid Acknowledge Time is SCL LOW to SDA (out) LOW acknowledge time. SDA Data Valid Time is minimum SDA output data-valid time following SCL LOW transition. A master device must internally provide an SDA hold time of at least 300ns to ensure an SCL low state. The maximum SDA and SCL rise times is 300ns. The maximum SDA fall time is 250ns. This allows series protection resistors to be connected between SDA and SCL inputs and the SDA/SCL bus lines without exceeding the maximum allowable rise time. Includes input filters on SDA and SCL that suppress noise less than 50ns. Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 5 6. Typical Operating Characteristics Figure 6-1. Istr (String Current) rising. Figure 6-2. Istr (String Current) falling. Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 6 Figure 6-3. Start-up behavior, PWM = 10% duty cycle (Test conditions). Figure 6-4. Start-up behavior, PWM = 10% (Zoom) duty cycle (Test conditions). Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 7 Figure 6-5. Start-up behavior, PWM = 90% duty cycle (Test conditions). Figure 6-6. Start-up behavior,, PWM = 90%(zoom) duty cycle (Test conditions). Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 8 Figure 6-7. Operating current vs. input voltage 100 EN=1 Current (mA) 10 EN=0 1 0.1 0.01 0.001 9.0 10.0 11.0 12.0 13.0 14.0 15.0 16.0 17.0 Vin(V) Figure 6-8. VCC and VDD regulation 6 VCC (V) Voltage (V) 5 VDD (V) 4 3 2 1 0 0.0 10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 I out(mA) Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 9 Figure 6-9. Efficiency vs DAC value 100.00 % 90.00 % 80.00 % Efficiency 70.00 % 60.00 % 50.00 % 40.00 % 30.00 % 20.00 % 10.00 % 0.00 % 0 50 100 150 200 250 300 DAC Value Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 10 7. Block Diagram Figure 7-1. MSL2010 block diagram VCC VDD D VCC=5V AVIN EFFICIENCY OPTIMIZER REGULATORS VDD=2.5V VREF1 8-BIT CURRENT DAC FBO VDD VREF2 G DAC VREF4 MSL2010 CONTROL LOGIC EN S OSCILLATOR START CLOCK MUX PWM TOFF PVIN CURRENT GENERATOR S Q DRV R QB CS CURRENT GENERATOR EAO VREF3 COFF EA FB VREF5 1.2V REXT AGND PGND Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 11 8.2 AVIN D G Pinout MSL2010 VCC 8.1 AGND Pinout and Pin Description VDD 8. 24 23 22 21 20 19 17 NC PWM 3 MSL2010 16 PVIN SCL 4 (TOP VIEW) 15 DRV SDA 5 14 PGND FLTB 6 13 CS 7 8 9 10 11 12 FB 2 EAO EN TOFF S REXT 18 CGND 1 NC FBO Pin Descriptions Name Pin Description FBO 1 Feedback Output Feedback output from Efficiency Optimizer. Connect FBO to the LED power supply regulation feedback node to control VLED. When unused connect FBO to VCC. EN 2 Enable Input (Active High) Drive EN high to turn on the MSL2010, drive EN low to turn it off. For automatic start-up connect EN to AVIN. PWM 3 PWM Dimming Input Drive PWM with a pulse-width modulated signal to control LED brightness. See “PWM and LED Brightness” on page 17 for details. SCL 4 Serial Clock Input SCL is the I²C serial interface clock input. See “I²C Serial Interface” on page 21 details. SDA 5 Serial Data Input/Output SDA is the I²C serial interface data I/O. See “I²C Serial Interface” on page 21 details. FLTB 6 Fault Output Open Collector FLTB pulls low when an overtemperature is detected (die temperature147C). FLTB releases when the die temperature falls below 127C. NC 7, 17 No Internal Connection Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 12 Name Pin CGND 8 REXT 9 External Resistor Connect a 46.4k, 1% resistor from REXT to AGND. 10 Off-Time Set Input A resistor from TOFF to AGND controls the constant off time for the Boost converter, where RTOFF = tOFF (90.9 x 109), with tOFF in seconds and RTOFF in Ohms. For example, an off time of 4.4s TOFF Description Connect to Ground Connect CGND to AGND results in a resistor value of 402k (to the nearest 1% value). Error Amp Out EAO 11 FB 12 Feedback Input for Boost Regulator Connect FB to the middle node of the Boost regulator voltage setting resistor divider. Also, connect FBO to FB to allow the MSL2010 to optimize VLED. CS 13 Current Sense Input for the Boost Converter Connect CS to the external current sense resistor of the Boost regulator. The current sense threshold is 200mV. For more information see the section “Boost Reference Voltage register (CSREF, 0x21)” on page 20. PGND 14 PGND is the ground connection for the FET gate drivers. Connect PGND to AGDN close to the MSL2010. DRV 15 Gate Drive for Boost Regulator MOSFET Connect DRV to the gate of the Boost regulator power MOSFET. PVIN 16 Power Voltage Input PVIN powers DRV, the Boost regulator FET gate driver. Connect PVIN to a power supply of 10V to 15V. Bypass PVIN to PGND with a 1.0µF or greater capacitor. S 18 Source Sense Input for LED String Drive MOSFET Connect S to the source of the LED string drive external MOSFET, and to the current sense resistor for the LED string. The current sense threshold is 200mV. For more information see the section “LED String Reference Voltage register (SREF, 0x20)” on page 20. G 19 Gate Output for LED String MOSFET Connect G to the gate of the LED string drive external MOSFET. Minimum on-time is 2µs. D 20 Drain Output for LED String MOSFET Connect D to the drain of the LED string drive external MOSFET. AVIN 21 Analog Voltage Input (12V) AVIN is the power input to the MSL2010. Bypass AVIN to AGND with a 1.0µF or greater capacitor placed close to AVIN. VCC 22 AGND 23 VDD 24 2.5V Internal Voltage Connect 10uF bypass capacitor from VDD to AGND. EP EP Exposed Pad EP is the main thermal path for heat to escape the die. Connect EP to a large copper plane connected to PGND and AGND. Output of the switch-mode error amplifier. Connect the compensation network between EAO and FB. Power Ground 5V Internal Voltage Connect 10µF bypass capacitor from VCC to AGND. Analog Ground Connect AGND to system ground. Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 13 9. Typical Application Circuit MSL2010 Boost Switcher and Linear Driver, Driving 10 White LEDs. Figure 9-1. Typical application circuit 330μH FDD3860 1μF 10 WHITE LEDS LTST-C190EKT 270μF 47kΩ 220pF 0.05Ω 30kΩ 4.7kΩ 0.1μF CS DRV EAO FBO FB 100kΩ PWM D PWM IRFR110 EN PVIN AVIN + 12V - 1uF G S MSL2010 LED DRIVER 1Ω 46.4k 10uF REXT TOFF VCC VDD PGND AGND 24.9k SDA SCL 10uF CONFIGURATION INTERFACE (OPTIONAL) 10. Detailed Description The MSL2010 drives one LED string, and includes a Boost Regulator Controller to generate VLED, the string voltage, from a low voltage input. An Efficiency Optimizer (EO) algorithm regulates VLED to the minimum required to keep the LEDs in current regulation, minimizing power loss across the external string drive MOSFET. A PWM input accepts 1% to 100% duty cycle signal of 60Hz to 10kHz. The LED PWM output dimming duty cycle and frequency equal the PWM input duty cycle and frequency, with a 2µs minimum on time. LEDs are driven by a linear driver. 11. Fault Conditions Over Temperature Protection shuts down the device when the die temperature is above 133C. The device turns back on when the die temperature falls below 118C, as if EN is taken from low to high. 12. Applications Information 12.1 Turn-On Sequence When EN is taken high, the MSL2010 waits for 6ms, then optimizes VLED, the LED string voltage, which typically takes about 250ms, then begins to drive the LEDs based on the PWM input. Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 14 12.2 The Boost Regulator MSL2010 includes a Constant Off-Time DC/DC Boost Controller to generate VLED, the voltage for the LED string. The Boost components are shown in Figure 12-1 on page 15, and include a voltage setting resistor divider, a MOSFET, a Schottky diode, a resistor to set the Off-Time, an Inductor, a current sense resistor, a Drain resistor, a few capacitors and a compensation network. The following sections discuss selecting these components. Figure 12-1. Boost Regulator Components D L V LED TO LEDS + VIN CIN - Q1 COUT RTOP CC2 RCS RC R BOTTOM CC1 CS DRV EAO FBO FB TOFF RTOFF MSL2010 LED DRIVER 12.2.1 Setting the Boost Output Voltage, VLED A resistor divider sets the nominal Boost output voltage, VLED. Select the two feedback resistors by first determining the minimum output voltage using: VOUT ( MIN ) V fMIN N 0.2 V, where VfMIN is the minimum LED forward voltage at the expected LED current, N is the number of LEDs in the string, and 0.2V is the minimum overhead required for the current sense resistor and the FET. Then determine the maximum output voltage using: VOUT ( MAX ) V fMAX N 1.2 V, where VfMAX is the maximum LED forward voltage at the expected LED current, N is the number of LEDs in the string, and 1.2V is the maximum overhead required for the current sense resistor and the FET. Determine the value for the upper voltage setting resistor using: RTOP VOUT ( MAX ) VOUT ( MIN ) 340 10 6 , where 340A is the guaranteed maximum FBO current from the “Electrical Characteristics” on page 4. Determine the lower resistor using: RBOTTOM RTOP 2.5 VOUT ( MIN ) 2.5 , Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 15 where 2.5V is VFB, the feedback regulation voltage of the FB input. The Efficiency Optimizer (EO) output, FBO, connects to FB and pulls current from the node to force the converter’s output voltage up to the proper level to keep the LEDs in current regulation with the minimum power loss. 12.2.2 The Boost MOSFET and Schottky Diode Output DRV drives the gate of an external N-Channel MOSFET at up to VPVIN – 1.5V. Select a MOSFET with a maximum drain-source voltage of at least 1V above VOUT(MAX) (from above), a low gate charge and low RDS(ON). Use a Schottky diode with a maximum reverse voltage of at least VOUT(MAX). 12.2.3 The Off-Time Resistor, RTOFF The Boost driver uses a constant off-time algorithm. The MOSFET turns off when VCS = 0.2V (Figure 12-1 on page 15). Control off-time with external resistor RTOFF using: RTOFF t OFF 90.9 10 9 , where tOFF is in seconds. For example, an off-time of 4.4s results in a resistor value of 402k (to the nearest 1% value). 12.2.4 Setting the Inductor Current with RCS The Boost inductor peak current regulates by way of the voltage at CS, the Boost MOSFET source resistor connection. Connect the current sense resistor RCS from the MOSFET source to ground. The default feedback voltage for CS is 0.2V. Choose the current sense resistor using: RCS 0 .2 IL , where IL is the inductor peak current. For example, for 350mA IL, use RCS of 0.56 Ohms. The 0.2V in this equation is set in the Current Sense Reference Voltage (CSREF) register 0x21. The default value for CSREF is 0x64, which sets the feedback voltage to 0.2V. For information about CSREF see “Boost Reference Voltage register (CSREF, 0x21)” on page 20. 12.2.5 Sizing The Inductor, L Current increases through the inductor until the voltage at CS reaches 0.2V. The MOSFET then turns off for the off-time programmed by RTOFF (above). Estimate the inductor value using: L v(t ) H, di (t ) dt where v(t) = the acceptable ripple voltage of VLED, di(t) = acceptable peak to peak inductor ripple current, and dt = the offtime set by RTOFF. For example: With an inductor ripple voltage of 0.5% of VOUT(MAX) (from above), v(t) = 35.2 (0.005) = 176mV. With an average load current of 350mA and an inductor ripple current of 4%, di(t) = 0.35 0.04 = 0.014A. And, with a tOFF of 4.4µs, then: L 0.176 55 H . 0.014 6 4.4 10 Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 16 Assure that the inductor saturation current rating is greater than IL, the peak inductor current from the RCS equation above. 12.2.6 The Drain Resistor, RD The drain resistor, RD in Figure 12-1 on page 15, connects the MSL2010 to the Drain of the LED string external MOSFET. Use a 100k for RD. 12.2.7 The Input and Output Capacitors The input and output capacitors carry the high frequency current of the Boost regulator switching. The input capacitor prevents this high frequency current from travelling back to the input voltage source, reducing conducted and radiated noise. The output capacitor prevents high frequency current to the load, in this case the LEDs, and also prevents conducted and radiated noise. The output capacitors also have a large effect on the Boost regulator loop stability and transient response, and so are critical to optimal Boost regulator operation. Use capacitors that keep their rated values at their expected operating voltages. The “Typical Application Circuit” on page 14 shows recommended values for these capacitors. 12.2.8 The Compensation Network The compensation components, RC, CC1 and CC2 in Figure 12-1 on page 15, effectively dampen the oscillation-producing high frequency response of the Boost regulator error amplifier. The “Typical Application Circuit” on page 14 shows recommended values for these capacitors. 12.3 The LED string 12.3.1 Selecting the LED String MOSFET The LED string MOSFET sinks the LED current to ground through current sense resistor RS. Output G drives the gate of the MOSFET with at up to at least VAVIN – 1.5V. Select a FET with a maximum drain-source voltage of at least VOUT(MAX) (from above), and a low RDS(ON). 12.3.2 Setting LED String On-Current with RS The LED string on-current regulates by monitoring the voltage at S, the MOSFET source resistor connection. Connect the current sense resistor RS from the MOSFET source to ground. The default feedback voltage for S is 0.2V. Choose the string current sense resistor RS using: RS 0.2 I LED , where ILED is the LED string regulation current. The LED String Reference Voltage (SREF), register 0x20, sets the 0.2V feedback voltage, at 2mV per LSB. For more information about SREF see the “LED String Reference Voltage register (SREF, 0x20)” on page 20. 12.3.3 PWM and LED Brightness MSL2010 uses the input signal at PWM to directly control the duty cycle (brightness) and frequency of the LED string driver output G. The PWM input accepts a signal of 60Hz to 10kHz, 1% to 100% duty cycle; output G operates with a minimum on time of 2µs. Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 17 13. Control Registers Table 13-1. MSL2010 Register Map (Do not change unspecified registers or bits). Address and Register name Function Bit functions Default value D7 D6 D5 D4 D3 D2 D1 D0 Control and Monitor Registers 0x00 through 0x1F RAM 0xXX Free RAM 0x20 SREF LED String MOSFET Source Feedback Reference Voltage 0x64 SREF = 2mV per LSB 0x21 CSREF Boost Current Sense Reference Feedback Voltage 0x64 CSREF = 2mV per LSB 0x40 EOCTRL Efficiency Optimizer 0xE5 0x60 E2ADDR EEPROM Address 0x00 – 0x61 E2CTRL EEPROM Control 0x00 – Reserved[4:0] DThresh[3:0] EEPROM Address Pointer – – – – RWCTRL[2:0] Unused and Reserved Registers 13.1 EEPROM and Power-Up Defaults An on-chip EEPROM holds all the default register values (Table 13-1 on page 18). At power-up the data in the EEPROM automatically copy directly to control registers 0x00 thru 0x51, setting up the device for operation. Any changes made to registers 0x00 thru 0x51 after power-up are not reflected in the EEPROM and are lost when power is removed from the device, or when the enable input EN is forced low. If a different power-up condition is desired program the values into the EEPROM via the serial interface as explained in the next section, or contact the factory to inquire about ordering a customized power-up setting. 13.2 EEPROM Address and Control/Status Registers The EEPROM can be visualized as an image of the control registers from 0x00 thru 0x69. Change an EEPROM register value by writing the new value into the associated control register, and then instructing the device to program that value into the EEPROM. Two control registers facilitate this process, the EEPROM address register E2ADDR (0x60), and the EEPROM control register E2CTRL (0x61). Into E2ADDR write the location of the data that is to be programmed into the EEPROM, and write 0x03 to E2CTRL to command the device to program that data into the EEPROM. Programming the EEPROM takes a finite amount of time; after sending a command to E2CTRL wait 5ms, then end the write cycle by writing 0x00 to E2CTRL. Example: Change the string current feedback voltage MREF to 100mV. Commands: To register 0x20 (MREF) write 0x32 (the new value for MREF). To register 0x60 (E2ADDR) write 0x20 (the address of the MREF register). To register 0x61 (E2CTRL) write 0x03 (the command to copy the value to EEPROM). Wait 5ms. To register 0x61 (E2CTRL) write 0x00, to turn off EEPROM access. Result: The value 0x32, located in the MREF register, is programmed into the EEPROM and becomes the new powerup default value for MREF. Summary: 0x20 32 0x60 20 0x61 03 Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 18 Wait 5ms 0x61 00 E2CTRL provides additional functions beyond simply programming a register’s value into the EEPROM. Data may be transferred in either direction, from the registers to the EEPROM, or from the EEPROM to the registers. Register data may be transferred into or out of the EEPROM in groups of eight, a page at a time. The page address boundaries are predefined, and E2ADDR must be loaded with the address of the first byte of the page that is to be copied. Page addresses begin at 0x00 and increment by eight, with the second page beginning at 0x08, the third at 0x10, etc. To program a full page of data into the EEPROM, write the address of the page’s first byte to E2ADDR, and write 0x04 to E2CTRL. Wait 5ms, and then end the write cycle by writing 0x00 to E2CTRL. When finished accessing the EEPROM always write 0x00 to E2CTRL to block inadvertent EEPROM read/writes. Table 13-2 on page 19 details the functions available through E2CTRL. Table 13-2. EEPROM Address Register (E2ADDR, 0x60), defaults highlighted. Register data Register Address D7 E2ADDR 0x60 D6 D5 D4 - D3 D2 D1 D0 E2ADDR[6:0] DEFAULT 0 0 0 0 0 0 0 0 EEPROM Minimum Address 0x00 - 0 0 0 0 0 0 0 EEPROM Maximum Address 0x51 - 1 0 1 0 0 0 1 D2 D1 D0 Table 13-3. EEPROM Status Register (E2CTRL, 0x61), defaults highlighted. Register data Register Address D7 D6 D5 D4 D3 - - - - - DEFAULT 0 0 0 0 0 0 0 0 EEPROM Read / Write Disabled x x x x x 0 0 0 Read 1 Byte from EEPROM x x x x x 0 0 1 Read 8 Bytes from EEPROM x x x x x 0 1 0 Write 1 Byte to EEPROM x x x x x 0 1 1 Write 8 Bytes to EEPROM x x x x x 1 0 0 x x x x x 1 0 1 x x x x x 1 1 x E2CTRL 0x61 Unused RWCTRL[2:0] Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 19 14. Detailed Register Descriptions The MSL2010 registers are summarized in “Control Registers” on page 18. Detailed register information follows. 14.1 RAM (0x00 through 0x1F) 32 Bytes of RAM accessible through the I2C serial interface. Copy data from RAM into EEPROM (see “EEPROM and Power-Up Defaults” on page 18) to have the data automatically load into the RAM at power up, and when EN is taken high. Table 14-1. RAM (0x00 through 0x1F), defaults undetermined REGISTER DATA REGISTER NAME ADDRESS D7 D6 D5 D4 D3 D2 D1 D0 X X X X X X X X DEFAULTS 14.2 LED String Reference Voltage register (SREF, 0x20) Holds the DAC value that controls the reference voltage for the LED string MOSFET source feedback. The reference voltage equals decimal value of this register times 2mV. The default value for SREF is 0x64, which equates to VSREF = 200mV. Table 14-2. LED String Reference register (SREF, 0x20), defaults highlighted REGISTER DATA REGISTER NAME ADDRESS D7 D6 D5 0x20 SREF D4 D3 D2 D1 D0 SREF[7:0] DEFAULT: VSREF = 0x64 = 100 2mV = 200mV 0 1 1 0 0 1 0 0 VSREF = 0 2mV = 0V 0 0 0 0 0 0 0 0 VSREF = 255 2mV = 510mV 1 1 1 1 1 1 1 1 14.3 Boost Reference Voltage register (CSREF, 0x21) Holds the DAC value that controls the reference voltage for the Boost MOSFET source feedback. The reference voltage equals decimal value of this register times 2mV. The default value for CSREF is 0x64, which equates to VCSREF = 200mV. Table 14-3. Boost Reference Voltage register (CSREF, 0x21), defaults highlighted REGISTER DATA REGISTER NAME CSREF DEFAULT: VCSREF = 0x64 = 100 2mV = 200mV ADDRESS D7 D6 D5 0x21 D4 D3 D2 D1 D0 CSREF[7:0] 0 1 1 0 0 1 0 0 VCSREF = 0 2mV = 0mV 0 0 0 0 0 0 0 0 VCSREF = 255 2mV = 510mV 1 1 1 1 1 1 1 1 Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 20 14.4 Efficiency Optimizer Control Register (EOCTRL, 0x40) DThresh sets the voltage feedback threshold for D, The LED string MOSFET drain connection. D Threshold = (<DThresh> 150mV) + 250mV. This is how the device monitors VLED to control the magnitude of the EO current. The default value for DThresh is 1V. Table 14-4. Efficiency Optimizer Control Register (FBOCTRL, 0x40), default highlighted Register Address/ Default FBOCTRL 0x40 Defaults 0xE5 Register data D7 D6 D5 D4 D3 Reserved[4:0] D2 D1 D0 DThresh[3:0] 1 1 1 0 0 1 0 1 D Threshold = (0 150mV) + 250mV = 0.25V 1 1 1 0 0 0 0 0 D Threshold = (5 150mV) + 250mV = 1V 1 1 1 0 0 1 0 1 D Threshold = (15 150mV) + 250mV = 2.5V 1 1 1 0 1 1 1 1 These registers control access to the EEPROM. See “EEPROM and Power-Up Defaults” on page 18 and “EEPROM Address and Control/Status Registers” on page 18 for information. 15. I²C Serial Interface The MSL2010 operates as a slave that sends and receives data through an I²C/SMBus compatible 2-wire serial interface. The interface is not needed for operation, but is provided to allow control and monitoring of device functions. These functions include changing the string current reference feedback voltages, reading and adjusting the fault response behavior and status, and programming the EEPROM. The I²C/SMBus compatible interface is suitable for 100kHz, 400kHz and 1MHz communication. The interface uses data I/O SDA and clock input SCL to achieve bidirectional communication between master and slaves. The master, typically a microcontroller, initiates all data transfers, and generates the clock that synchronizes the transfers. SDA operates as both an input and an open-drain output. SCL operates only as an input, and does not perform clock-stretching. Pull-up resistors are required on SDA, and SCL. Figure 15-1. I2C Interface Connections VI2C 2 x 2.2k TYPICAL MASTER SDA SCL (μC) SDA SCL MSL2010 A transmission consists of a START condition sent by a master, a 7-bit slave address plus one R/W bit, an acknowledge bit, none or many data bytes each separated by an acknowledge bit, and a STOP condition (Figure 15-2, Figure 15-4 and Figure 15-5 on page 23). Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 21 Figure 15-2. I2C Serial Interface Timing Details SDA tBUF tSU:DAT tSU:STA tHD:STA tHD:DAT tSU:STO tLOW SCL tHIGH tHD:STA tR tF START CONDITION 15.1 REPEATED START CONDITION START STOP CONDITION CONDITION I2C Bus Timeout The bus timeout feature allows the MSL2010 to reset the serial bus interface if a communication ceases before a STOP condition is sent. If SCL or SDA is low for more than 25ms (typical), then the MSL2010 terminates the transaction, releases SDA and waits for another START condition. 15.2 I2C Bit Transfer One data bit is transferred during each clock pulse. SDA must remain stable while SCL is high. Figure 15-3. I2C Bit Transfer SDA SCL 15.3 SDA LEVEL STABLE SDA DATA VALID SDA ALLOWED TO CHANGE LEVEL I2C START and STOP Conditions Both SCL and SDA remain high when the interface is free. The master signals a transmission with a START condition (S) by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP condition (P) by transitioning SDA from low to high while SCL is high. The bus is then free. Figure 15-4. I2C START and STOP Conditions SDA S P START CONDITION STOP CONDITION SCL Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 22 15.4 I2C Acknowledge Bit The acknowledge bit is a clocked 9th bit which the recipient uses to handshake receipt of each byte of data. The master generates the 9th clock pulse, and the recipient holds SDA low during the high period of the clock pulse. When the master is transmitting to the MSL2010, the MSL2010 pulls SDA low because the MSL2010 is the recipient. When the MSL2010 is transmitting to the master, the master pulls SDA low because the master is the recipient. Figure 15-5. I2C Acknowledge SCL 1 2 8 9 1 SDA TRANSMITTER S A START CONDITION ACKNOWLEDGE BY RECEIVER SDA RECEIVER 15.5 I2C Slave Address The MSL2021 has a 7-bit long slave address, 0b0100000, followed by an eighth bit, the R/W bit. The R/W bit is low for a write to the MSL2010, high for a read from the MSL2010. All MSL2010 devices have the same slave address; when using multiple devices and communicating with them through their serial interfaces, make external provision to route the serial interface to the appropriate device. Note that development systems that use I2C often left-shift the address one position before they insert the R/W bit, and thus expect a base address setting of 0x20 instead of 0x40. Figure 15-6. I2C Slave Address SDA A7 = 0 A6 = 1 A5 = 0 A4 = 0 A3 =0 A2 = 0 A1 = 0 R/W A 2 3 4 5 6 7 8 9 MSB SCL 15.6 1 I2C Message Format for Writing to the MSL2010 A write to the MSL2010 contains the MSL2010’s slave address, the R/W bit cleared to 0, and at least 1 byte of information (Figure 15-7 on page 24). The first byte of information is the register address byte. The register address byte is stored as a register pointer, and determines which register the following byte is written into. If a STOP condition is detected after the register address byte is received, then the MSL2010 takes no further action beyond setting the register pointer. Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 23 Figure 15-7. I2C Writing a Register Pointer ACKNOWLEDGE FROM MSL2010 START SDA 0 1 0 0 0 0 0 0 A ACKNOWLEDGE STOP FROM MSL2010 . D7 . SLAVE ADDRESS, WRITE ACCESS . . . . D0 A SET REGISTER POINTER TO X THE REGISTER POINTER NOW POINTS TO X; A SUBSEQUENT READ ACCESS READS FROM REGISTER ADDRESS X When no STOP condition is detected, the byte transmitted after the register address byte is a data byte, and is placed into the register pointed to by the register address byte (Figure 15-8). To simplify writing to multiple consecutive registers, the register pointer auto-increments during each following acknowledge period. Further data bytes transmitted before a STOP condition fill subsequent registers. Figure 15-8. I2C Writing Two Data Bytes ACKNOWLEDGE FROM MSL2010 START SDA 0 1 0 0 0 0 0 0 A . D7 SLAVE ADDRESS, WRITE ACCESS ACKNOWLEDGE FROM MSL2010 . . . . . D0 A . D7 SET REGISTER POINTER TO X ACKNOWLEDGE FROM MSL2010 ACKNOWLEDGE FROM MSL2010 . . . . . D0 A . D7 DATA WRITES TO REGISTER X . . . . . D0 STOP A DATA WRITES TO REGISTER X + 1 THE REGISTER POINTER NOW POINTS TO X + 2; A SUBSEQUENT READ ACCESS BEGINS READING FROM REGISTER ADDRESS X + 2 15.7 I2C Message Format for Reading from the MSL2010 Read the MSL2010 registers using one of two techniques. The first technique begins the same way as a write, by setting the register address pointer as shown in Figure 15-7, including the STOP condition (note that even though the final objective is to read data, the R/W bit is first sent as a write because the address pointer byte is being written into the device). Follow the Figure 15-7 transaction by what shown in Figure 15-9, with a new START condition and the slave address, this time with the R/W bit set to 1 to indicate a read. Then, after the slave initiated acknowledge bit, clock out as many bytes as desired, separated by master initiated acknowledges. The pointer auto-increments during each master initiated acknowledge period. End the transmission with a not-acknowledge followed by a stop condition. Figure 15-9. I2C Reading Register Data with Preset Register Pointer ACKNOWLEDGE FROM MSL2010 START SDA 0 1 0 0 0 0 SLAVE ADDRESS, READ ACCESS 0 1 A D7 . ACKNOWLEDGE FROM MASTER . . . . . READ REGISTER ADDRESS X D0 A D7 NOT ACKNOWLEDGE STOP FROM MASTER . . . . . . D0 A READ REGISTER ADDRESS X + 1 THE REGISTER POINTER NOW POINTS TO X + 2; A SUBSEQUENT READ ACCESS READS FROM REGISTER ADDRESS X+ 2 The second read technique is illustrated in Figure 15-10. Write to the MSL2010 to set the register pointer, send a repeated START condition after the second acknowledge bit, then send the slave address again with the R/W bit set to 1 to indicate a read. Then clock out the data bytes separated by master initiated acknowledge bits. The register pointer auto-increments during each master initiated acknowledge period. End the transmission with a not-acknowledge Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 24 followed by a stop condition. This technique is recommended for buses with multiple masters, because the read sequence is performed in one uninterruptible transaction. Figure 15-10. I2C Reading Register Data Using a Repeated START ACKNOWLEDGE FROM MSL2010 START SDA 0 1 0 0 0 0 0 0 A D7 ACKNOWLEDGE FROM MSL2010 . . SLAVE ADDRESS WRITE ACCESS 15.8 . . . . REPEATED START D0 A 1 ACKNOWLEDGE FROM MSL2010 0 SET REGISTER POINTER 1 0 0 0 0 1 A NOT ACKNOWLEDGE STOP FROM MASTER . D7 SLAVE ADDRESS READ ACCESS . . . . . D0 A READ REGISTERS I2C Message Format for Broadcast Writing to Multiple devices With a broadcast write to MSL2010, a master broadcasts the same register data to all MSL2010s on the bus. First send the broadcast write slave address of 0x00, followed by the MSL2010 broadcast device ID of 0x42. These two bytes are followed by the register address in the MSL2010’s that the following data are to be written into, and finally the data byte(s) to be written into all devices. A broadcast write example is shown in Figure 15-11. Here, the same register address in every MSL2010 is written to with identical data. If further data bytes are transmitted before the STOP condition, they are stored in subsequent internal registers of each MSL2010. Figure 15-11. I2C Broadcast Writing a Data Byte ACKNOWLEDGE FROM MSL2010 START SDA 0 0 0 0 0 0 0 0 A BROADCAST WRITE SLAVE ADDRESS 0 1 ACKNOWLEDGE FROM MSL2010 0 0 0 0 1 0 A ACKNOWLEDGE FROM MSL2010 . D7 . . . . . D0 A D7 SETS ALL REGISTER POINTERS TO X MSL2010 BROADCAST ID . ACKNOWLEDGE FROM MSL2010 . . . . . D0 STOP A DATA WRITES TO ALL REGISTER Xs ALL REGISTER POINTERS NOW POINT TO X + 1; THE FIRST SUBSEQUENT READ ACCESS OF EACH MSL2010 READS FROM REGISTER ADDRESS X + 1 There is no broadcast read. However, a broadcast write may be used to set up the internal register pointers of all the MSL2010s in a system to speed up the subsequent individual reading of, for example, all the status registers. Figure 1512 illustrates a broadcast write that sets all the register pointers, and issues a STOP. Figure 15-12. I2C Broadcast Writing a Register Pointer ACKNOWLEDGE FROM MSL2010 START SDA 0 0 0 0 0 0 0 BROADCAST WRITE SLAVE ADDRESS 0 A 0 1 ACKNOWLEDGE FROM MSL2010 0 0 0 0 1 0 MSL2010 BROADCAST ID A D7 . ACKNOWLEDGE FROM MSL2010 . . . . . D0 STOP A SETS ALL REGISTER POINTERS TO X ALL REGISTER POINTERS NOW POINT TO X; THE FIRST SUBSEQUENT READ ACCESS OF EACH MSL2010 BEGINS READING FROM REGISTER ADDRESS X Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 25 d 0.1 C Packaging Information d 0.1 C (TOP VIEW) D 24 (SIDE VIEW) d 0.08 SEATING PLANE d 0.1 C 1 2 PIN 1 ID E A A1 (A3) D2 e/2 E2 COMMON DIMENSIONS (UNIT OF MEASURE=MM) e SYMBOL 24X L 24X b K 16. (BOTTOM VIEW) MIN NOM MAX A - 0.85 0.90 A1 0.00 - 0.05 0.203 REF A3 b 0.20 D D2 NOTES: 2. Dimension "b" applies to metalized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. If the terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area. E2 0.25 0.30 2 4.00 BSC 2.35 E 1. Refer to JEDEC Drawing MO-220 (SAW SINGULATION) NOTE 2.45 2.55 4.00 BSC 2.35 e 2.45 2.55 0.50 BSC L 0.35 0.40 0.45 K 0.20 - - 1/10/13 Package Drawing Contact: [email protected] TITLE 24M1, 24-lead, 4.0x4.0x0.9mm Body, 0.50mm Pitch, 2.45mm sq exposed pad, Very Thin Fine Pitch, Quad Flat No Lead Package (VQFN) GPC DRAWING NO. REV. ZUH 24M1 B No representation or warranties are made concerning third-party patents with regard to the use of Atmel® products. The mixing of red LEDs with phosphor-converted LEDs may be protected by certain third-party patents, such as U.S. Patent No. 7,213,940 and related patents of Cree, Inc. Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 26 17. Datasheet Revision History 17.1 42072A – 05/2013 1. Initial revision. Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 27 Table of Contents 1. Introduction 2 2. Ordering Information 2 3. Application Circuit 2 4. Absolute Maximum Ratings 3 5. Electrical Characteristics 4 6. Typical Operating Characteristics 6 7. Block Diagram 11 8. Pinout and Pin Description 12 8.1 8.2 Pinout MSL2010 12 Pin Descriptions 12 9. Typical Application Circuit 14 10. Detailed Description 14 11. Fault Conditions 14 12. Applications Information 14 12.1 12.2 12.3 Turn-On Sequence 14 The Boost Regulator 15 The LED string 17 13. Control Registers 18 13.1 13.2 EEPROM and Power-Up Defaults 18 EEPROM Address and Control/Status Registers 18 14. Detailed Register Descriptions 20 14.1 14.2 14.3 14.4 RAM (0x00 through 0x1F) 20 LED String Reference Voltage register (SREF, 0x20) 20 Boost Reference Voltage register (CSREF, 0x21) 20 Efficiency Optimizer Control Register (EOCTRL, 0x40) 21 15. I²C Serial Interface 21 15.1 15.2 15.3 15.4 15.5 15.6 15.7 15.8 I2C Bus Timeout 22 I2C Bit Transfer 22 I2C START and STOP Conditions 22 I2C Acknowledge Bit 23 I2C Slave Address 23 I2C Message Format for Writing to the MSL2010 23 I2C Message Format for Reading from the MSL2010 24 I2C Message Format for Broadcast Writing to Multiple devices 25 16. Packaging Information 26 17. Datasheet Revision History 27 17.1 42072A – 05/2013 27 Atmel MSL2010 [DATASHEET] 42072A–AVR–05/2013 i Atmel Corporation 1600 Technology Drive Atmel Asia Limited Unit 01-5 & 16, 19F Atmel Munich GmbH Business Campus Atmel Japan G.K. 16F Shin-Osaki Kangyo Bldg San Jose, CA 95110 BEA Tower, Millennium City 5 Parkring 4 1-6-4 Osaki, Shinagawa-ku USA 418 Kwun Tong Roa D-85748 Garching b. Munich Tokyo 141-0032 Tel: (+1) (408) 441-0311 Kwun Tong, Kowloon GERMANY JAPAN Fax: (+1) (408) 487-2600 HONG KONG Tel: (+49) 89-31970-0 Tel: (+81) (3) 6417-0300 www.atmel.com Tel: (+852) 2245-6100 Fax: (+49) 89-3194621 Fax: (+81) (3) 6417-0370 Fax: (+852) 2722-1369 © 2013 Atmel Corporation. All rights reserved. / Rev.: 42072A–LED–05/2013 Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities®, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. 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