AGILENT ADNS-3040

Agilent ADNS-3040
Ultra Low-Power Mouse Sensor
Data Sheet
Features
• Low power architecture
• Self-adjusting power-saving
modes for longest battery life
Description
The ADNS-3040 is an ultra
low-power optical navigation
sensor. It has a new, lowpower architecture and
automatic power management
modes, making it ideal for
battery-and power-sensitive
applications such as cordless
input devices.
The ADNS-3040 is capable of
high-speed motion detection –
up to 20 ips and 8G. In
addition, it has an on-chip
oscillator and LED driver to
minimize external components.
The ADNS-3040 along with the
ADNS-3120-001 lens, ADNS2220 clip and HLMP-ED80PS000 LED form a complete
and compact mouse tracking
system. There are no moving
parts, which means high
reliability and less maintenance
for the end user. In addition,
precision optical alignment is
not required, facilitating high
volume assembly.
The sensor is programmed via
registers through a four-wire
serial port. It is packaged in a
20-pin DIP.
Theory of Operation
The ADNS-3040 is based on
Optical Navigation Technology,
which measures changes in
position by optically acquiring
sequential surface images
(frames) and mathematically
determining the direction and
magnitude of movement.
The ADNS-3040 contains an
Image Acquisition System
(IAS), a Digital Signal
Processor (DSP), and a four
wire serial port.
The IAS acquires microscopic
surface images via the lens
and illumination system. These
images are processed by the
DSP to determine the direction
and distance of motion. The
DSP calculates the ∆x and ∆y
relative displacement values.
An external microcontroller
reads the ∆x and ∆y
information from the sensor
serial port. The
microcontroller then translates
the data into PS2, USB, or RF
signals before sending them to
the host PC or game console.
• High speed motion detection up to
20 ips and 8G
• SmartSpeed self-adjusting frame
rate for optimum performance
• Motion detect pin output
• Internal oscillator – no clock input
needed
• Selectable 400 and 800 cpi
resolution
• Wide operating voltage: 2.5V-3.6V
nominal
• Four wire serial port
• Minimal number of passive
components
Applications
• Optical Mice
• Optical trackballs
• Integrated input devices
• Battery-powered input devices
Pinout of ADNS-3040 Optical Mouse Sensor
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Name
NCS
MISO
SCLK
MOSI
MOTION
XY_LED
LED_GND
NC
AGND
SHTDWN
AVDD
GND
GND
AGND
VDD
GND
NC
NC
AGND
NC
TOP VIEW
Description
Chip select (active low input)
Serial data output (Master In/Slave Out)
Serial clock input
Serial data input (Master Out/Slave In)
Motion Detect (active low output)
LED control
Ground for LED current
No connection
Analog Ground
Shutdown (active high input)
Analog Supply Voltage
Ground
Ground
Analog Ground
Supply Voltage
Ground
No connection
No connection
Analog Ground
No connection
NCS
1
MISO
2
SCLK
3
MOSI
4
MOTION
5
XY_LED
6
LED GND
7
NC
8
AGND
9
SHTDWN
A3040
XYYWWZ
20
NC
19
AGND
18
NC
17
NC
16
GND
15
VDD
14
AGND
13
GND
12
GND
11
AVDD
10
PINOUT
Figure 1. Package outline drawing (top view)
Pin #1
A3040
XYYWWZ
12.85
0.506
(At Shoulder)
9.10
0.358
5.43
0.214
22.30
0.878
7.05
0.278
90˚ ± 3˚
Lead Pitch 2.00
0.079
Lead Offset 1.00
0.039
Lead Width
0.50
0.020
12.85 ± 0.65 (At Lead Tip)
0.506 ± 0.26
φ
6.025
0.2372
5.60
0.220
5.0
0.197
Protective
Kapton Tape
φ
4.55
0.179
Pin #1
φ 1.05
0.041
Figure 2. Package outline drawing
2
0.25
0.010
13.38
0.527
Notes:
1. Dimension in millimeters(inches).
2. Dimension tolerence of ± 0.1mm.
3. Coplanarity of leads: 0.01mm.
4. Lead pitch toleronce: ± 0.15mm.
5. Cummulative pitch tolerance: ±0.15mm.
6. Angular tolerance: ±3.0˚.
7. Maximum flash + 0.2mm
8. Chamfer (25˚ x 2) on the taper side of the lead.
9. * These dimension are for references only and
should not be used to mechanically reference the sensor.
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD
Overview of Optical Mouse Sensor Assembly
Agilent Technologies provides
an IGES file drawing
describing the base plate
molding features for lens and
PCB alignment.
illumination of the surface at
the optimum angle. Features
on the lens align it to the
sensor, base plate, and clip
with the LED.
The components interlock as
they are mounted onto defined
features on the base plate.
The ADNS-2220 clip holds the
LED in relation to the lens.
The LED must be inserted into
the clip and the LED’s leads
formed prior to loading on the
PCB. The clip interlocks the
sensor to the lens, and through
the lens to the alignment
features on the base plate.
The ADNS-3040 sensor is
designed for mounting on a
through-hole PCB, looking
down. There is an aperture
stop and features on the
package that align to the lens.
The ADNS-3120-001 lens
provides optics for the imaging
of the surface as well as
The HLMP-ED80-PS000 LED is
recommended for illumination.
43.13
1.698
42.53
1.674
39.06
1.538
29.50
1.161
1.50
0.059
1.00
0.039
2Xφ
28.13
1.107
3.55
0.140
1.22 3.22
0.048 0.127
12.60
0.496
11.38
0.448
13.88
0.546
0
1.28
0.050
5.06
0.199
0
Clear Zone
20X φ 0.80 Recommended
0.031
Dimensions in millimeters / inches
Figure 3. Recommended PCB mechanical cutouts and spacing
3
7.60
0.299
15.88
0.625
Lens
43.96
1.731
Base Plate
19.10
0.752
Gap between sensor
lead and lens gate
0.119
0.005
Top of PCB to top
of lens flange
3.75
0.148
3.00 Top of PCB to top
0.118
of Lens gate
Plastic Spring
Clip
15.90
0.626
Sensor
Surface
16.61
0.654
12.61
0.496
7.45
0.293
Bottom of sensor 1.98
to top of PCB 0.078
PCB
Base Plate
Alignment Post
Dimension in Millimeters / Inches
Figure 4. 2D Assembly drawing of ADNS-3040 (top and side view)
HLMP-ED80-PS000 (LED)
ADNS-2220 (Clip)
ADNS-3040 (Sensor)
Customer supplied PCB
ADNS-3120-001 (Lens)
Customer supplied base
plate with recommended
alignment features per
IGES drawing
Figure 5. Exploded view
4
PCB Assembly Considerations
shoulders do not normally
rest on the PCB surface.
The fixture should be
designed to expose the
sensor leads to solder while
shielding the optical
aperture from direct solder
contact.
1. Insert the sensor and all
other electrical components
into PCB.
2. Insert the LED into the
assembly clip and bend the
leads 90 degrees.
3. Insert the LED/clip
assembly into PCB.
5. Place the lens onto the base
plate.
4. Wave Solder the entire
assembly in a no-wash
solder process utilizing
solder fixture. The solder
fixture is needed to protect
the sensor during the solder
process. It also sets the
correct sensor-to-PCB
distance as the lead
6. Remove the protective
kapton tape from optical
aperture of the sensor. Care
must be taken to keep
contaminants from entering
the aperture. Recommend
not to place the PCB facing
up during the entire mouse
assembly process.
ADNS-3040
Power and control
AVDD
NCS
SCLK
GND
Image Array
AGND
DSP
SHTDWN
Oscillator
XY_LED
Serial Port and Registers
VDD
MOSI
MISO
MOTION
LED Drive
Figure 6. Block diagram of ADNS-3040 optical mouse sensor
Recommend to hold the PCB
first vertically for the
kapton removal process.
7. Insert PCB assembly over
the lens onto the base plate
aligning post to retain PCB
assembly. The sensor
aperture ring should selfalign to the lens.
8. The optical position
reference for the PCB is set
by the base plate and lens.
Note that the PCB motion
due to button presses must
be minimized to maintain
optical alignment.
9. Install mouse top case.
There MUST be a feature in
the top case to press down
onto the clip to ensure all
components are interlocked
to the correct vertical
height.
Design considerations for improved
ESD Performance
For improved electrostatic
discharge performance, typical
creepage and clearance
distance are shown in the
table below. Assumption: base
plate construction as per the
Agilent supplied IGES file and
ADNS-3120-001 lens.
Typical Distance
Millimeters
Creepage
16.0
Clearance
2.1
Clip
LED
Sensor
PCB
Lens / Light Pipe
Base Plate
Surface
Figure 7. Sectional view of PCB assembly highlighting optical mouse components
Note
that the lens material is polycarbonate and therefore, cyanoacrylate based adhesives or other adhesives that may damage the lens should NOT be used.
5
C15
47uF
L3
L2
R24
10
Q1
MMBT3906
100nF
C16
R18
27
R17
27
R22
10K
R19
Open
C13
47uF
C14
R23
10K
C13
47uF
R21
Open
C 11
47pF
100nF
RF_OFF
PTE3
1
VSS
PTA4
5 VDD
9 PTE4
8
15
100nF
C14
C12
47pF
R20
1K5
4
VREG
MC68HC908JB12
PTE1
RST
PTC0
IRQ
OSC2
OSC1
C19
10nF
Q2
MMBT3904
VDDA
7 RF_DATA
20
10
11
R27
1M
R25
X1
10M 12MHz
R26
1M
3
2
RF
Receiver
Circuitry
C19
47nF
VDDA
C18
30pF
C17
30pF
Notes The supply and ground paths should be laid out using a star topology.
Figure 8. Schematic Diagram for Interface between ADNS-3040 and microcontroller
VDD
D-
D+
GND
USB BUS
U4
RF
Transmitter
Circuitry
R1
0
4
5
VDDA
G2
G1
RF_DATA
RF_OFF
MVDD
R4
Open
VDD
Z1
Z2
1
3
2
R2
100K
RB
1
4
15
16
R3
100K
3
2
12
9
VSS
PTB2
PTA1
PTB0
PTB1
PTA3
PTA4
PTA5
MB
8
U2
100uF
C11
1
LB
Z-Wheel
2
3
2
3
2
3
BAT-1
BAT+1
PTA0
VDD
PTB5
PTA2
PTB6
PTB7
PTB4
PTB3
ID
Button
1
5
C7
10uF
10
13
7
6
11
14
3
2
1
R5
1M
100nF
C8
R6 R7
1M 1.1M
FB
GND
BATT
L1
22uH
MAX1722
U3
OUT
5
4
3
2
1
20
18
17
8
MVDD
NC
NC
NC
NC
SHTDWN
MOTION
MOSI
SCLK
MISO
NCS
XY_LED
AGND
AGDN
AGND
AVDD
GND
GND
GND
VDD
R12
10
R11
10
R10
10
R9
10
R8
10
LED_GND
100uF
U1
C10
100nF
4 C9
5
10
LX
ADNS-3040
6
MC68HC908QY4
7
6
D1
9 HLMP-ED80
14
19
11 C3
1uF
12
13
16
15 C1
1uF
LVDD
AVDD
VDD
MVDD
VDDA
C5
1uF
C4
10nF
C2
10nF
C6
10nF
LVDD
AVDD
VDD
• Passes IEC-1000-4-3
radiated susceptibility level
when assembled into a
mouse with shielded cable
and following Agilent
recommendations.
Regulatory Requirements
• Passes FCC B and
worldwide analogous
emission limits when
assembled into a mouse
with shielded cable and
following Agilent
recommendations.
• UL flammability level UL94
V-0.
• Passes EN61000-4-4/IEC8014 EFT tests when assembled
into a mouse with shielded
cable and following Agilent
recommendations.
• Provides sufficient ESD
creepage/clearance distance
to avoid discharge up to
15kV when assembled into a
mouse according to usage
instructions above.
Absolute Maximum Ratings
Parameter
Symbol
Minimum
Maximum
Units
Storage Temperature
TS
-40
85
°C
260
°C
3.7
V
2
kV
All pins, human body model MIL 883
Method 3015
VDD+0.5
V
All Pins
20
mA
All Pins
Lead Solder Temp
Supply Voltage
VDD
-0.5
ESD
Input Voltage
VIN
Latchup Current
IOUT
-0.5
Notes
For 10 seconds, 1.6mm below
seating plane.
Recommended Operating Conditions
Parameter
Symbol
Minimum Typical
Maximum Units
Operating Temperature
TA
0
40
°C
Power supply voltage - for
HLMP-ED80-PS000 LED *
VDD
2.6
3.6
Volts
Including noise.
Power supply rise time
VRT
0.001
100
ms
0 to 2.6V
Supply noise(Sinusoidal)
VNA
100
mV p-p
10kHz-50MHz
Serial Port Clock Frequency
fSCLK
1
MHz
Active drive, 50% duty cycle.
Distance from lens reference
plane to surface
Z
2.5
mm
Results in 0.2 mm DOF, See
drawing below
Speed
S
20
in/sec
Acceleration
A
8
G
Load Capacitance
COUT
100
pF
2.3
2.4
* Please note that for HSDL-4261 IR LED, the min power supply is 2.5V.
Sensor
Lens
2.40
0.094
Object Surface
Figure 9. Distance from lens reference plane to surface
7
Notes
MOTION, MISO
AC Electrical Specifications
Electrical Characteristics over recommended operating conditions. Typical values at 25 °C, VDD3=2.6V.
Maximum Units
Notes
tMOT-RST
23
ms
From SW_RESET register write to valid
motion, assuming motion is present
Shutdown
tSTDWN
50
ms
From STDWN pin active to low current
Wake from shutdown
tWAKEUP
s
From STDWN pin inactive to valid
motion. Notes: A RESET must be
asserted after a shutdown. Refer to
section "Notes on Shutdown and
Forced Rest", also note tMOT-RST
Forced Rest enable
tREST-EN
1
s
From RESTEN bits set to low current
Wake from Forced Rest
tREST-DIS
1
s
From RESTEN bits cleared to valid
motion
MISO rise time
tr-MISO
150
300
ns
CL = 100pF
MISO fall time
tf-MISO
150
300
ns
CL = 100pF
MISO delay after SCLK
tDLY-MISO
120
ns
From SCLK falling edge to MISO data
valid, no load conditions
MISO hold time
tHOLD-MISO
0.5
1/fSCLK
µs
Data held until next falling SCLK edge
MOSI hold time
tHOLD-MOSI
200
ns
Amount of time data is valid after SCLK
rising edge
MOSI setup time
tSETUP-MOSI
120
ns
From data valid to SCLK rising edge
SPI time between write
commands
tSWW
30
µs
From rising SCLK for last bit of the first
data byte, to rising SCLK for last bit of
the second data byte.
SPI time between write
and read commands
tSWR
20
µs
From rising SCLK for last bit of the first
data byte, to rising SCLK for last bit of
the second address byte.
SPI time between read
and subsequent
commands
tSRW
tSRR
500
ns
From rising SCLK for last bit of the first
data byte, to falling SCLK for the first
bit of the address byte of the next
command.
SPI read address-data
delay
tSRAD
4
µs
From rising SCLK for last bit of the
address byte, to falling SCLK for first bit
of data being read.
NCS inactive after
motion burst
tBEXIT
500
ns
Minimum NCS inactive time after
motion burst before next SPI usage
NCS to SCLK active
tNCS-SCLK
120
ns
From NCS falling edge to first SCLK
rising edge
SCLK to NCS inactive
(for read operation)
tSCLK-NCS
120
ns
From last SCLK rising edge to NCS
rising edge, for valid MISO data transfer
SCLK to NCS inactive
(for write operation)
tSCLK-NCS
20
us
From last SCLK rising edge to NCS
rising edge, for valid MOSI data transfer
NCS to MISO high-Z
tNCS-MISO
500
ns
From NCS rising edge to MISO high-Z
state
MOTION rise time
tr-MOTION
150
300
ns
CL = 100pF
MOTION fall time
tF-MOTION
150
300
ns
CL = 100pF
SHTDWN pulse width
tP-STDWN
Parameter
Symbol
Motion delay after reset
Transient Supply Current IDDT
8
Minimum Typical
1
1
s
45
mA
Max supply current during a VDD ramp
from 0 to 2.6V
DC Electrical Specifications
Electrical Characteristics over recommended operating conditions. Typical values at 25 °C, VDD=2.6 V.
Parameter
Symbol Minimum Typical
DC Supply Current in
various modes
IDD_RUN
IDD_REST1
IDD_REST2
IDD_REST3
2.9
0.5
0.1
0.03
Peak Supply Current
1
Maximum
Units
Notes
10
1.8
0.4
0.15
mA
Average current, including LED
current. No load on MISO,
MOTION.
40
mA
Peak current in 100kHz
bandwidth, including LED current.
12
µA
SCLK, MOSI and NCS must be
within 300mV of GND or VDD.
STDWN must be within 300mV of
VDD.
0.6
V
SCLK, MOSI, NCS, STDWN
V
SCLK, MOSI, NCS, STDWN
mV
SCLK, MOSI, NCS, STDWN
Shutdown Supply Current
IDDSTDWN
Input Low Voltage
VIL
Input High Voltage
VIH
Input hysteresis
VI_HYS
100
Input leakage current
Ileak
±1
±10
µA
Vin=VDD-0.6V, SCLK, MOSI, NCS,
STDWN
XY_LED Current
ILAS
13
25
mA
XY_LED pin voltage should be
greater than 0.15V and less than
1.4V. XY_LED current is pulsed,
so average value is much lower
Output Low Voltage
VOL
0.7
V
IOUT=1mA, MISO, MOTION
Output High Voltage
VOH
V
IOUT=-1mA, MISO, MOTION
Input Capacitance
Cin
pF
MOSI, NCS, SCLK, STDWN
9
VDD - 0.6
VDD-0.7
10
Typical Performance Characteristics
Mean Resolution vs Z
600
Black Formica
Resolution (Counts/inch)
500
White Melamine bookshelf
400
Manila
300
White paper
200
100
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.0
0.1
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
0
Distance from Lens Reference Plane to Surface, Z (mm)
Figure 10. Mean Resolution vs. Z (White Paper).
Typical Path Deviation
Largest Single Perpendicular Deviation From A Straight Line At 45 Degrees
Path Length = 4 inches; Speed = 6 ips ; Resolution = 400 cpi
60
Black Formica
Maximum distance
(mouse count)
50
White Melamine bookshelf
40
Manila
30
White paper
20
10
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
0
Distance From Lens Reference Plane To Navigation Surface (mm)
Figure 11. Average error vs. distance (mm)
Relative Responsivity for ADNS-3040
1.0
0.9
Relative Responsivity
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
400
500
600
700
Wavelength (nm)
Figure 12. Relative Responsivity
10
800
900
1000
Power management modes
The ADNS-3040 has three
power-saving modes. Each
mode has a different motion
detection period, affecting
response time to mouse
motion (Response Time). The
sensor automatically changes
to the appropriate mode,
depending on the time since
the last reported motion
(Downshift Time). The
parameters of each mode are
shown in the following table.
Motion Pin Timing
The motion pin is a levelsensitive output that signals
the micro-controller when
motion has occurred. The
motion pin is lowered
whenever the motion bit is set;
in other words, whenever there
is data in the Delta_X or
Delta_Y registers. Clearing the
motion bit (by reading Delta_Y
and Delta_X, or writing to the
Motion register) will put the
motion pin high.
LED Mode
For power savings, the LED
will not be continuously on.
ADNS-3040 will flash the LED
only when needed.
Mode
Response Time (nominal)
Downshift Time (nominal)
Rest 1
16.5 ms
237 ms
Rest 2
82 ms
8.4 s
Rest 3
410 ms
504 s
Synchronous Serial Port
Chip Select Operation
The synchronous serial port is
used to set and read
parameters in the ADNS-3040,
and to read out the motion
information.
The serial port is activated
after NCS goes low. If NCS is
raised during a transaction,
the entire transaction is
aborted and the serial port
will be reset. This is true for
all transactions. After a
transaction is aborted, the
normal address-to-data or
transaction-to-transaction
delay is still required before
beginning the next transaction.
To improve communication
reliability, all serial
transactions should be framed
by NCS. In other words, the
port should not remain
enabled during periods of nonuse because ESD and EFT/B
events could be interpreted as
serial communication and put
the chip into an unknown
state. In addition, NCS must
be raised after each burstmode transaction is complete
to terminate burst-mode. The
port is not available for
further use until burst-mode is
terminated.
The port is a four wire serial
port. The host microcontroller always initiates
communication; the ADNS3040 never initiates data
transfers. SCLK, MOSI, and
NCS may be driven directly by
a micro-controller. The port
pins may be shared with other
SPI slave devices. When the
NCS pin is high, the inputs are
ignored and the output is tristated.
The lines that comprise the
SPI port:
SCLK:
Clock input. It is always generated by
the master (the micro-controller).
MOSI:
Input data. (Master Out/Slave In)
MISO:
Output data. (Master In/Slave Out)
NCS:
Chip select input (active low). NCS
needs to be low to activate the serial
port; otherwise, MISO will be high Z,
and MOSI & SCLK will be ignored.
NCS can also be used to reset the
serial port in case of an error.
11
Write Operation
Read Operation
Write operation, defined as
data going from the microcontroller to the ADNS-3040,
is always initiated by the
micro-controller and consists
of two bytes. The first byte
contains the address (seven
bits) and has a “1” as its MSB
to indicate data direction. The
second byte contains the data.
The ADNS-3040 reads MOSI
on rising edges of SCLK.
A read operation, defined as
data going from the ADNS3040 to the micro-controller, is
always initiated by the microcontroller and consists of two
bytes. The first byte contains
the address, is sent by the
micro-controller over MOSI,
and has a “0” as its MSB to
indicate data direction. The
second byte contains the data
and is driven by the ADNS3040 over MISO. The sensor
outputs MISO bits on falling
edges of SCLK and samples
MOSI bits on every rising edge
of SCLK.
SCLK
tHOLD MISO
tDLY - MISO
MISO
D0
Figure 16. MISO Delay and Hold Time
NOTE:
The 0.5/fSCLK minimum high state of SCLK is
also the minimum MISO data hold time of the
ADNS-3040. Since the falling edge of SCLK is
actually the start of the next read or write
command, the ADNS-3040 will hold the state of
data on MISO until the falling edge of SCLK.
NCS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
2
1
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
1
A6
SCLK
MOSI
MISO
MOSI Driven by Micro Controller
Figure 13. Write Operation
SCLK
MOSI
tHold,MOSI
tsetup,MOSI
Figure 14. MOSI Setup and Hold Time
NCS
SCLK
Cycle #
1
2
3
4
5
6
7
A6
A5
A4
A3
A2
A1
8
9
10
D7
D6
11
12
13
14
D4
D3
D2
15
16
SCLK
MOSI
0
MISO
Figure 15. Read Operation
12
A0
tSRAD delay
D5
D1
D0
Required timing between Read and
Write Commands
There are minimum timing
requirements between read
and write commands on the
serial port.
If the rising edge of the SCLK
for the last data bit of the
second write command occurs
before the required delay
(tSWW), then the first write
command may not complete
correctly.
If the rising edge of SCLK for
the last address bit of the read
command occurs before the
required delay (tSWR), the
write command may not
complete correctly.
tSWW
SCLK
Address
Data
Address
Data
Write Operation
Write Operation
Figure 17. Timing between two write commands
tSWR
SCLK
Address
Data
Address
Write Operation
Next Read
Operation
Figure 18. Timing between write and read commands
tSRW & tSRR
tSRAD
SCLK
During a read operation SCLK
should be delayed at least
tSRAD after the last address
data bit to ensure that the
ADNS-3040 has time to
prepare the requested data.
The falling edge of SCLK for
the first address bit of either
the read or write command
must be at least tSRR or tSRW
after the last SCLK rising edge
of the last data bit of the
previous read operation.
Address
Data
Address
Read Operation
Next Read or
Write Operation
Figure 19. Timing between read and either write or subsequent read commands
tSRAD
SCLK
Motion_Burst Register Address
Read First Byte
First Read Operation
Read Second Byte
Read Third Byte
Figure 20. Motion Burst Timing
Burst Mode Operation
Burst mode is a special serial
port operation mode that may
be used to reduce the serial
transaction time for a motion
read. The speed improvement
is achieved by continuous data
clocking from multiple registers
without the need to specify the
register address, and by not
requiring the normal delay
period between data bytes.
Burst mode is activated by
reading the Motion_Burst
13
register. The ADNS-3040 will
respond with the contents of
the Motion, Delta_Y, Delta_X,
SQUAL, Shutter_Upper,
Shutter_Lower and
Maximum_Pixel registers in
that order. The burst
transaction can be terminated
after the first 3 bytes of the
sequence are read by bringing
the NCS pin high. After
sending the register address,
the micro-controller must wait
tSRAD and then begin reading
data. All data bits can be
read with no delay between
bytes by driving SCLK at the
normal rate. The data is
latched into the output buffer
after the last address bit is
received. After the burst
transmission is complete, the
micro-controller must raise the
NCS line for at least tBEXIT to
terminate burst mode. The
serial port is not available for
use until it is reset with NCS,
even for a second burst
transmission.
Notes on Power-up
The ADNS-3040 does not
perform an internal power up
self-reset; the
POWER_UP_RESET register
must be written every time
power is applied. The
appropriate sequence is as
follows:
State of Signal Pins After VDD is Valid
Pin
On Power-Up
NCS high
before reset
NCS Low
before reset
After Reset
NCS
functional
high
low
functional
MISO
undefined
undefined
functional
depends on
NCS
SCLK
ignored
ignored
functional
depends on
NCS
1. Apply power
MOSI
ignored
ignored
functional
2. Drive NCS high, then low to
reset the SPI port
depends on
NCS
XY_LED
undefined
undefined
undefined
functional
3. Write 0x5a to register 0x3a
MOTION
undefined
undefined
undefined
functional
4. Read from registers 0x02,
0x03 and 0x04 (or read
these same 3 bytes from
burst motion
register 0x42) one time
regardless the state of the
motion pin.
SHTDWN
must be low
must be low
must be low functional
During power-up there will be
a period of time after the
power supply is high but
before any clocks are available.
The table below shows the
state of the various pins
during power-up and reset.
Notes on Shutdown and Forced Rest
The ADNS-3040 can be set in
Rest mode through the
Configuration_Bits register
(0x11). This is to allow for
further power savings in
applications where the sensor
does not need to operate all
the time.
The ADNS-3040 can be set in
Shutdown mode by asserting
the SHTDWN pin. For proper
operation, SHTDWN pulse
width must be at least tSTDWN.
Shorter pulse widths may
cause the chip to enter an
undefined state. In addition,
14
the SPI port should not be
accessed when SHTDWN is
asserted. (Other ICs on the
same SPI bus can be accessed,
as long as the sensor’s NCS
pin is not asserted.) The table
below shows the state of
various pins during shutdown.
After deasserting SHTDWN, a
full reset must be initiated.
Wait tWAKEUP before accessing
the SPI port, then write 0x5A
to the POWER_UP_RESET
register. Any register settings
must then be reloaded.
Pin
SHTDWN active
NCS
Functional*
MISO
Undefined
SCLK
Undefined
MOSI
Undefined
XY_LED
Low current
MOTION
Undefined
* NCS pin must be held to 1 (high) if SPI bus is
shared with other devices. It can be in either
state if the sensor is the only device in addition
to the microcontroller.
Note:
There are long wakeup times from shutdown
and forced Rest. These features should not be
used for power management during normal
mouse motion.
Registers
The ADNS-3040 registers are accessible via the serial port. The registers are used to read motion
data and status as well as to set the device configuration.
Address
Register
Read/Write
Default Value
0x00
Product_ID
R
0x0D
0x01
Revision_ID
R
0x02
0x02
Motion
R/W
0x00
0x03
Delta_Y
R
Any
0x04
Delta_X
R
Any
0x05
SQUAL
R
Any
0x06
Shutter_Upper
R
Any
0x07
Shutter_Lower
R
Any
0x08
Maximum_Pixel
R
Any
0x09
Pixel_Sum
R
Any
0x0a
Minimum_Pixel
R
Any
0x0b
Pixel_Grab
R/W
Any
0x0c
CRC0
R
Any
0x0d
CRC1
R
Any
0x0e
CRC2
R
Any
0x0f
CRC3
R
Any
0x10
Self_Test
W
0x11
Configuration_Bits
R/W
0x03
0x12-0x2d
Reserved
0x2e
Observation
R/W
Any
0x2f-0x38
Reserved
0x3a
POWER_UP_RESET
0x3b-0x3d
Reserved
0x3e
Inverse_Revision_ID
R
0xFD
0x3f
Inverse_Product_ID
R
0xF2
0x42
Motion_Burst
R
Any
15
W
Product ID
Address: 0x00
Access: Read
Reset Value: 0x0D
Bit
7
6
5
4
3
2
1
0
Field
PID7
PID6
PID5
PID4
PID3
PID2
PID1
PID0
Data Type: 8-Bit unsigned integer
USAGE: This register contains a unique identification assigned to the ADNS-3040. The value in
this register does not change; it can be used to verify that the serial communications link is
functional.
Revision ID
Address: 0x01
Access: Read
Reset Value: 0x02
Bit
7
6
5
4
3
2
1
0
Field
RID7
RID6
RID5
RID4
RID3
RID2
RID1
RID0
Data Type: 8-Bit unsigned integer
USAGE: This register contains the IC revision. It is subject to change when new IC versions are
released.
16
Motion
Address: 0x02
Access: Read/Write
Reset Value: 0x00
Bit
7
6
5
4
3
2
1
0
Field
MOT
PIXRDY
PIXFIRST
OVF
Reserved
Reserved
Reserved
Reserved
Data Type: Bit field.
USAGE: Register 0x02 allows the user to determine if motion has occurred since the last
time it was read. If the MOT bit is set, then the user should read registers 0x03 and 0x04 to get
the accumulated motion. Read this register before reading the Delta_Y and Delta_X registers.
Writing anything to this register clears the MOT and OVF bits, Delta_Y and Delta_X registers. The
written data byte is not saved.
Internal buffers can accumulate more than eight bits of motion for X or Y. If either one of the
internal buffers overflows, then absolute path data is lost and the OVF bit is set. This bit is
cleared once some motion has been read from the Delta_X and Delta_Y registers, and if the
buffers are not at full scale. Since more data is present in the buffers, the cycle of reading the
Motion, Delta_X and Delta_Y registers should be repeated until the motion bit (MOT) is cleared.
Until MOT is cleared, either the Delta_X or Delta_Y registers will read either positive or negative
full scale. If the motion register has not been read for long time, at 400 cpi it may take up to 16
read cycles to clear the buffers, at 800 cpi, up to 32 cycles. To clear an overflow, write anything
to this register.
The PIXRDY bit will be set whenever a valid pixel data byte is available in the Pixel_Dump
register. Check that this bit is set before reading from Pixel_Dump. To ensure that the
Pixel_Grab pointer has been reset to pixel 0,0 on the initial write to Pixel_Grab, check to see if
PIXFIRST is set to high.
Field Name
Description
MOT
Motion since last report
0 = No motion
1 = Motion occurred, data ready for reading in Delta_X and Delta_Y registers
PIXRDY
Pixel Dump data byte is available in Pixel_Dump register
0 = data not available
1 = data available
PIXFIRST
This bit is set when the Pixel_Grab register is written to or when the complete pixel array has been
read, initiating an increment to pixel 0,0.
0 = Pixel_Grab data not from pixel 0,0
1 = Pixel_Grab data is from pixel 0,0
OVF
Motion overflow, ∆Y and/or ∆X buffer has overflowed since last report
0 = no overflow
1 = Overflow has occurred
17
Delta Y
Address: 0x03
access: Read
Reset Value: Undefined
Bit
7
6
5
4
3
2
1
0
Field
X7
X6
X5
X4
X3
X2
X1
X0
Data Type: Eight bit 2’s complement number.
USAGE: Y movement is counts since last report. Absolute value is determined by resolution.
Reading clears the register.
Motion
-128
-127
-2
-1
0
+1
+2
+126
+127
Delta_Y
80
81
FE
FF
00
01
02
7E
7F
NOTES: Agilent RECOMMENDS that registers 0x03 and 0x04 be read sequentially.
Delta X
Address: 0x04
Access: Read
Reset Values: Undefined
Bit
7
6
5
4
3
2
1
0
Field
Y7
Y6
Y5
Y4
Y3
Y2
Y1
Y0
Data Type: Eight bit 2’s complement number.
USAGE: X movement is counts since last report. Absolute value is determined by resolution.
Reading clears the register.
Motion
-128
-127
-2
-1
0
+1
+2
+126
+127
Delta_X
80
81
FE
FF
00
01
02
7E
7F
NOTES: Agilent RECOMMENDS that registers 0x03 and 0x04 be read sequentially.
18
SQUAL
Address: 0x05
Access: Read
Reset Value: Undefined
Bit
7
6
5
4
3
2
1
0
Field
SQ7
SQ6
SQ5
SQ4
SQ3
SQ2
SQ1
SQ0
Data Type: Upper 8 bits of a 9-bit unsigned integer.
USAGE: SQUAL (Surface Quality) is a measure of the number of valid features visible by the
sensor in the current frame.
The maximum SQUAL register value is TBD. Since small changes in the current frame can result
in changes in SQUAL, variations in SQUAL when looking at a surface are expected. The graph
below shows 500 sequentially acquired SQUAL values, while a sensor was moved slowly over
white paper. SQUAL is nearly equal to zero, if there is no surface below the sensor. SQUAL is
typically maximized when the navigation surface is at the optimum distance from the imaging lens
(the nominal Z-height).
SQUAL Value (white Paper)
100
90
Squal value
80
70
60
50
40
30
20
Count
Figure 21. SQUAL values (white paper)
Mean SQUAL vs Z (white paper)
60
Squal Value (count)
50
40
30
20
10
0
-0.8
-0.6
-0.4
-0.2
0
0.2
Delta from Nominal Focus (mm)
Figure 22. Mean SQUAL vs. Z (white paper)
19
0.4
0.6
0.8
481
457
433
409
385
361
337
313
289
265
241
217
193
169
145
97
73
49
25
1
0
121
10
Shutter_Upper
Address: 0x06
Access: Read
Reset Value: Undefined
Bit
7
6
5
4
3
2
1
0
Field
S 15
S 14
S 13
S 12
S 11
S 10
S9
S8
Shutter_Lower
Address: 0x07
Access: Read
Reset Value: Undefined
Bit
7
6
5
4
3
2
1
0
Field
S7
S6
S5
S4
S3
S2
S1
S0
Data Type: Sixteen bit unsigned integer.
USAGE: Units are clock cycles. Read Shutter_Upper first, then Shutter_Lower. They should be
read consecutively. The shutter is adjusted to keep the average and maximum pixel values
within normal operating ranges. The shutter value is automatically adjusted.
Shutter
120
110
Shutter value
100
90
80
70
60
50
40
Count
figure 23. Shutter values (white paper)
Mean Shutter vs Z (white Paper)
Shutter value (Count)
200
150
100
50
0
-0.8
-0.6
-0.4
-0.2
0
0.2
Delta from Nominal Focus (mm)
Figure 24. Mea n Shutter vs. Z (white paper)
20
0.4
0.6
0.8
481
457
433
409
385
361
337
313
289
265
241
217
193
169
145
97
73
49
25
1
20
121
30
Maximum Pixel
address: 0x08
Access: Read
Reset Value: Underfined
Bit
7
6
5
4
3
2
1
0
Field
MP7
MP6
MP5
MP4
MP3
MP2
MP1
MP0
Data Type: Eight-bit number.
USAGE: Maximum Pixel value in current frame. Minimum value = 0, maximum value = 254. The
maximum pixel value can vary with every frame.
Pixel_Sum
Address: 0x09
Access: Read
Reset Value: Undefined
Bit
7
6
5
4
3
2
1
0
Field
AP7
AP6
AP5
AP4
AP3
AP2
AP1
AP0
Data Type: High 8 bits of an unsigned 17-bit integer.
USAGE: This register is used to find the average pixel value. It reports the seven bits of a 16bit counter, which sums all pixels in the current frame. It may be described as the full sum
divided by 512. To find the average pixel value, use the following formula:
Average Pixel = Register Value * 128/121 = Register Value * 1.06
The maximum register value is 240. The minimum is 0. The pixel sum value can change on every
frame.
Minimum_Pixel
Address: 0x0a
Access: Read
Reset Value: Undefined
Bit
7
6
5
4
3
2
1
0
Field
MP7
MP6
MP5
MP4
MP3
MP2
MP1
MP0
Data Type: Eight-bit number.
USAGE: Minimum Pixel value in current frame. Minimum value = 0, maximum value = 254. The
minimum pixel value can vary with every frame.
21
Pixel_Grab
Address: 0x0b
Access: Read/Write
Reset Value: Undefined
Bit
7
6
5
4
3
2
1
0
Field
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
Data Type: Eight-bit word.
USAGE: For test purposes, the sensor will read out the contents of the pixel array, one pixel per
frame. To start a pixel grab, write anything to this register to reset the pointer to pixel 0,0.
Then read the PIXRDY bit in the Motion register. When the PIXRDY bit is set, there is valid data
in this register to read out. After the data in this register is read, the pointer will automatically
increment to the next pixel. Reading may continue indefinitely; once a complete frame’s worth of
pixels has been read, PIXFIRST will be set to high to indicate the start of the first pixel and the
address pointer will start at the beginning location again.
Pixel Address Map (Looking through the ADNS-3120-001 Lens)
First Pixel
0
22 44 66 88 110 132 154 176 198 220 242 264 286 308 330 352 374 396 418 440 462
1
23 45 67 89 111 133 155 177 199 221 243 265 287 309 331 353 375 397 419 441 463
2
24 46 68 90 112 134 156 178 200 222 244 266 288 310 332 354 376 398 420 442 464
3
25 47 69 91 113 135 157 179 201 223 245 267 289 311 333 355 377 399 421 443 465
4
26 48 70 92 114 136 158 180 202 224 246 268 290 312 334 356 378 400 422 444 466
5
27 49 71 93 115 137 159 181 203 225 247 269 291 313 335 357 379 401 423 445 467
6
28 50 72 94 116 138 160 182 204 226 248 270 292 314 336 358 380 402 424 446 468
7
29 51 73 95 117 139 161 183 205 227 249 271 293 315 337 359 381 403 425 447 469
8
30 52 74 96 118 140 162 184 206 228 250 272 294 316 338 360 382 404 426 448 470
9
31 53 75 97 119 141 163 185 207 229 251 273 295 317 339 361 383 405 427 449 471
Top Xray View of Mouse
LB
P
O
S
I
T
I
V
E
10 32 54 76 98 120 142 164 186 208 230 252 274 296 318 340 362 384 406 428 450 472
11 33 55 77 99 121 143 165 187 209 231 253 275 297 319 341 363 385 407 429 451 473
12 34 56 78 100 122 144 166 188 210 232 254 276 298 320 342 364 386 408 430 452 474
1
RB
20
A3040
YYWW
13 35 57 79 101 123 145 167 189 211 233 255 277 299 321 343 365 387 409 431 453 475
Y
14 36 58 80 102 124 146 168 190 212 234 256 278 300 322 344 366 388 410 432 454 476
15 37 59 81 103 125 147 169 191 213 235 257 279 301 323 345 367 389 411 433 455 477
16 38 60 82 104 126 148 170 192 214 236 258 280 302 324 346 368 390 412 434 456 478
11
10
17 39 61 83 105 127 149 171 193 215 237 259 281 303 325 347 369 391 413 435 457 479
18 40 62 84 106 128 150 172 194 216 238 260 282 304 326 348 370 392 414 436 458 480
19 41 63 85 107 129 151 173 195 217 239 261 283 305 327 349 371 393 415 437 459 481
20 42 64 86 108 130 152 174 196 218 240 262 284 306 328 350 372 394 416 438 460 482
21 43 65 87 109 131 153 175 197 219 241 263 285 307 329 351 373 395 417 439 461 483
Last Pixel
CRC0
Address: 0x0c
Access: Read
Reset Value: Undefined
POSITIVE X
Bit
7
6
5
4
3
2
1
0
Field
CRC07
CRC06
CRC05
CRC04
CRC03
CRC02
CRC01
CRC00
Data Type: Eight-bit number
USAGE: Register 0x0c reports the first byte of the system self test results. Value = 0xAF. See Self
Test register 0x10.
22
CRC1
Address: 0x0d
Access: Read
Reset Value: Undefined
Bit
7
6
5
4
3
2
1
0
Field
CRC17
CRC16
CRC15
CRC14
CRC13
CRC12
CRC11
CRC10
Data Type: Eight bit number
USAGE: Register 0x0c reports the second byte of the system self test results. Value = 0x4E. See
Self Test register 0x10.
CRC2
Address: 0x0e
Access: Read
Reset Value: Undefined
Bit
7
6
5
4
3
2
1
0
Field
CRC27
CRC26
CRC25
CRC24
CRC23
CRC22
CRC21
CRC20
Data Type: Eight-bit number
USAGE: Register 0x0e reports the third byte of the system self test results. Value = 0x31. See Self
Test register 0x10.
CRC3
Address: 0x0f
Access: Read
Reset Value: Undefined
Bit
7
6
5
4
3
2
1
0
Field
CRC37
CRC36
CRC35
CRC34
CRC33
CRC32
CRC31
CRC30
Data Type: Eight-bit number
USAGE: Register 0x0f reports the fourth byte of the system self test results. Value = 0x22. See
Self Test register 0x10.
23
Self_Test
Address: 0x10
Access: Write
Reset Value: NA
Bit
7
6
5
4
3
2
1
0
Field
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
TESTEN
Data Type: Bit field
USAGE: Set the TESTEN bit in register 0x10 to start the system self-test. The test takes 250ms.
During this time, do not write or read through the SPI port. Results are available in the CRC0-3
registers. After self-test, reset the chip to start normal operation.
Field Name
Description
TESTEN
Enable System Self Test
0 = Disable
1 = Enable
Configuration_bits
Address: 0x11
Access: Read/Write
Reset Value: 0x03
Bit
7
6
5
4
3
2
1
0
Field
RES
Reserved
RESTEN1
RESTEN0
Reserved
Reserved
Reserved
Reserved
Data Type: Bit field
USAGE: Register 0x11 allows the user to change the configuration of the sensor. Setting the
RESTEN bit forces the sensor into Rest mode, as described in the power modes section above.
The RES bit allows selection between 400 and 800 cpi resolution.
Note: Forced Rest has a long wakeup time and should not be used for power management during
normal mouse motion.
Field Name Description
RESTEN1-0 Puts chip into Rest mode
00 = normal operation
01 = force Rest1
10 = force Rest2
11 = force Rest3
RES
Reserved
24
Sets resolution
0 = 400
1 = 800
Address: 0x12-0x2d
Observation
Address: 0x2e
Access: Read/Write
Reset Value: Undefined
Bit
7
6
5
4
3
2
1
0
Field
MODE1
MODE0
Reserved
Reserved
OBS3
OBS2
OBS1
OBS0
Data Type: Bit field
USAGE: Register 0x2e provides bits that are set every frame. It can be used during EFTB testing
to check that the chip is running correctly. Writing anything to this register will clear the bits.
Field Name Description
MODE1-0
Mode Status: Reports which mode the sensor is in.
00 = Run
01 = Rest1
10 = Rest2
11 = Rest3
OBS3-0
Set every frame
Reserved
Address: 0x2f-0x39
POWER_UP_RESET
Address: 0x3a
Access: Write
Reset Value: Undefined
Bit
7
6
5
4
3
2
1
0
Field
RST7
RST6
RST5
RST4
RST3
RST2
RST1
RST0
Data Type: 8-bit integer
USAGE: Write 0x5A to this register to reset the chip. All settings will revert to default values.
Inverse_Revision_ID
Address: 0x3e
Access: Read
Reset Value: 0xFD
Bit
7
6
5
4
3
2
1
0
Field
NRID7
NRID6
NRID5
NRID4
NRID3
NRID2
NRID1
NRID0
Data Type: Inverse 8-Bit unsigned integer
USAGE: This value is the inverse of the Revision_ID. It can be used to test the SPI port.
25
Inverse_Product_ID
Address: 0x3f
Access: Read
Reset Value: 0xF2
Bit
7
6
5
4
3
2
1
0
Field
NPID7
NPID6
NPID5
NPID4
NPID3
NPID2
NPID1
NPID0
Data Type: Inverse 8-Bit unsigned integer
USAGE: This value is the inverse of the Product_ID. It can be used to test the SPI port.
Motion_Burst
Address: 0x42
Access: Read
Reset Value: Any
Bit
7
6
5
4
3
2
1
0
Field
MB7
MB6
MB5
MB4
MB3
MB2
MB1
MB0
Data Type: Various.
USAGE: Read from this register to activate burst mode. The sensor will return the data in the
Motion register, Delta_Y, Delta_X, Squal, Shutter_Upper, Shutter_Lower, and Maximum_Pixel. A
minimum of 3 bytes should be read during a burst read. Reading the first 3 bytes clears the
motion data.
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Hong Kong: (+65) 6756 2394
India, Australia, New Zealand: (+65) 6755 1939
Japan: (+81 3) 3335-8152(Domestic/International), or 0120-61-1280(Domestic Only)
Korea: (+65) 6755 1989
Singapore, Malaysia, Vietnam, Thailand,
Philippines, Indonesia: (+65) 6755 2044
Taiwan: (+65) 6755 1843
Data subject to change.
Copyright © 2005 Agilent Technologies, Inc.
August 23, 2005
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