S6J3110 Series, Factsheet

S6J3110 Series
32-bit Microcontroller Traveo Family
Fact Sheet
®
®
The Traveo™ family S6J3110, features 32-bit RISC microcontrollers with an ARM Cortex -R5 core and operate at 144MHz.4 MB of
Flash memory can correspond also to the software capacity which will increase in the future.First Body application MCU with CAN-FD
as a communication interface. CAN-FD is compatible with the conventional CAN and it can shorten the time of reprograming by
high-speed communication.Moreover,this miocrocontroller has SHE(Secure Hardware Extension) as security function. It will prevent the
extractraction and alteration of the data or keys. This microcontroller can control safely and quickly the circumference function of Body
in which an increase will be expected from now on.
Features
Product Lineup
 32bit ARM® Cortex®-R5 CPU Core
 Clock
Part number
S6J311ExxB S6J311DxxB S6J311CxxB S6J311BxxB
Parameter
Main Flash(Byte) 4096K+64K 3072K+64K 2048K+64K 1536K+64K
Work Flash(Byte)
112K
112K
112K
112K
RAM(Byte)
320K
256K
192K
128K
Backup
64K
64K
64K
64K
RAM(Byte)
Maximum clock frequency: 144MHz, 96MHz*
DMA controller: 16 channels
External interrupt: 16 channels
Base timer: 30 channels
32-bit free-run timer: 6 channels
32-bit input capture: 12 channels
32-bit output compare: 12 channels
12-bit A/D converter: 64, 56* channels (2 units total)
Real Time Clock
Multi-function serial interface: 22, 4* channels, Selectable
from UART/CSIO/LIN/I2C
 CAN-FD(192msb[reception]): 2, 1* channels
 Exclusion access memory
 Watchdog timer: 1 channel(SW)+1 channel(HW)
 CRC generation: 1 channel
 Secure Hardware Extension
 General Purpose I/O port: 150, 116*
 Built-in CR oscillator
 Debug interface
 JTAG Debug Port
 Partial-wakeup function
 Low Voltage Detector
 Clock Supervisor
 Power Supply: 1 power voltage(5V)
* Spec for S6J311AHxB, S6J3119HxB, S6J3118HxB










Package Example of Reference
Part number
S6J311AHxB S6J3119HxB S6J3118HxB
Parameter
Main Flash(Byte) 1024K+64K
768K+64K
512K+64K
Work Flash(Byte)
48K
48K
48K
RAM(Byte)
80K
64K
48K
Backup
8K
8K
8K
RAM(Byte)
Ordering Information
Part number
S6J311EJABSEx0000
S6J311DJABSEx0000
S6J311CJABSEx0000
S6J311BJABSEx0000
S6J311EHABSEx0000
S6J311DHABSEx0000
S6J311CHABSEx0000
S6J311BHABSEx0000
S6J311AHABSEx0000
S6J3119HABSEx0000
S6J3118HABSEx0000
S6J311EJBBSEx0000
S6J311DJBBSEx0000
S6J311CJBBSEx0000
S6J311BJBBSEx0000
S6J311EHBBSEx0000
S6J311DHBBSEx0000
S6J311CHBBSEx0000
S6J311BHBBSEx0000
S6J311AHBBSEx0000
S6J3119HBBSEx0000
S6J3118HBBSEx0000
Package
Plastic
TEQFP(0.5mm pitch),
176pin
Plastic
TEQFP(0.5mm pitch),
144pin
Plastic
TEQFP(0.5mm pitch),
144pin
Plastic
TEQFP(0.5mm pitch),
176pin
Plastic
TEQFP(0.5mm pitch),
144pin
Plastic
TEQFP(0.5mm pitch),
144pin
Plastic・TEQFP176,176pin
Cypress Semiconductor Corporation
Document Number: 002-08974 Rev. *A
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised April 19, 2016
S6J3120 Series
Block Diagram
Block Diagram of S6J311ExxB,S6J311DxxB,S6J311CxxB,S6J311BxxB
Trace I/F(8Pin)
Debug I/F (JTAG/SWD)
Power Domain 2
JTAG_SWCLKTCK
JTAG Wakeup
Debug Group
(CoreSightTM)
Bus Config Group
From/To PPU-SLAVEs
- Bus Performance Counters
- Misc Register Module
DAP
Security
CLK_DBG
CLK_LLPBM2
APB-M
APB-S
AHB-M
PPU Master
CLK_HPM
Debug APB
AHB2APB
(Priviledge
Protection)
APB-32
CLK_HPM
CLK_LLPBM2
Trace Group
ETB (Trace Buffer)
16KB
CLK_TRC
From/To
CommonPERI#2
From/To
CommonPERI#2
Security
Checker
CLK_ATB
CLK_DBG
ATB
Core Group (1-Core)
Power Domain 3
Debug APB
CLK_CPU
Flash Group
SHE Group
CLK_FCLK
CLK_SHE
WorkFlash
TCF
AHB-64
AHB-64
(Reg & Data) (Reg)
CLK_CPU
TCFLASH #0
1MB + 64KB
+
EEFlash #0
48KB
CLK_MEMC
From/To
Memory Config Grp.
ETMTM
#0
TCF
AXI-64
(data)
Procceser
TCRAM #0
(2bank)
64KB
(32KB×2)
CPU #0
B0TCM
DMAC Complex #0
- DMAC 16.ch
- ReloadTimer 4ch
CortexTM -R5F
B1TCM
#0
CLK_DMA
MPU
#0
ATCM
#0
TCF
ATCM #0
I$
#0
D$
#0
16KB
16KB
CLK_HPM
AHB-64
CLK_MEMC
AXI-64
AHB-32
CLK_SHE
CLK_SHE
AHB-64
CLK_MEMC
From/To
Memory Config Grp.
AXI-64
LLPP
AXI32-M AHB32
AXI-M AXI-S
CLK_CPU
AXI-64
CLK_CPU
AXI-64
CLK_CPU
AXI-32
CLK_CPU
From/To CommonPERI#2
DMAC Config
AHB-32
CLK_CPU
AHB-32
CLK_HPM2
AHB-64
CLK_HPM
AHB-32
CLK_HPM2
High Performance Matrix (HPM)
AXI-64
CLK_HPM
System SRAM
16KB
AHB-32
AHB-32
CLK_CPU
AXI-64
AHB-32
CLK_HPM
CLK_SYSC1
EAM
AHB-64
CLK_HPM
From/To
Flash Group
CLK_MEMC
CLK_HPM
AHB-32
BBU
BBU
AHB-32
CLK_LLPBM
Low Latency Peripheral Bus Matrix (LLPBM)
CLK_LLPBM
AHB-32
BBU
State manage (2)
BBU
Power Domain 6_0
Flash Group I/F
CLK_SYSC0H
Clock divide
and distribution
CLK_COMH
System
Controller(SYSC)
(CLK_CAN)
Reset manage
Timing
Protection
SYSC1
CLK_HPM
CLK_LCP0A
CRC
4ch
Base Timer
30ch
IRC #0
512 Vectors
CLK_MEMC
State manage
Peripheral
Bus Bridge
CLK_LLPBM2
P
Bus Config
Group
(Config)
GPIO
RAM
PONR
LVD
CLK_CAN
Peripheral
Bus Bridge
C
Peripheral
Bus Bridge
(TPU) #0
CLK_SYSC1
Power manage
Source Clock
Timer
CLK_LCP0A
CAN-FD
1ch
RAM
Clock manage
EICU 16ch
CAN prescaler
Backup RAM 4KB
(8+5 bit width RAM x 4)
Power
Domain 4_1
CLK_RAM1H
Power CLK_RAM0H
Domain 4_0
Backup RAM 4KB
(8+5 bit width RAM x 4)
ECC-ed RAM I/F
CLK_LCP
BootROM
16KB
SW-Watchdog
CSV(for PLL)
From/To
Core-Group
AHB-32
CLK_LLPBM
BBU
CLK_LLPBM
CLK_LLPBM
P
M.F.S
4ch
Wakeup
Request #0
#0 TCRAM
(Config)
32Bit FRT
6ch
DMAC
Complex #0
(Config)
32Bit ICU
12ch
PPU Master
(Cnofig)
CSV
32Bit OCU
12ch
Memory & Config Group
Fast-CR
Slow-CR
PLL0
SSCG PLL0
CLK_MEMC
Power Domain 3
Common PERI #0
Group
12Bit A/DC
Unit0×25ch
Common PERI #1
Group
Common PERI #2
Group
Wakeup-detect
RTC
12Bit A/DC
Unit1×31ch
Clock Calibration
H/W Watchdog
EXT-IRQ
16ch
Common PERI #0
Group
Power Domain 1 (Always on)
NMI
MCU Config Group
Power Domain 1
(Always on)
Document Number: 002-08974 Rev. *A
Page 2 of 4
S6J3110Series
Document History
Document Title: S6J3110 Series, 32-bit Microcontroller Traveo Family Fact Sheet
Document Number: 002-08974
Revision
ECN
Orig. of
Change
Submission
Date
**
−
NNAK
11/14//2014
*A
5159031
HIOT
03/04/2016
Document Number: 002-08974 Rev. *A
Description of Change
Migrated to Cypress and assigned document number 002-08974.
No change to document contents or format.
Updated to Cypress template
Added SHE-OFF option and updated revision
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S6J3110Series
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Document Number: 002-08974 Rev. *A
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