5 4 3 2 1 AP7000_1 U1A D VCC_3V3 B R4 220R 2 2 D1 R3 220R 11-21 URC/TR8 1 11-21 URC/TR8 1 2 R8 220R VCC_3V3 D3 D2 11-21 URC/TR8 1 VCC_3V3 A SYSTEM B VCC_3V3 R100 100k R101 J15 2 CD075014 1X2 SPI_0_MISO SPI_0_MOSI SPI_0_SCK SPI_0_CS0 PA04 PA05 TWI_SDA TWI_SCL PA08 PA09 MCI_CLK MCI_CMD MCI_D0 MCI_D1 MCI_D2 MCI_D3 8 USART_1_RXD 8 USART_1_TXD C 1 5,10 5,10 5,10 5,10 10 10 10 10 10 10 7 7 7 7 7 7 1k 10 10 10 10 10 10 10 10 10 10 10 10 SPI_0_NPCS3 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 10,11 10,11 10,11 10,11 10,11 10,11 10,11 10,11 10,11 10,11 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 9 9 PB00 PB01 PB02 PB03/EVTO PB04 PB05 PB06 PB07 PB08 PB09 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28/EXTINT3 PB29 11 EVTI_N K4 K2 K3 K6 K7 K1 A10 C10 L4 L1 M4 M2 M5 M3 M1 N4 N2 N3 N1 P2 P1 P3 R1 R3 T3 P8 R8 K9 L9 M9 N9 R9 PA00 [SPI0 - MISO / SSC1 - RX_FRAME_SYNC] PA01 [SPI0 - MOSI / SSC1 - TX_FRAME_SYNC] PA02 [SPI0 - SCK / SSC1 - TX_CLOCK] PA03 [SPI0 - NPCS0 / SSC1 - RX_CLOCK] PA04 [SPI0 - NPCS1 / SSC1 - TX_DATA] PA05 [SPI0 - NPCS2 / SSC1 - RX_DATA] PA06 [TWI - SDA / USART0 - RTS] PA07 [TWI - SCL / USART0 - CTS] PA08 [PSIF - CLOCK0 / USART0 - RXD] PA09 [PSIF - DATA0 / USART0 - TXD] PA10 [MMCI - CLK / USART0 - CLK] PA11 [MMCI - CMD0 / TIMER0 - CLK0] PA12 [MMCI - DATA0 / TIMER0 - A0] PA13 [MMCI - DATA1 / TIMER0 - A1] PA14 [MMCI - DATA2 / TIMER0 - A2] PA15 [MMCI - DATA3 / TIMER0 - B0] PA16 [USART1 - CLK / TIMER0 - B1] PA17 [USART1 - RXD / TIMER0 - B2] PA18 [USART1 - TXD / TIMER0 - CLK2] PA19 [USART1 - RTS / TIMER0 - CLK1] PA20 [USART1 - CTS / SPI0 - NPCS3] PA21 [SSC0 - RX_FRAME_SYNC / PWM - PWM2] PA22 [SSC0 - RX_CLOCK / PWM - PWM3] PA23 [SSC0 - TX_CLOCK / TIMER1 - A0] PA24 [SSC0 - TX_FRAME_SYNC / TIMER1 - A1] PA25 [SSC0 - TX_DATA / TIMER1 - B0] PA26 [SSC0 - RX_DATA / TIMER1 - B1] PA27 [SPI1 - NPCS3 / TIMER1 - CLK0] PA28 [PWM - PWM0 / TIMER1 - A2] PA29 [PWM - PWM1 / TIMER1 - B2] PA30 [SM - GCLK0 / TIMER1 - CLK1] PA31 [SM - GCLK1 / TIMER1 - CLK2] E12 E14 E16 D13 D15 D14 D16 C15 C16 C14 B14 A14 C13 A13 B13 D12 A12 C12 B12 E11 D11 A11 C11 B11 L6 L2 T9 J9 M10 R13 P13 PB00 [ISI - DATA0 / SPI1 - MISO / AUX1 - MSEO0] PB01 [ISI - DATA1 / SPI1 - MOSI / AUX1 - MSEO1] PB02 [ISI - DATA2 / SPI1 - NPCS0 / AUX1 - MCKO] PB03 [ISI - DATA3 / SPI1 - NPCS1 / AUX1 - EVTO] PB04 [ISI - DATA4 / SPI1 - NPCS2 / AUX1 - MDO0] PB05 [ISI - DATA5 / SPI1 - SCK / AUX1 - MDO1] PB06 [ISI - DATA6 / MMCI - CMD1 / AUX1 - MDO2] PB07 [ISI - DATA7 / MMCI - DATA4 / AUX1 - MDO3] PB08 [ISI - HSYNC / MMCI - DATA5 / AUX1 - MDO4] PB09 [ISI - VSYNC / MMCI - DATA6 / AUX1 - MDO5] PB10 [ISI - PCLK / MMCI - DATA7] PB11 [PSIF - CLOCK1 / ISI - DATA8] PB12 [PSIF - DATA1 / ISI - DATA9] PB13 [SSC2 - TX_DATA / ISI - DATA10] PB14 [SSC2 - RX_DATA / ISI - DATA11] PB15 [SSC2 - TX_CLOCK / USART3 - CTS] PB16 [SSC2 - TX_FRAME_SYNC / USART3 - RTS] PB17 [SSC2 - RX_FRAME_SYNC / USART3 - TXD] PB18 [SSC2 - RX_CLOCK / USART3 - RXD] PB19 [SM - GCLK2 / USART3 - CLK] PB20 [DAC - DATA1 / AUDIOC - SDO] PB21 [DAC - DATA0 / AUDIOC - SYNC] PB22 [DAC - DATAN1 / AUDIOC - SCLK] PB23 [DAC - DATAN0 / AUDIOC - SDI] PB24 [- / DMAC - DMARQ0 / NMI - NMI_N] PB25 [- / DMAC - DMARQ1 / IRQ - EXTINT0] PB26 [- / USART2 - RXD / IRQ - EXTINT1] PB27 [- / USART2 - TXD / IRQ - EXTINT2] PB28 [- / USART2 - CLK / AUX2 - EVTO / IRQ - EXTINT3] PB29 [SM - GCLK3 / USART2 - CTS] PB30 [SM - GCLK4 / USART2 - RTS] J8 EVTI PC00 [MACB0-COL / - / AUX2 - MSEO0] PC01 [MACB0 - CRS / - / AUX2 - MSEO1] PC02 [MACB0 - TX_ER / - / AUX2 - MCKO] PC03 [MACB0 - TXD0 / -] PC04 [MACB0 - TXD1 / -] PC05 [MACB0 - TXD2 / DMAC - DMARQ2 / AUX2 - MDO0] PC06 [MACB0 - TXD3 / DMAC - DMARQ3 / AUX2 - MDO1] PC07 [MACB0 - TX_EN / -] PC08 [MACB0 - TX_CLK / -] PC09 [MACB0 - RXD0 / -] PC10 [MACB0 - RXD1 / -] PC11 [MACB0 - RXD2 / - / AUX2 - MDO2] PC12 [MACB0 - RXD3 / - / AUX2 - MDO3 PC13 [MACB0 - RX_ER / -] PC14 [MACB0 - RX_CLK / - / AUX2 - MDO4] PC15 [MACB0 - RX_DV / -] PC16 [MACB0 - MDC / -] PC17 [MACB0 - MDIO / -] PC18 [MACB0 - SPEED / - / AUX2 - MDO5] PC19 [LCDC - CC / MACB1 - COL] PC20 [LCDC - HSYNC / -] PC21 [LCDC - PCLK / -] PC22 [LCDC - VSYNC / -] PC23 [LCDC - DVAL / MACB1 - CRS] PC24 [LCDC - MODE / MACB1 - RX_CLK] PC25 [LCDC - PWR / -] PC26 [LCDC - DATA0 / MACB1 - TX_ER] PC27 [LCDC - DATA1 / MACB1 - TXD2] PC28 [LCDC - DATA2 / MACB1 - TXD3] PC29 [LCDC - DATA3 / MACB1 - RXD2] PC30 [LCDC - DATA4 / MACB1 - RXD3] PC31 [LCDC - DATA5 / -] PD00 [LCDC - DATA6 / -] PD01 [LCDC - DATA7 / -] PD02 [LCDC - DATA8 / MACB1 - MDIO] PD03 [LCDC - DATA9 / MACB1 - MDC] PD04 [LCDC - DATA10 / MACB1 - RX_DV] PD05 [LCDC - DATA11 / MACB1 - RX_ER] PD06 [LCDC - DATA12 / MACB1 - RXD1] PD07 [LCDC - DATA13 / -] PD08 [LCDC - DATA14 / -] PD09 [LCDC - DATA15 / -] PD10 [LCDC - DATA16 / MACB1 - RXD0] PD11 [LCDC - DATA17 / MACB1 - TX_EN] PD12 [LCDC - DATA18 / MACB1 - TX_CLK] PD13 [LCDC - DATA19 / MACB1 - TXD0] PD14 [LCDC - DATA20 / MACB1 - TXD1] PD15 [LCDC - DATA21 / MACB1 - SPEED] PD16 [LCDC - DATA22 / -] PD17 [LCDC - DATA23 / -] PE00 [EBI - DATA16 / LCDC - CC] PE01 [EBI - DATA17 / LCDC - DVAL] PE02 [EBI - DATA18 / LCDC - MODE] PE03 [EBI - DATA19 / LCDC - DATA0] PE04 [EBI - DATA20 / LCDC - DATA1] PE05 [EBI - DATA21 / LCDC - DATA2] PE06 [EBI - DATA22 / LCDC - DATA3] PE07 [EBI - DATA23 / LCDC - DATA4] PE08 [EBI - DATA24 / LCDC - DATA8] PE09 [EBI - DATA25 / LCDC - DATA9] PE10 [EBI - DATA26 / LCDC - DATA10] PE11 [EBI - DATA27 / LCDC - DATA11] PE12 [EBI - DATA28 / LCDC - DATA12] PE13 [EBI - DATA29 / LCDC - DATA16] PE14 [EBI - DATA30 / LCDC - DATA17] PE15 [EBI - DATA31 / LCDC - DATA18] PE16 [EBI - ADDR23 / LCDC - DATA19] PE17 [EBI - ADDR24 / LCDC - DATA20] PE18 [EBI - ADDR25 / LCDC - DATA21] PE19 [EBI - CFCE1 / -] PE20 [EBI - CFCE2 / -] PE21 [EBI - NCS4 / -] PE22 [EBI - NCS5 / -] PE23 [EBI - CFRNW / -] PE24 [EBI - NWAIT / -] PE25 [EBI - NCS2 / -] PE26 [EBI - SDCS / -] R14 T14 P14 T15 R15 H10 H11 H14 H16 H9 G12 G13 G15 G14 G11 G10 B16 B15 D10 B10 G9 F9 D9 A9 C9 B9 G8 F8 E8 D8 B8 C8 C2 C1 D3 H6 H5 H4 H1 H3 J7 J6 R2 P4 T4 R4 N5 T5 P5 R5 ETH_0_COL ETH_0_CRS R1 R2 R7 33R R5 33R R6 33R 33R 33R 3 3 D ETH_0_TXD0 3 ETH_0_TXD1 3 ETH_0_TXD2 3 ETH_0_TXD3 3 ETH_0_TX_EN 3 ETH_0_TX_CLK 3 ETH_0_RXD0 3 ETH_0_RXD1 3 ETH_0_RXD2 3 ETH_0_RXD3 3 ETH_0_RX_ER 3 ETH_0_RX_CLK 3 ETH_0_RX_DV 3 ETH_0_MDC 3 ETH_0_MDIO 3 ETH_1_COL 4 PC20 10 PC21 10 PC22 10 ETH_1_CRS 4 ETH_1_RX_CLK 4 SD_DETECT 7 R9 33R R10 33R 33R 33R 4 4 4 4 10 R13 33R C6 E6 A6 D5 B5 E5 C5 A5 D4 B4 C4 A4 B3 A3 C3 A2 B2 D1 D2 T11 M11 P11 N11 R11 L11 T10 H12 PD16 PD17 10 10 SD_WP PE01 PE02 PE03 PE04 PE05 PE06 PE07 PE08 PE09 PE10 PE11 PE12 PE13 PE14 PE15 PE16 PE17 PE18 7 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 TESTPAD TP37 TESTPAD TP38 TESTPAD C PD00 10 PD01 10 ETH_1_MDIO 4 ETH_1_MDC 4 ETH_1_RX_DV 4 ETH_1_RX_ER 4 ETH_1_RXD1 4 PD07 10 PD08 10 PD09 10 ETH_1_RXD0 4 ETH_1_TX_EN 4 ETH_1_TX_CLK 4 ETH_1_TXD0 4 ETH_1_TXD1 4 R11 R12 ETH_1_TXD2 ETH_1_TXD3 ETH_1_RXD2 ETH_1_RXD3 PC31 TP36 TP39 TESTPAD B TP40 TP41 TP42 TP43 TP44 TP45 TP46 TESTPAD TESTPAD TESTPAD TESTPAD TESTPAD TESTPAD TESTPAD AP7000 A A <Core Design> ATMEL Norway AS Vestre Rosten 79 N-7075 TILLER Norway Title Size A3 Date: AP7000_1 Document Number <Doc> Tuesday, November 07, 2006 Rev PC1 Sheet 1 of 13 5 4 VCC_3V3 2 1 VCC_3V3 R14 10k TP1 TESTPAD 3 AP7000_2 R15 100k RESET BUTTON D4 9,11 RESET_MCU_N SW1 1 D 3 2 3,4,5 RESET_N 1 2 D 3 4 SKHUAF010 BAT54C TP2 TESTPAD C1 100n C2 1uF U1C L1 RESET 10 WAKE_N P9 WAKE 11 11 11 11 11 JTAG_TCK JTAG_TDI JTAG_TDO JTAG_TMS JTAG_TRST J4 J3 J5 J2 J1 TCK TDI TDO TMS TRST A8 F7 G7 T6 P6 H8 E7 B6 C7 OSCEN XIN0 XOUT0 XIN1 XOUT1 XIN32 XOUT32 PLL0 PLL1 R16 C XC1 XC2 R18 430R XC3 12MHz 20MHz 4 3 C8 C9 C10 C11 C12 22p 22p 22p 22p 12p 1 2 32.768kHz C13 12p C14 18n C7 C6 1.8n 5.6n GNDCORE_A / GNDIOP_A GNDCORE_B / GNDIOP_B GNDCORE_C / GNDIOP_C GNDCORE_D / GNDIOP_D GNDCORE_E / GNDIOP_E GNDCORE_F / GNDIOP_F VDDIOP_A VDDIOP_B VDDIOP_C VDDIOP_D VDDIOP_E VDDIOP_F VDDIOP_G VDDIOP_H VDDIOP_I VDDIOP_J VDDIOP_K E9 E15 F4 H2 H13 K15 L3 L10 M6 M7 T8 R19 10R GNDIOP_A GNDIOP_B GNDIOP_C GNDIOP_D D6 K10 L5 N6 R22 6.8k VDDIOP_CBL VDDIOP_CBR VDDIOP_CUL VDDIOP_CUR T16 A16 T1 A1 GNDIOP_CBL GNDIOP_CBR GNDIOP_CUL GNDIOP_CUR R16 A15 T2 B1 FSDP FSDM HSDM HSDP VBG C16 10p L7 A7 D7 H7 F11 M8 J15 E10 P7 1k C15 56n B AGNDUSB AGNDPLL AGNDOSC G2 G16 L8 J14 F10 T7 N7 R7 K8 N8 R21 39R R6 F6 B7 VDDCORE_A VDDCORE_B VDDCORE_C VDDCORE_D VDDCORE_E R17 150R R20 39R 8 8 K5 AVDDUSB AVDDPLL AVDDOSC USB_HSDM USB_HSDP VCC_1V8 3.3uH/1.6A C3 100n Place close to pin B7 C4 100n Place close to pin F6 C5 100n Place close to pin R6 VCC_1V8 U1B VCC_3V3 VCC_3V3 AP7000 VCC_1V8 VCC_3V3 TESTPAD TP18 C17 C18 C19 C20 C21 C22 C23 C24 C25 C26 C27 C28 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n 100n TESTPAD TP19 TESTPAD TP20 TESTPAD TP21 5,6 5,6 5,6 5,6 5,6 5,6 5,6 5,6 5,6 5,6 5,6 5,6 5,6 5,6 5,6 5,6 6 5 5,6 5,6 5,6 5,6 5,6 5,6 5,6 5,6 5,6 5,6 5 5,6 5,6 5 5,6 5,6 5 5 5 5 5 5 6 F2 G6 G5 G4 G1 G3 N12 R12 M12 P12 T12 N13 T13 P15 P16 N14 N16 N15 L13 L16 L14 L15 K11 K12 K13 K16 K14 J10 J11 J12 J13 J16 F1 F3 M13 M16 M14 M15 L12 H15 F15 P10 F13 F14 F12 F16 E13 E4 E1 E3 E2 F5 R10 N10 EBI_D0 EBI_D1 EBI_D2 EBI_D3 EBI_D4 EBI_D5 EBI_D6 EBI_D7 EBI_D8 EBI_D9 EBI_D10 EBI_D11 EBI_D12 EBI_D13 EBI_D14 EBI_D15 EBI_A0 EBI_A1 EBI_A2 EBI_A3 EBI_A4 EBI_A5 EBI_A6 EBI_A7 EBI_A8 EBI_A9 EBI_A10 EBI_A11 EBI_A12 EBI_A13 EBI_A14 EBI_A15 EBI_A16 EBI_A17 EBI_A18 EBI_A19 EBI_A20 EBI_A21 EBI_A22 EBI_NCS0 EBI_NCS1 5 EBI_NRD 5 EBI_NWE0 6 EBI_NWE1 6 6 6 6 6 6 EBI_SDCK EBI_SDCKE EBI_RAS EBI_CAS EBI_SDWE EBI_SDA10 C PX00 [EBI - DATA0] PX01 [EBI - DATA1] PX02 [EBI - DATA2] PX03 [EBI - DATA3] PX04 [EBI - DATA4] PX05 [EBI - DATA5] PX06 [EBI - DATA6] PX07 [EBI - DATA7] PX08 [EBI - DATA8] PX09 [EBI - DATA9] PX10 [EBI - DATA10] PX11 [EBI - DATA11] PX12 [EBI - DATA12] PX13 [EBI - DATA13] PX14 [EBI - DATA14] PX15 [EBI - DATA15] PX16 [EBI - ADDR0] PX17 [EBI - ADDR1] PX18 [EBI - ADDR2] PX19 [EBI - ADDR3] PX20 [EBI - ADDR4] PX21 [EBI - ADDR5] PX22 [EBI - ADDR6] PX23 [EBI - ADDR7] PX24 [EBI - ADDR8] PX25 [EBI - ADDR9] PX26 [EBI - ADDR10] PX27 [EBI - ADDR11] PX28 [EBI - ADDR12] PX29 [EBI - ADDR13] PX30 [EBI - ADDR14] PX31 [EBI - ADDR15] PX32 [EBI - ADDR16] PX33 [EBI - ADDR17] PX34 [EBI - ADDR18] PX35 [EBI - ADDR19] PX36 [EBI - ADDR20] PX37 [EBI - ADDR21] PX38 [EBI - ADDR22] PX39 [EBI - NCS0] PX40 [EBI - NCS1] PX41 [EBI - NCS3] PX42 [EBI - NRD] PX43 [EBI - NWE0] PX44 [EBI - NWE1] PX45 [EBI - NWE3] PX46 [EBI - SDCK] PX47 [EBI - SDCKE] PX48 [EBI - RAS] PX49 [EBI - CAS] PX50 [EBI - SDWE] PX51 [EBI - SDA10] PX52 [EBI - NANDOE] PX53 [EBI - NANDWE] B A A <Core Design> AP7000 ATMEL Norway AS Vestre Rosten 79 N-7075 TILLER Norway Title Size A3 Date: AP7000_2 Document Number <Doc> Tuesday, November 07, 2006 Rev PC1 Sheet 2 of 13 5 4 3 2 1 ETHERNET PORT 0 VCC_3V3 R33 1.5k D D 25_MHZ_CLK 2,4,5 RESET_N 1 ETH_0_MDIO 1 ETH_0_MDC C30 4 VCC_3V3 33p C31 XC4 25MHz R34 220R 33p R35 220R R36 33R R37 33R R42 1 ETH_0_CRS 33R R45 1 ETH_0_RX_ER 37 38 39 40 41 42 43 44 45 46 47 48 33R R48 1 ETH_0_COL 33R R49 1 ETH_0_RXD0 1 ETH_0_RXD1 1 ETH_0_RXD2 B 1 ETH_0_RXD3 1 ETH_0_TX_CLK 1 1 1 1 1 ETH_0_TX_EN ETH_0_TXD0 ETH_0_TXD1 ETH_0_TXD2 ETH_0_TXD3 33R R50 33R R51 33R R54 VCC_3V3 R39 4.7k C C32 100n VCC_3V3 R41 18R PFBIN2 RX_CLK RX_DV/MII_MODE CRS/CRS_DV/LED_CFG RX_ER/MDIX_EN COL/PHYAD0 RXD_0/PHYAD1 RXD_1/PHYAD2 RXD_2/PHYAD3 RXD_3/PHYAD4 IOGND IOVDD33 RBIAS PFBOUT AVDD33 RESERVED7 RESERVED6 AGND PFBIN1 TD + TD AGND RD + RD - 24 23 22 21 20 19 18 17 16 15 14 13 R43 51R R46 2.2k R47 2.2k C54 100n C35 100n R44 51R VCC_3V3 J3 TD_0_P 3 TD+ C33 100n TD_0_N 5 CT 4 TD- RD_0_P 7 RD+ 5 C34 100n RD_0_N 6 CT 6 8 RD- 100n DP83848I + R52 51R R53 51R 33R TP7 33R JTAG_TMS_PHY 4 TESTPAD 3 75R 7 8 NC 10 GND 75R 1nF 75R 75R Green 11 12 Yellow 2 1 Shield Shield VCC_3V3 B J3026G01DNLT TESTPAD C38 100n JTAG_TRST_PHY 4 TP8 2 4 9 13 14 R55 1 C36 C37 10uF/6V 1 ETH_0_RX_DV R38 150R 36 35 34 33 32 31 30 29 28 27 26 25 U3 R40 DGND IOGND X1 X2 IOVDD33 MDC MDIO RESET LED_LINK/AN0 LED_SPEED/AN1 LED_ACT/COL/AN_EN 25MHz_OUT 33R TX_CLK TX_EN TXD_0 TXD_1 TXD_2 TXD_3/SNI_MODE PWR_DOWN/INT TCK TDO TMS TRST TDI C VCC_3V3 1 2 3 4 5 6 7 8 9 10 11 12 1 ETH_0_RX_CLK VCC_3V3 JTAG_TCK_PHY 4 R56 10k TESTPAD TESTPAD TESTPAD TP9 TP10 TP11 VCC_3V3 VCC_3V3 A C39 100n C40 100n A C41 100n <Core Design> ATMEL Norway AS Vestre Rosten 79 N-7075 TILLER Norway Title Ethernet port 0 Size A3 Document Number <Doc> Date: Tuesday, November 07, 2006 Rev PC1 Sheet 3 of 13 5 4 3 2 1 ETHERNET PORT 1 VCC_3V3 R57 1.5k D D 2,3,5 RESET_N 1 ETH_1_MDIO 1 ETH_1_MDC VCC_3V3 3 25_MHZ_CLK R58 220R R59 220R VCC_3V3 R60 33R R66 1 ETH_1_CRS 33R 33R R71 1 ETH_1_COL 33R VCC_3V3 1 ETH_1_RXD0 1 ETH_1_RXD1 B 1 ETH_1_RXD2 1 ETH_1_RXD3 1 ETH_1_TX_CLK 1 1 1 1 1 ETH_1_TX_EN ETH_1_TXD0 ETH_1_TXD1 ETH_1_TXD2 ETH_1_TXD3 37 38 39 40 41 42 43 44 45 46 47 48 R68 1 ETH_1_RX_ER R102 2.2k R72 33R R73 33R VCC_3V3 36 35 34 33 32 31 30 29 28 27 26 25 C R64 18R PFBIN2 RX_CLK RX_DV/MII_MODE CRS/CRS_DV/LED_CFG RX_ER/MDIX_EN COL/PHYAD0 RXD_0/PHYAD1 RXD_1/PHYAD2 RXD_2/PHYAD3 RXD_3/PHYAD4 IOGND IOVDD33 RBIAS PFBOUT AVDD33 RESERVED7 RESERVED6 AGND PFBIN1 TD + TD AGND RD + RD - 24 23 22 21 20 19 18 17 16 15 14 13 R67 51R R69 2.2k R70 2.2k C70 100n R75 33R C42 100n R62 4.7k C45 100n C46 100n DP83848I C47 + R76 51R VCC_3V3 R65 51R VCC_3V3 10uF/6V R63 1 ETH_1_RX_DV R61 150R DGND IOGND X1 X2 IOVDD33 MDC MDIO RESET LED_LINK/AN0 LED_SPEED/AN1 LED_ACT/COL/AN_EN 25MHz_OUT C U4 TX_CLK TX_EN TXD_0 TXD_1 TXD_2 TXD_3/SNI_MODE PWR_DOWN/INT TCK TDO TMS TRST TDI 33R 1 2 3 4 5 6 7 8 9 10 11 12 1 ETH_1_RX_CLK R74 51R J4 TD_1_P 3 TD+ C43 100n TD_1_N 5 CT 4 TD- RD_1_P 7 RD+ 5 C44 100n RD_1_N 6 CT 6 8 RD- R78 NC 10 GND JTAG_TMS_PHY 3 7 8 75R 1nF 75R Green 11 12 Yellow 2 1 Shield Shield B VCC_3V3 J3026G01DNLT TESTPAD JTAG_TRST_PHY 3 33R 3 75R 75R R77 TP16 2 4 9 13 14 33R 1 VCC_3V3 C48 100n TP17 TESTPAD JTAG_TCK_PHY 3 R79 10k VCC_3V3 A VCC_3V3 C49 100n C50 100n A C51 100n <Core Design> ATMEL Norway AS Vestre Rosten 79 N-7075 TILLER Norway Title Ethernet port 1 Size A3 Document Number <Doc> Date: Tuesday, November 07, 2006 Rev PC1 Sheet 4 of 13 5 4 3 2 1 FLASH NOTE: The serial FLASH are possible to update with larger memories in the future within the same footprint. D D 8MB parallel FLASH U5 C 2 2,6 2,6 2,6 2,6 2,6 2,6 2,6 2,6 2,6 2,6 2 2,6 2,6 2 2,6 2,6 2 2 2 2 2 25 24 23 22 21 20 19 18 8 7 6 5 4 3 2 1 48 17 16 15 10 9 EBI_A1 EBI_A2 EBI_A3 EBI_A4 EBI_A5 EBI_A6 EBI_A7 EBI_A8 EBI_A9 EBI_A10 EBI_A11 EBI_A12 EBI_A13 EBI_A14 EBI_A15 EBI_A16 EBI_A17 EBI_A18 EBI_A19 EBI_A20 EBI_A21 EBI_A22 13 11 12 26 28 VCC_3V3 2 2,3,4 2 2 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20 A21 EBI_NWE0 RESET_N EBI_NCS0 EBI_NRD I/O0 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 29 31 33 35 38 40 42 44 30 32 34 36 39 41 43 45 EBI_D0 EBI_D1 EBI_D2 EBI_D3 EBI_D4 EBI_D5 EBI_D6 EBI_D7 EBI_D8 EBI_D9 EBI_D10 EBI_D11 EBI_D12 EBI_D13 EBI_D14 EBI_D15 2,6 2,6 2,6 2,6 2,6 2,6 2,6 2,6 2,6 2,6 2,6 2,6 2,6 2,6 2,6 2,6 C VPP WE RESET CE OE NC 14 VCCQ VCC 47 37 GND1 GND2 27 46 VCC_3V3 C52 C53 100n 100n AT49BV642D-70TU VCC_3V3 R80 100k B B U6 1,10 SPI_0_MOSI 1,10 SPI_0_SCK 1,10 SPI_0_CS0 1 2 3 4 SI SCK RESET CS SO GND VCC WP AT45DB642D 8 7 6 5 SPI_0_MISO 1,10 VCC_3V3 R81 100k 8MB serial FLASH VCC_3V3 C55 100n A A <Core Design> ATMEL Norway AS Vestre Rosten 79 N-7075 TILLER Norway Title Size A3 Date: FLASH Document Number <Doc> Tuesday, November 07, 2006 Rev PC1 Sheet 5 of 13 5 4 3 2 1 SDRAM NOTE: The SDRAM are possible to update with larger memories in the future within the same footprint. D D 32MB U9 C 23 24 25 26 29 30 31 32 33 34 22 35 36 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 20 21 BA0 BA1 2 EBI_A0 2 EBI_NWE1 15 39 DQML DQMH 2 2 2 2 16 17 18 19 WE CAS RAS CS 37 38 CKE CLK 2,5 2,5 2,5 2,5 2,5 2,5 2,5 2,5 2,5 2,5 2 2,5 2,5 EBI_A2 EBI_A3 EBI_A4 EBI_A5 EBI_A6 EBI_A7 EBI_A8 EBI_A9 EBI_A10 EBI_A11 EBI_SDA10 EBI_A13 EBI_A14 2,5 EBI_A16 2,5 EBI_A17 EBI_SDWE EBI_CAS EBI_RAS EBI_NCS1 2 EBI_SDCKE 2 EBI_SDCK 40 NC DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 2 4 5 7 8 10 11 13 EBI_D0 EBI_D1 EBI_D2 EBI_D3 EBI_D4 EBI_D5 EBI_D6 EBI_D7 2,5 2,5 2,5 2,5 2,5 2,5 2,5 2,5 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 42 44 45 47 48 50 51 53 EBI_D8 EBI_D9 EBI_D10 EBI_D11 EBI_D12 EBI_D13 EBI_D14 EBI_D15 2,5 2,5 2,5 2,5 2,5 2,5 2,5 2,5 VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDD1 VDD2 VDD3 3 9 43 49 1 14 27 VSS1 VSS2 VSS3 VSSQ1 VSSQ2 VSSQ3 VSSQ4 54 41 28 52 46 12 6 C VCC_3V3 MT48LC16M16A2 B B VCC_3V3 C80 C81 C82 C83 C84 C85 C86 100n 100n 100n 100n 100n 100n 100n A A <Core Design> ATMEL Norway AS Vestre Rosten 79 N-7075 TILLER Norway Title Size A3 Date: SDRAM Document Number <Doc> Tuesday, November 07, 2006 Rev PC1 Sheet 6 of 13 5 4 3 2 1 SD/MMC D D VCC_3V3 C R98 47k R99 47k R93 47k R94 47k R95 47k R96 47k C R97 47k VCC_3V3 J14 MCI_D0 MCI_D1 MCI_D2 MCI_D3 7 8 9 1 D0 D1 D2 D3 1 MCI_CLK 1 MCI_CMD 5 2 CLK CMD 1 1 1 1 1 SD_DETECT 1 SD_WP 10 12 11 DETECT WP SW_COM VDD 4 VSS1 VSS2 VSS3 3 6 14 SCDA1A0900 VCC_3V3 B C79 100n B A A <Core Design> ATMEL Norway AS Vestre Rosten 79 N-7075 TILLER Norway Title Size A3 Date: SD/MMC Document Number <Doc> Tuesday, November 07, 2006 Rev PC1 Sheet 7 of 13 5 4 3 2 1 RS-232 / USB D D TP35 TESTPIN J12 VBUS DD+ GND SHIELD1 SHIELD2 1 2 3 4 5 6 USB_HSDM USB_HSDP 2 2 KUSBX-SMT-BS1N-W-TR C C TP34 TP33 TESTPAD TESTPAD 16 VCC_3V3 B 1 6 2 7 3 8 4 9 5 11 C74 R91 470R R92 470R C77 1n C78 1n 100n V+ 6 V- 14 7 13 8 U8 VCC 100n 2 T1OUT T2OUT R1IN R2IN C75 C1+ C1- 1 3 C2+ C2- 4 5 T1IN T2IN R1OUT R2OUT 100n C76 100n 11 10 12 9 USART_1_TXD 1 B USART_1_RXD 1 GND 10 C73 TP48 TESTPAD 15 J13 TP47 TESTPAD MAX3232ECAE+ 17SM209SB64 VCC_3V3 C72 100n A A <Core Design> ATMEL Norway AS Vestre Rosten 79 N-7075 TILLER Norway Title Size A3 Date: RS-232/USB Document Number <Doc> Tuesday, November 07, 2006 Rev PC1 Sheet 8 of 13 5 4 3 2 1 BOARD CONTROL D D VCC_1V8 VCC_3V3 VCC_3V3 C29 R23 27k C 1 PB29 2,11 RESET_MCU_N 1 PB28/EXTINT3 R28 0R 0R R29 10k R106 TWI_SDA R104 TWI_SCL R24 10k U2 VCC_3V3 R27 100n 1 2 3 4 5 6 7 VCC PB0 PB1 PB3 PB2 PA7 PA6 GND PA0 PA1 PA2 PA3 PA4 PA5 R25 10k R26 10k 14 13 12 11 10 9 8 C R30 10k ATtiny24-20SSU R31 1.5k R32 1.5k 0R 0R ISP J1 B 1 3 5 2 4 6 VCC_3V3 B PIN HEADER 2x3 Spare J2 1 3 5 2 4 6 PIN HEADER 2x3 A A ATMEL Norway AS Vestre Rosten 79 N-7075 TILLER Norway Title Size A3 Date: <Title> Document Number <Doc> Tuesday, November 07, 2006 Rev PC1 Sheet 9 of 13 5 4 3 2 1 GPIO D VCC_3V3 R82 4.7k 1 TWI_SDA D VCC_3V3 J5 VCC_3V3 1,5 SPI_0_MISO 1,5 SPI_0_SCK 1 PA04 1 1 1 1 1 1 1 1,11 1,11 1,11 1 PA08 PA21 PA23 PA25 PA27 PA29 PA31 PB01 PB03/EVTO PB05 SPI_0_NPCS3 VCC_3V3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 R83 4.7k SPI_0_MOSI SPI_0_CS0 PA05 1,5 1,5 1 PA09 PA22 PA24 PA26 PA28 PA30 PB00 PB02 PB04 PB06 1 1 1 1 1 1 1,11 1,11 1,11 1,11 TWI_SCL 1 10-89-7362 C C J6 VCC_3V3 1,11 1,11 1 1 1 1 1 1 1 1 1 PB07 PB09 PB11 PB13 PB15 PB17 PB19 PB21 PB23 PB25 PB27 VCC_3V3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 PB08 PB10 PB12 PB14 PB16 PB18 PB20 PB22 PB24 PB26 WAKE_N 1,11 1 1 1 1 1 1 1 1 1 2 10-89-7362 B B J7 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 PE03 PE05 PE07 PD00 PE08 PE10 PE12 PD08 PE13 PE15 PE17 PD16 PE01 PC20 PC22 VCC_3V3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 PE04 PE06 PC31 PD01 PE09 PE11 PD07 PD09 PE14 PE16 PE18 PD17 PE02 PC21 1 1 1 1 1 1 1 1 1 1 1 1 1 1 10-89-7362 A A <Core Design> ATMEL Norway AS Vestre Rosten 79 N-7075 TILLER Norway Title Size A3 Date: GPIO Document Number <Doc> Tuesday, November 07, 2006 Rev PC1 Sheet 10 of 13 5 4 3 2 1 JTAG_NEXUS D D 38-pin MICTOR J8 C VCC_3V3 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 GND1 GND3 GND5 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 GND2 GND4 40 42 VCC_3V3 EVTI_N 1 PB09 PB08 PB07 PB06 PB05 PB04 PB03/EVTO PB02 PB01 PB00 1,10 1,10 1,10 1,10 1,10 1,10 1,10 1,10 1,10 1,10 C 2-5767004-2 R84 10k 2 JTAG_TRST 2,9 RESET_MCU_N 1.27mm (0.050") pitch header J9 2 JTAG_TCK 2 JTAG_TDO 2 JTAG_TMS 2 JTAG_TDI B 1 3 5 7 9 2 4 6 8 10 VCC_3V3 PIN HEADER 2x5, SMD B 2.54mm (0.100") pitch header J10 1 3 5 7 9 2 4 6 8 10 VCC_3V3 CD075014 2X5 A A <Core Design> ATMEL Norway AS Vestre Rosten 79 N-7075 TILLER Norway Title JTAG/NEXUS Size A3 Document Number <Doc> Date: Tuesday, November 07, 2006 Rev PC1 Sheet 11 of 13 5 4 3 2 1 POWER D D Input voltage 9-15V R85 TP50 TESTPAD D5 1 220R ~2 TP51 TESTPAD VCC_3V3 - L2 U7 + 1 DF10S 14 15 23 J16 ~1 RASM722P 2 3 1 2 3 C EL15-21UGC 4 D6 J11 2 C56 100n C57 4.7u C58 47uF 1 2 VIN1 VIN2 VIN3 Fixed 3.3V C62 PIN HEADER 1x2 C63 4.7n C66 4.7n R86 20k 100n C65 1n R87 10k C67 20 SS1 5 VC1 6 VBG 7 VC2 18 SS2 100n 1 2 11 12 PGND1 PGND2 PGND3 PGND4 FB1 4 CB1 22 SW1 24 C60 CD54NP-220MC 1uF 1 C64 Adjustable CB2 16 SW2 13 FB2 8 SHDN1 SHDN2 FSLCT 21 17 19 AGND1 AGND2 AGND3 3 9 10 C59 1uF D7 2 MBRS340T3G C 3.3V supply + C61 68uF/10V TP23 TESTPAD L3 1uF VCC_1V8 CD54NP-220MC C68 1uF D8 1 + C69 68uF/10V R88 22k 2 MBRS340T3G 1.8V supply R89 20k R90 51k LM2717MT B B TP24 TESTPAD A A <Core Design> ATMEL Norway AS Vestre Rosten 79 N-7075 TILLER Norway Title Size A3 Date: Power Document Number <Doc> Tuesday, November 07, 2006 Rev PC1 Sheet 12 of 13 5 4 D PCB1 3 E1 E2 E3 FIDUCIAL FIDUCIAL FIDUCIAL E4 E5 E6 2 1 NON Electrical D E7 A0602.3.1000.C PCB mounting hole C PCB mounting hole E8 E9 SJ-5303 SJ-5303 PCB mounting hole E10 SJ-5303 PCB mounting hole E11 SJ-5303 C B B A A <Core Design> ATMEL Norway AS Vestre Rosten 79 N-7075 TILLER Norway Title Non Electrical Size A3 Document Number <Doc> Date: Tuesday, November 07, 2006 Rev PC1 Sheet 13 of 13