Charging System Safety Circuit ISL9211B Features The ISL9211B is an integrated circuit (IC) optimized to provide a redundant safety protection to a Li-ion battery charging system. The IC monitors input voltage, battery voltage, and charge current. When any of these parameters exceeds its limit, the IC turns off an internal N-channel MOSFET to remove power from the charging system to the battery. The IC also monitors its own internal temperature and turns off the N-channel MOSFET when the temperature exceeds +150°C. Together with the battery charger IC and the protection module in a battery pack, the charging system using the ISL9211B has triple-level protection and is two-fault tolerant. • 24V Max Input Voltage The IC is designed to turn on the internal NFET slowly, to avoid in-rush current at power-up. It turns off the NFET quickly when the input is overvoltage, to remove power before damage occurs. The ISL9211B has a logic flag output to indicate a fault condition. The enable input allows the system to cut off the input power, if needed. • Easy to Use Related Literature • Digital Still Cameras • Technical Brief TB363 “Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs)” • Portable Instruments • Supports Up To 2.0A Input Current • Fully Integrated Protection Circuit for Three Protected Variables • High Accuracy Protection Thresholds • User Programmable Overcurrent Protection Threshold • Responds to Input Overvoltage in Less Than 1µs • High Immunity of False Triggering Under Transients • Fault Indication for Various Fault Occurrence • Pb-Free (RoHS Compliant) Applications • Cell Phones • PDAs and Smart Phones • Desktop Chargers • Technical Brief TB379 “Thermal Characterization of Packaged Semiconductor Devices” • Technical Brief TB389 “PCB Land Pattern Design and Surface Mount Guidelines for QFN Packages” INPUT INPUT VIN OUT C1 ISL6292 BATTERY CHARGER C2 ISL9211B RVB VB ILIM EN DISA ENA RLIM GND FAULT BATT PACK FIGURE 1. TYPICAL APPLICATION CIRCUIT July 8, 2011 FN7861.0 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners. ISL9211B Block Diagram IN P U T OUT V IN IS L 6 2 9 2 BATTERY CHARGER Q1 Q2 POR P R E -R E G REF R1 FET D R IV E R CP1 R2 Q3 R L IM CP2 VB CP3 R VB R3 Q4 R4 GND FAULT Pin Configuration EN Pin Descriptions ISL9211B (8 LD µTDFN) TOP VIEW VIN 1 8 OUT GND 2 7 ILIM NC 3 6 VB FAULT 4 5 EN PAD 2 EA 0 .8 V L O G IC 1 .2 V IL IM SYMBOL PIN NUMBER VIN 1 The input power source. VIN can withstand 24V input. GND 2 System ground reference. NC 3 No connection, and must be left floating. FAULT 4 FAULT is an open-drain logic output that turns LOW when any protection event occurs. EN 5 IC enable pin. Pull this pin to LO to enable the device and pull it to HI to disable. VB 6 Battery voltage monitoring input. This pin is connected to the battery pack positive terminal via an isolation resistor. ILIM 7 Overcurrent protection threshold setting pin. Connect a resistor between this pin and GND to set the OCP threshold. OUT 8 Output pin. PAD PAD DESCRIPTION Exposed pad. Connect to system ground. FN7861.0 July 8, 2011 ISL9211B Ordering Information PART NUMBER (Notes 1, 2, 3) PART MARKING ISL9211BIRU58XZ-T 58X TEMP RANGE (°C) -40 to +85 PACKAGE Tape and Reel (Pb-free) 8 Ld µTDFN PKG. DWG. # L8.2x2B NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL9211B. For more information on MSL please see Tech Brief TB363. 3 FN7861.0 July 8, 2011 ISL9211B Absolute Maximum Ratings Thermal Information Supply Voltage (VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 26V Output and VB Pin (OUT, VB) (Note 4) . . . . . . . . . . . . . . . . . . . . . -0.3V to 8V Other Pins (ILIM, FAULT, EN) . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 5.5V ESD Rating Human Body Model (Tested per JESD22-A114F) . . . . . . . . . . . . . . . . 3kV Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . . 200V Latch Up (Tested per JESD78B; Class II, Level A) . . . . . . . . . . . . . . . 100mA Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W) 8 Ld 2x2 µTDFN (Notes 5, 6). . . . . . . . . . . . . 98 37 Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . .+150°C Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C Supply Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3V to 24V CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. The maximum voltage rating for the VB pin under continuous operating conditions is 5.5V. All other pins are allowed to operate continuously at the absolute maximum ratings. 5. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech Brief TB379. 6. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside. Electrical Specifications Boldface limits apply over the operating temperature range, -40°C to +85°C. PARAMETER MIN (Note 8) TYP MAX (Note 8) UNITS Rising - - 2.47 V Falling 2.20 - - V RLIM = 24.9k, EN = L - - 1000 µA EN = H - 80 - µA 5.6 5.8 6.0 V - 100 - mV 5.55 - - V - - 1 µs 0.93 1.0 1.07 A - 2.0 - A SYMBOL TEST CONDITIONS POWER-ON RESET VIN Threshold VPOR VIN Bias Current IVIN PROTECTIONS Input OVP Protection VOVP Input OVP Hysteresis Input OVP Falling Threshold Input OVP Response Time (Note 7) Overcurrent Protection IOCP VVB = 3V, RLIM = 24.9kΩ Maximum Output Current IMAX RLIM = 9.53kΩ Overcurrent Protection Blanking Time BTOCP - 2.0 - µs Battery Overvoltage Protection Threshold VBOVP 4.25 4.34 4.40 V - 30 - mV - 180 - µs - - 20 nA Over-Temperature Protection Rising Threshold - 150 - °C Over-Temperature Protection Falling Threshold - 110 - °C EN Input Logic HIGH 1.5 - - V EN Input Logic LOW - - 0.4 V EN Internal Pull-down Resistor - 200 - kΩ - 0.4 0.8 V Battery OVP Threshold Hysteresis Battery OVP Blanking Time BTBOVP VB Pin Leakage Current VVB = 4.34V LOGIC FAULT Output Logic Low Sink 5mA current 4 FN7861.0 July 8, 2011 ISL9211B Electrical Specifications Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER MIN (Note 8) TYP MAX (Note 8) UNITS Pin Voltage = 4.2V - - 1.5 µA Measured at 200mA - 170 280 mΩ SYMBOL FAULT Output Logic High Leakage Current TEST CONDITIONS POWER MOSFET On-Resistance (Note 7) rDS(ON) NOTES: 7. Limits should be considered typical and are not production tested. 8. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. Typical Application INPUT VIN OUT C1 ISL6292 BATTERY CHARGER C2 ISL9211B RVB VB ILIM EN ENA RLIM FAULT GND PART BATT PACK DESCRIPTION RLIM 24.9kΩ RVB 200kΩ to 1MΩ C1,C2 5 DISA 1µF/25V X5R ceramic capacitor FN7861.0 July 8, 2011 ISL9211B Typical Operating Performance RVB = 200kΩ, unless otherwise noted. Test conditions for typical operating performance are: VIN = 5V, TA = +25°C, RLIM = 24.9kΩ, FIGURE 2. POWER UP WITH 500mA LOAD (CH1 = VOUT, CH2 = VIN, CH4 = IOUT) FIGURE 3. INPUT OVERVOLTAGE PROTECTION - VIN STEPPING FROM 5.5V TO 9.5V (CH1 = V FAULT, CH2 = VIN, CH3 = VOUT) FIGURE 4. INPUT OVERVOLTAGE PROTECTION - VIN SLOWLY RAMPING UP TO OVP THRESHOLD (CH1 = VFAULT, CH2 = VIN, CH3 = VOUT) FIGURE 5. LINE TRANSIENT - VIN STEPPING FROM 6.5V TO 5.5V (CH1 = VFAULT, CH2 = VIN, CH3 = VOUT) FIGURE 6. SHORT CIRCUIT TEST (CH1 = VOUT, CH2 = VFAULT, CH4 = IOUT) 6 FIGURE 7. BATTERY OVERVOLTAGE PROTECTION - VB VARYING BETWEEN 4.3V TO 4.5V. THE IC LATCHED OFF AFTER 16 COUNTS PROTECTION (CH1 = VFAULT, CH2 = VIN, CH3 = VB, CH4 = VOUT) FN7861.0 July 8, 2011 ISL9211B Typical Operating Performance Test conditions for typical operating performance are: VIN = 5V, TA = +25°C, RLIM = 24.9kΩ, RVB = 200kΩ, unless otherwise noted. (Continued) FIGURE 9. ZOOMED-IN VIEW OF FIGURE 8 FIGURE 8. POWER UP WITH OUTPUT SHORTED (CH1 = VFAULT, CH2 = VIN, CH4 = IOUT) 5.85 2.52 2.48 5.80 RISING THRESHOLD 2.40 VOVP (V) VPOR (V) 2.44 2.36 FALLING THRESHOLD 2.32 2.28 RISING THRESHOLD 5.75 5.70 FALLING THRESHOLD 5.65 2.24 2.20 -50 -30 -10 10 30 50 70 5.60 -50 90 -30 -10 FIGURE 10. VPOR vs TEMPERATURE 1.03 70 90 0.986 4.3V 1.02 1.01 1.00 0.99 0.98 3.0V 0.984 0.982 0.980 0.978 0.976 0.974 0.96 0.95 -50 -30 -10 50 0.988 5.0V 0.97 30 FIGURE 11. INPUT OVERVOLTAGE PROTECTION vs TEMPERATURE ILIM PIN VOLTAGE (V) OVERCURRENT PROTECTION (A) 1.04 10 TEMPERATURE (°C) TEMPERATURE (°C) 10 30 50 70 90 110 130 TEMPERATURE (°C) FIGURE 12. OVERCURRENT PROTECTION vs TEMPERATURE AT VARIOUS INPUT VOLTAGES 7 0.972 -50 -30 -10 10 30 50 70 90 110 130 TEMPERATURE (°C) FIGURE 13. ILIM PIN VOLTAGE vs TEMPERATURE FN7861.0 July 8, 2011 ISL9211B Typical Operating Performance Test conditions for typical operating performance are: VIN = 5V, TA = +25°C, RLIM = 24.9kΩ, RVB = 200kΩ, unless otherwise noted. (Continued) 350 3.0V 300 4.3V rDS(ON) (mΩ) 250 200 150 5.0V 100 50 0 -50 -30 -10 10 30 50 70 90 110 130 TEMPERATURE (°C) FIGURE 14. ON-RESISTANCE vs TEMPERATURE AT DIFFERENT INPUT VOLTAGES Theory of Operation The ISL9211B is an integrated circuit (IC) optimized to provide redundant safety protection to a Li-ion battery against charging system failures. The IC monitors input voltage, battery voltage, and charge current. When any of these parameters exceeds its limit, the IC turns off an internal N-channel MOSFET to remove power from the charging system. The IC also monitors its own internal temperature and turns off the N-channel MOSFET when temperature exceeds +150°C. Together with the battery charger IC and the protection module in a battery pack, the charging system has triple-level protection against overcharging the Li-ion battery and is two-fault tolerant. The ISL9211B protects up to 26V input voltage. Power-Up The ISL9211B has a power-on reset (POR) threshold of 2.47V (max). Before the input voltage reaches the POR threshold, the internal power NFET is off. Approximately 10ms after the input voltage exceeds the POR threshold, the IC resets itself and begins soft-start. The 10ms delay allows any transients at the input during a hot insertion of the power supply to settle down before the IC starts to operate. The soft-start slowly turns on the power NFET to reduce the inrush current as well as the input voltage drop during the transition. Figure 2 shows the power-up sequence. Input Overvoltage Protection (OVP) The input voltage is monitored by the comparator, CP1, as shown in the “Block Diagram” on page 2. CP1 has an accurate reference of 1.2V from the bandgap reference. The OVP threshold is set by the resistive divider consisting of R1 and R2. When the input voltage exceeds the threshold, CP1 outputs a logic signal to turn off the power NFET within 1µs (see Figure 3). This prevents high input voltage from damaging the electronics in a handheld system. Hysteresis for the input OVP threshold is given in the “Electrical Specifications” table on page 4. When the input overvoltage condition is removed, the ISL9211B re-enables the output by running through soft-start, as shown in Figure 5. Because of the 10ms delay before soft-start, the output is never 8 enabled if the input rises above the OVP threshold quickly, as shown in Figure 6. Battery Overvoltage Protection Battery voltage OVP is realized with the VB pin. The comparator, CP3, shown in the “Block Diagram” on page 2, monitors the VB pin and issues an overvoltage signal when battery voltage exceeds the 4.34V battery OVP threshold. The threshold has 30mV built-in hysteresis. The comparator, CP3, has a built-in 180µs blanking time to prevent any transient voltage from triggering OVP. If the OVP situation still exists after the blanking time, the power NFET is turned off. The control logic contains a 4-bit binary counter so that, if the battery overvoltage event occurs 16 times, the power NFET is turned off permanently, as shown in Figure 7. Recycling the input power resets the counter and restarts the ISL9211B. The resistor, RVB, between the VB pin and the battery, as shown in “TYPICAL APPLICATION CIRCUIT” on page 1, is an important component. This resistor provides a current limit in case the VB pin is shorted to the input voltage under a failure mode. VB pin leakage current under normal operation is negligible, which allows a resistance of 200kΩ to 1MΩ to be used. Overcurrent Protection (OCP) To prevent charging the battery with excessive current, the current in the power NFET is limited. Current is sensed using the voltage drop across the power FET after it is turned on. The reference for the OCP is generated using a sensing FET, Q2 (mirror to Q1), as shown in the “Block Diagram” on page 2. The current in the sensing FET is forced to match the value programmed by the ILIM pin. The OCP threshold can be set with the resistor, RLIM, as shown in Table 1. The size of the power FET, Q1, is 31,250 times the size of the sensing FET. Therefore, when the current in the power FET is 31,250 times the current in the sensing FET, the drain voltage of the power FET falls below that of the sensing FET. The comparator, CP2, then outputs a signal to turn off the power FET. When an OCP condition is encountered, the power FET is turned off immediately and then attempts to restart. If the condition FN7861.0 July 8, 2011 ISL9211B persists, the FET shuts off again. This hiccup mode continues until the OCP condition is cleared. Figures 8 and 9 show the waveforms during power-up when the output is shorted to ground. on page 1. The selection of the current limit resistor, RLIM, is given in “Overcurrent Protection (OCP)” on page 8. 1000 ISL9211B LIMITS RLIM (kΩ) OCP (mA) RLIM (kΩ) OCP (mA) 82.5 300 21 1200 61.9 400 19.1 1300 49.9 500 16.5 1400 41.2 600 15.4 1500 35.7 700 14 1600 31.6 800 12.4 1700 28 900 11.3 1800 24.9 1000 10.5 1900 22.6 1100 9.53 2000 Internal Over-Temperature Protection The ISL9211B monitors its own internal temperature to prevent thermal failures. When the internal temperature reaches +150°C, the IC turns off the N-channel power MOSFET. The IC does not resume operation until the internal temperature drops below +110°C. Fault Indication Output The FAULT pin is an open-drain output that indicates a LOW signal when any of the three fault events occurs. This provides a signal to the microprocessor to take further action to enhance the safety of the charging system. Applications Information The ISL9211B is designed to meet the “Lithium-Safe” criteria when operating together with a qualified Li-ion battery charger. The “Lithium-Safe” criteria require the charger output to fall within the green region shown in Figure 15 under normal operating conditions and not to fall within the red region when there is a single fault in the charging system. Taking into account the safety circuit in a Li-ion battery pack, the charging system is allowed to have two faults without creating hazardous conditions for the battery cell. The output of a Li-ion charger such as the ISL6292C has a typical I-V curve (shown by the blue lines in Figure 15) under normal operation (shown by the green region). The function of the ISL9211B is to add a redundant protection layer such that, under any single fault condition, the charging system output does not exceed the I-V limits (shown by the red lines). As Figure 15 shows, a charging system that includes the ISL9211B and the ISL6292C chip set can easily meet the “Lithium-Safe” test criteria. The ISL9211B is a simple device that requires only three external components, in addition to the ISL6292 charger circuit, to meet the “Lithium-Safe” criteria (see “TYPICAL APPLICATION CIRCUIT” 9 CHARGE CURRENT (mA) TABLE 1. CURRENT LIMIT RESISTOR SETTINGS ISL6292C LIMITS 0 1 2 3 4 6 5 BATTERY VOLTAGE (V) FIGURE 15. LITHIUM-SAFE OPERATING REGIONS RVB Selection RVB prevents a large current from the VB pin to the battery terminal, in case the ISL9211B fails. The recommended value is between 200kΩ and 1MΩ. With 200kΩ resistance, the worst-case current flowing from the VB pin to the charger output is shown in Equation 1, assuming VB pin voltage is 24V under failure mode and battery voltage is 4.2V. ( 24V – 4.2V ) ⁄ ( 200kΩ ) = 99μA (EQ. 1) Such a small current can easily be absorbed by the bias current of other components in a handheld system. Increasing the RVB value reduces the worst-case current but at the same time increases the error for the 4.34V battery OVP threshold. The battery OVP threshold error is the original accuracy at the VB pin given in the “Electrical Specifications” table on page 4, plus the voltage built across RVB by the VB pin leakage current. The VB pin leakage current is less than 20nA, as given in the “Electrical Specifications” table on page 4. With a 200kΩ resistor, the worst-case additional error is 4mV; with a 1MΩ resistor, the worst-case additional error is 20mV. Capacitor Selection The input capacitor (C1 in the “TYPICAL APPLICATION CIRCUIT” on page 1) is for decoupling. A higher value reduces the voltage drop or the over-shoot during transients. Two scenarios can cause input voltage over-shoot. The first one is when the AC adapter is inserted live (hot insertion). The second one is when the current in the power NFET of the ISL9211B has a step-down change. Figure 16 shows an equivalent circuit for the ISL9211B input. The cable between the AC/DC converter output and the handheld system input has a parasitic inductor. The parasitic resistor is the sum of various components, such as the cable, the adapter output capacitor ESR, the connector contact resistance, and so on. FN7861.0 July 8, 2011 ISL9211B C1 L R AC/DC ADAPTER C2 ISL9211B CABLE HANDHELD SYSTEM FIGURE 16. EQUIVALENT CIRCUIT FOR ISL9211B INPUT During the load current step-down transient, the energy stored in the parasitic inductor is used to charge the input decoupling capacitor, C2. The ISL9211B is designed to turn off the power NFET slowly during an OCP and battery OVP event. Because of this design, the input over-shoot during these events is not significant. During an input OVP, however, the NFET is turned in less than 1µs and can lead to significant over-shoot. Higher capacitance reduces the over-shoot. 10 Over-shoot caused by a hot insertion is not very dependent on the decoupling capacitance value, especially when ceramic type capacitors are used for decoupling. In theory, over-shoot can rise up to twice the DC output voltage of the AC adapter. Actual peak voltage is dependent on the damping factor that is mainly determined by parasitic resistance (R in Figure 16). The recommended input decoupling capacitor is a 25V, X5R dielectric ceramic capacitor with a value between 0.1µF and 1µF. The output of the ISL9211B and the input of the charging circuit typically share one decoupling capacitor. Selection of that capacitor is determined mainly by the requirements of the charging circuit. When using the ISL6292 family of chargers, a 1µF, 6.3V, X5R capacitor is recommended. Layout Recommendation The ISL9211B uses a thermally enhanced TDFN package with an exposed thermal pad at the bottom of the package. The layout should include as much copper as possible beneath the exposed pad on the component layer to improve thermal performance. The exposed pad under the package should be connected to the ground plane electrically as well as thermally. The vias should be about 0.3mm to 0.33mm in diameter. Use as many vias as will fit in the thermal pad area. FN7861.0 July 8, 2011 ISL9211B Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE REVISION 7/8/2011 FN7861.0 CHANGE Initial release. Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. *For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL9211B To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff FITs are available from our website at http://rel.intersil.com/reports/search.php For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 11 FN7861.0 July 8, 2011 ISL9211B Package Outline Drawing L8.2x2B 8 LEAD MICRO THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE (µTDFN) WITH E-PAD Rev 0, 04/08 2.00 A 6 PIN #1 INDEX AREA B 6 PIN 1 INDEX AREA 8 1 0.50 2.00 1.60±0.050 EXP. DAP (4X) 0.15 0.10 M C A B 0.25±0.050 ( 8x0.30 ) 0.90±0.050 EXP. DAP TOP VIEW BOTTOM VIEW SEE DETAIL "X" ( 8x0.20 ) PACKAGE OUTLINE 0.10 C 0 . 55 MAX ( 8x0.30 ) C BASE PLANE SEATING PLANE SIDE VIEW ( 6x0.50 ) 1.60 C 2.00 C ( 8x0.25 ) 0.08 0 . 2 REF 0.90 0 . 00 MIN. 2.00 0 . 05 MAX. TYPICAL RECOMMENDED LAND PATTERN DETAIL "X" NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal ± 0.05 4. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 indentifier may be either a mold or mark feature. 12 FN7861.0 July 8, 2011